pub type W = W<DCFGR_SPEC>;
Expand description
Register DCFGR
writer
Aliased Type§
struct W { /* private fields */ }
Implementations§
source§impl W
impl W
sourcepub fn fbldo(&mut self) -> FBLDO_W<'_, DCFGR_SPEC, 0>
pub fn fbldo(&mut self) -> FBLDO_W<'_, DCFGR_SPEC, 0>
Bits 0:4 - Fixed Burst Length for DMA Data Operations:
sourcepub fn esma(&mut self) -> ESMA_W<'_, DCFGR_SPEC, 6>
pub fn esma(&mut self) -> ESMA_W<'_, DCFGR_SPEC, 6>
Bit 6 - Endian Swap Mode Enable for Management Descriptor Accesses
sourcepub fn espa(&mut self) -> ESPA_W<'_, DCFGR_SPEC, 7>
pub fn espa(&mut self) -> ESPA_W<'_, DCFGR_SPEC, 7>
Bit 7 - Endian Swap Mode Enable for Packet Data Accesses
sourcepub fn rxbms(&mut self) -> RXBMS_W<'_, DCFGR_SPEC, 8>
pub fn rxbms(&mut self) -> RXBMS_W<'_, DCFGR_SPEC, 8>
Bits 8:9 - Receiver Packet Buffer Memory Size Select
sourcepub fn txpbms(&mut self) -> TXPBMS_W<'_, DCFGR_SPEC, 10>
pub fn txpbms(&mut self) -> TXPBMS_W<'_, DCFGR_SPEC, 10>
Bit 10 - Transmitter Packet Buffer Memory Size Select
sourcepub fn txcoen(&mut self) -> TXCOEN_W<'_, DCFGR_SPEC, 11>
pub fn txcoen(&mut self) -> TXCOEN_W<'_, DCFGR_SPEC, 11>
Bit 11 - Transmitter Checksum Generation Offload Enable
sourcepub fn drbs(&mut self) -> DRBS_W<'_, DCFGR_SPEC, 16>
pub fn drbs(&mut self) -> DRBS_W<'_, DCFGR_SPEC, 16>
Bits 16:23 - DMA Receive Buffer Size
sourcepub fn ddrp(&mut self) -> DDRP_W<'_, DCFGR_SPEC, 24>
pub fn ddrp(&mut self) -> DDRP_W<'_, DCFGR_SPEC, 24>
Bit 24 - DMA Discard Receive Packets