Struct atsame53n::etm::RegisterBlock

source · 
#[repr(C)]
pub struct RegisterBlock {
Show 40 fields
    pub cr: CR,
    pub ccr: CCR,
    pub trigger: TRIGGER,
    pub sr: SR,
    pub scr: SCR,
    pub teevr: TEEVR,
    pub tecr1: TECR1,
    pub fflr: FFLR,
    pub cntrldvr1: CNTRLDVR1,
    pub syncfr: SYNCFR,
    pub idr: IDR,
    pub ccer: CCER,
    pub tesseicr: TESSEICR,
    pub tsevt: TSEVT,
    pub traceidr: TRACEIDR,
    pub idr2: IDR2,
    pub pdsr: PDSR,
    pub itmiscin: ITMISCIN,
    pub ittrigout: ITTRIGOUT,
    pub itatbctr2: ITATBCTR2,
    pub itatbctr0: ITATBCTR0,
    pub itctrl: ITCTRL,
    pub claimset: CLAIMSET,
    pub claimclr: CLAIMCLR,
    pub lar: LAR,
    pub lsr: LSR,
    pub authstatus: AUTHSTATUS,
    pub devtype: DEVTYPE,
    pub pidr4: PIDR4,
    pub pidr5: PIDR5,
    pub pidr6: PIDR6,
    pub pidr7: PIDR7,
    pub pidr0: PIDR0,
    pub pidr1: PIDR1,
    pub pidr2: PIDR2,
    pub pidr3: PIDR3,
    pub cidr0: CIDR0,
    pub cidr1: CIDR1,
    pub cidr2: CIDR2,
    pub cidr3: CIDR3,
    /* private fields */

}
Expand description

Register block

Fields§

§cr: CR

0x00 - ETM Main Control Register

§ccr: CCR

0x04 - ETM Configuration Code Register

§trigger: TRIGGER

0x08 - ETM Trigger Event Register

§sr: SR

0x10 - ETM Status Register

§scr: SCR

0x14 - ETM System Configuration Register

§teevr: TEEVR

0x20 - ETM TraceEnable Event Register

§tecr1: TECR1

0x24 - ETM TraceEnable Control 1 Register

§fflr: FFLR

0x28 - ETM FIFO Full Level Register

§cntrldvr1: CNTRLDVR1

0x140 - ETM Free-running Counter Reload Value

§syncfr: SYNCFR

0x1e0 - ETM Synchronization Frequency Register

§idr: IDR

0x1e4 - ETM ID Register

§ccer: CCER

0x1e8 - ETM Configuration Code Extension Register

§tesseicr: TESSEICR

0x1f0 - ETM TraceEnable Start/Stop EmbeddedICE Control Register

§tsevt: TSEVT

0x1f8 - ETM TimeStamp Event Register

§traceidr: TRACEIDR

0x200 - ETM CoreSight Trace ID Register

§idr2: IDR2

0x208 - ETM ID Register 2

§pdsr: PDSR

0x314 - ETM Device Power-Down Status Register

§itmiscin: ITMISCIN

0xee0 - ETM Integration Test Miscellaneous Inputs

§ittrigout: ITTRIGOUT

0xee8 - ETM Integration Test Trigger Out

§itatbctr2: ITATBCTR2

0xef0 - ETM Integration Test ATB Control 2

§itatbctr0: ITATBCTR0

0xef8 - ETM Integration Test ATB Control 0

§itctrl: ITCTRL

0xf00 - ETM Integration Mode Control Register

§claimset: CLAIMSET

0xfa0 - ETM Claim Tag Set Register

§claimclr: CLAIMCLR

0xfa4 - ETM Claim Tag Clear Register

§lar: LAR

0xfb0 - ETM Lock Access Register

§lsr: LSR

0xfb4 - ETM Lock Status Register

§authstatus: AUTHSTATUS

0xfb8 - ETM Authentication Status Register

§devtype: DEVTYPE

0xfcc - ETM CoreSight Device Type Register

§pidr4: PIDR4

0xfd0 - ETM Peripheral Identification Register #4

§pidr5: PIDR5

0xfd4 - ETM Peripheral Identification Register #5

§pidr6: PIDR6

0xfd8 - ETM Peripheral Identification Register #6

§pidr7: PIDR7

0xfdc - ETM Peripheral Identification Register #7

§pidr0: PIDR0

0xfe0 - ETM Peripheral Identification Register #0

§pidr1: PIDR1

0xfe4 - ETM Peripheral Identification Register #1

§pidr2: PIDR2

0xfe8 - ETM Peripheral Identification Register #2

§pidr3: PIDR3

0xfec - ETM Peripheral Identification Register #3

§cidr0: CIDR0

0xff0 - ETM Component Identification Register #0

§cidr1: CIDR1

0xff4 - ETM Component Identification Register #1

§cidr2: CIDR2

0xff8 - ETM Component Identification Register #2

§cidr3: CIDR3

0xffc - ETM Component Identification Register #3

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