Module atsame51j::sdhc0

SD/MMC Host Controller

Modules

• acesr
  Auto CMD Error Status
• acr
  AHB Control
• aesr
  ADMA Error Status
• arg1r
  Argument 1
• asar
  ADMA System Address n
• bcr
  Block Count
• bdpr
  Buffer Data Port
• bgcr
  Block Gap Control
• bgcr_emmc_mode
  Block Gap Control
• bsr
  Block Size
• ca0r
  Capabilities 0
• ca1r
  Capabilities 1
• cacr
  Capabilities Control
• cc2r
  Clock Control 2
• ccr
  Clock Control
• cr
  Command
• dbgr
  Debug
• eisier
  Error Interrupt Signal Enable
• eisier_emmc_mode
  Error Interrupt Signal Enable
• eister
  Error Interrupt Status Enable
• eister_emmc_mode
  Error Interrupt Status Enable
• eistr
  Error Interrupt Status
• eistr_emmc_mode
  Error Interrupt Status
• feraces
  Force Event for Auto CMD Error Status
• fereis
  Force Event for Error Interrupt Status
• hc1r
  Host Control 1
• hc1r_emmc_mode
  Host Control 1
• hc2r
  Host Control 2
• hc2r_emmc_mode
  Host Control 2
• hcvr
  Host Controller Version
• mc1r
  MMC Control 1
• mc2r
  MMC Control 2
• mccar
  Maximum Current Capabilities
• nisier
  Normal Interrupt Signal Enable
• nisier_emmc_mode
  Normal Interrupt Signal Enable
• nister
  Normal Interrupt Status Enable
• nister_emmc_mode
  Normal Interrupt Status Enable
• nistr
  Normal Interrupt Status
• nistr_emmc_mode
  Normal Interrupt Status
• pcr
  Power Control
• psr
  Present State
• pvr
  Preset Value n
• rr
  Response
• sisr
  Slot Interrupt Status
• srr
  Software Reset
• ssar
  SDMA System Address / Argument 2
• ssar_cmd23_mode
  SDMA System Address / Argument 2
• tcr
  Timeout Control
• tmr
  Transfer Mode
• wcr
  Wakeup Control

Structs

• RegisterBlock
  Register block

Type Aliases

• ACESR
  ACESR (r) register accessor: Auto CMD Error Status
• ACR
  ACR (rw) register accessor: AHB Control
• AESR
  AESR (r) register accessor: ADMA Error Status
• ARG1R
  ARG1R (rw) register accessor: Argument 1
• ASAR
  ASAR (rw) register accessor: ADMA System Address n
• BCR
  BCR (rw) register accessor: Block Count
• BDPR
  BDPR (rw) register accessor: Buffer Data Port
• BGCR
  BGCR (rw) register accessor: Block Gap Control
• BGCR_EMMC_MODE
  BGCR_EMMC_MODE (rw) register accessor: Block Gap Control
• BSR
  BSR (rw) register accessor: Block Size
• CA0R
  CA0R (r) register accessor: Capabilities 0
• CA1R
  CA1R (r) register accessor: Capabilities 1
• CACR
  CACR (rw) register accessor: Capabilities Control
• CC2R
  CC2R (rw) register accessor: Clock Control 2
• CCR
  CCR (rw) register accessor: Clock Control
• CR
  CR (rw) register accessor: Command
• DBGR
  DBGR (rw) register accessor: Debug
• EISIER
  EISIER (rw) register accessor: Error Interrupt Signal Enable
• EISIER_EMMC_MODE
  EISIER_EMMC_MODE (rw) register accessor: Error Interrupt Signal Enable
• EISTER
  EISTER (rw) register accessor: Error Interrupt Status Enable
• EISTER_EMMC_MODE
  EISTER_EMMC_MODE (rw) register accessor: Error Interrupt Status Enable
• EISTR
  EISTR (rw) register accessor: Error Interrupt Status
• EISTR_EMMC_MODE
  EISTR_EMMC_MODE (rw) register accessor: Error Interrupt Status
• FERACES
  FERACES (w) register accessor: Force Event for Auto CMD Error Status
• FEREIS
  FEREIS (w) register accessor: Force Event for Error Interrupt Status
• HC1R
  HC1R (rw) register accessor: Host Control 1
• HC1R_EMMC_MODE
  HC1R_EMMC_MODE (rw) register accessor: Host Control 1
• HC2R
  HC2R (rw) register accessor: Host Control 2
• HC2R_EMMC_MODE
  HC2R_EMMC_MODE (rw) register accessor: Host Control 2
• HCVR
  HCVR (r) register accessor: Host Controller Version
• MC1R
  MC1R (rw) register accessor: MMC Control 1
• MC2R
  MC2R (w) register accessor: MMC Control 2
• MCCAR
  MCCAR (r) register accessor: Maximum Current Capabilities
• NISIER
  NISIER (rw) register accessor: Normal Interrupt Signal Enable
• NISIER_EMMC_MODE
  NISIER_EMMC_MODE (rw) register accessor: Normal Interrupt Signal Enable
• NISTER
  NISTER (rw) register accessor: Normal Interrupt Status Enable
• NISTER_EMMC_MODE
  NISTER_EMMC_MODE (rw) register accessor: Normal Interrupt Status Enable
• NISTR
  NISTR (rw) register accessor: Normal Interrupt Status
• NISTR_EMMC_MODE
  NISTR_EMMC_MODE (rw) register accessor: Normal Interrupt Status
• PCR
  PCR (rw) register accessor: Power Control
• PSR
  PSR (r) register accessor: Present State
• PVR
  PVR (rw) register accessor: Preset Value n
• RR
  RR (r) register accessor: Response
• SISR
  SISR (r) register accessor: Slot Interrupt Status
• SRR
  SRR (rw) register accessor: Software Reset
• SSAR
  SSAR (rw) register accessor: SDMA System Address / Argument 2
• SSAR_CMD23_MODE
  SSAR_CMD23_MODE (rw) register accessor: SDMA System Address / Argument 2
• TCR
  TCR (rw) register accessor: Timeout Control
• TMR
  TMR (rw) register accessor: Transfer Mode
• WCR
  WCR (rw) register accessor: Wakeup Control