Type Alias atsame51g::pdec::ctrla::W

pub type W = W<CTRLA_SPEC>;

Register CTRLA writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn swrst(&mut self) -> SWRST_W<'_, CTRLA_SPEC, 0>

Bit 0 - Software Reset

pub fn enable(&mut self) -> ENABLE_W<'_, CTRLA_SPEC, 1>

Bit 1 - Enable

pub fn mode(&mut self) -> MODE_W<'_, CTRLA_SPEC, 2>

Bits 2:3 - Operation Mode

pub fn runstdby(&mut self) -> RUNSTDBY_W<'_, CTRLA_SPEC, 6>

Bit 6 - Run in Standby

pub fn conf(&mut self) -> CONF_W<'_, CTRLA_SPEC, 8>

Bits 8:10 - PDEC Configuration

pub fn alock(&mut self) -> ALOCK_W<'_, CTRLA_SPEC, 11>

Bit 11 - Auto Lock

pub fn swap(&mut self) -> SWAP_W<'_, CTRLA_SPEC, 14>

Bit 14 - PDEC Phase A and B Swap

pub fn peren(&mut self) -> PEREN_W<'_, CTRLA_SPEC, 15>

Bit 15 - Period Enable

pub fn pinen0(&mut self) -> PINEN0_W<'_, CTRLA_SPEC, 16>

Bit 16 - PDEC Input From Pin 0 Enable

pub fn pinen1(&mut self) -> PINEN1_W<'_, CTRLA_SPEC, 17>

Bit 17 - PDEC Input From Pin 1 Enable

pub fn pinen2(&mut self) -> PINEN2_W<'_, CTRLA_SPEC, 18>

Bit 18 - PDEC Input From Pin 2 Enable

pub fn pinven0(&mut self) -> PINVEN0_W<'_, CTRLA_SPEC, 20>

Bit 20 - IO Pin 0 Invert Enable

pub fn pinven1(&mut self) -> PINVEN1_W<'_, CTRLA_SPEC, 21>

Bit 21 - IO Pin 1 Invert Enable

pub fn pinven2(&mut self) -> PINVEN2_W<'_, CTRLA_SPEC, 22>

Bit 22 - IO Pin 2 Invert Enable

pub fn angular(&mut self) -> ANGULAR_W<'_, CTRLA_SPEC, 24>

Bits 24:26 - Angular Counter Length

pub fn maxcmp(&mut self) -> MAXCMP_W<'_, CTRLA_SPEC, 28>

Bits 28:31 - Maximum Consecutive Missing Pulses

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Safety

Passing incorrect value can cause undefined behaviour. See reference manual