atsamd51n20a/nvmctrl/
ctrla.rs

1#[doc = "Reader of register CTRLA"]
2pub type R = crate::R<u16, super::CTRLA>;
3#[doc = "Writer for register CTRLA"]
4pub type W = crate::W<u16, super::CTRLA>;
5#[doc = "Register CTRLA `reset()`'s with value 0x04"]
6impl crate::ResetValue for super::CTRLA {
7    type Type = u16;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x04
11    }
12}
13#[doc = "Reader of field `AUTOWS`"]
14pub type AUTOWS_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `AUTOWS`"]
16pub struct AUTOWS_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> AUTOWS_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u16) & 0x01) << 2);
34        self.w
35    }
36}
37#[doc = "Reader of field `SUSPEN`"]
38pub type SUSPEN_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `SUSPEN`"]
40pub struct SUSPEN_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> SUSPEN_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u16) & 0x01) << 3);
58        self.w
59    }
60}
61#[doc = "Write Mode\n\nValue on reset: 0"]
62#[derive(Clone, Copy, Debug, PartialEq)]
63#[repr(u8)]
64pub enum WMODE_A {
65    #[doc = "0: Manual Write"]
66    MAN = 0,
67    #[doc = "1: Automatic Double Word Write"]
68    ADW = 1,
69    #[doc = "2: Automatic Quad Word"]
70    AQW = 2,
71    #[doc = "3: Automatic Page Write"]
72    AP = 3,
73}
74impl From<WMODE_A> for u8 {
75    #[inline(always)]
76    fn from(variant: WMODE_A) -> Self {
77        variant as _
78    }
79}
80#[doc = "Reader of field `WMODE`"]
81pub type WMODE_R = crate::R<u8, WMODE_A>;
82impl WMODE_R {
83    #[doc = r"Get enumerated values variant"]
84    #[inline(always)]
85    pub fn variant(&self) -> WMODE_A {
86        match self.bits {
87            0 => WMODE_A::MAN,
88            1 => WMODE_A::ADW,
89            2 => WMODE_A::AQW,
90            3 => WMODE_A::AP,
91            _ => unreachable!(),
92        }
93    }
94    #[doc = "Checks if the value of the field is `MAN`"]
95    #[inline(always)]
96    pub fn is_man(&self) -> bool {
97        *self == WMODE_A::MAN
98    }
99    #[doc = "Checks if the value of the field is `ADW`"]
100    #[inline(always)]
101    pub fn is_adw(&self) -> bool {
102        *self == WMODE_A::ADW
103    }
104    #[doc = "Checks if the value of the field is `AQW`"]
105    #[inline(always)]
106    pub fn is_aqw(&self) -> bool {
107        *self == WMODE_A::AQW
108    }
109    #[doc = "Checks if the value of the field is `AP`"]
110    #[inline(always)]
111    pub fn is_ap(&self) -> bool {
112        *self == WMODE_A::AP
113    }
114}
115#[doc = "Write proxy for field `WMODE`"]
116pub struct WMODE_W<'a> {
117    w: &'a mut W,
118}
119impl<'a> WMODE_W<'a> {
120    #[doc = r"Writes `variant` to the field"]
121    #[inline(always)]
122    pub fn variant(self, variant: WMODE_A) -> &'a mut W {
123        {
124            self.bits(variant.into())
125        }
126    }
127    #[doc = "Manual Write"]
128    #[inline(always)]
129    pub fn man(self) -> &'a mut W {
130        self.variant(WMODE_A::MAN)
131    }
132    #[doc = "Automatic Double Word Write"]
133    #[inline(always)]
134    pub fn adw(self) -> &'a mut W {
135        self.variant(WMODE_A::ADW)
136    }
137    #[doc = "Automatic Quad Word"]
138    #[inline(always)]
139    pub fn aqw(self) -> &'a mut W {
140        self.variant(WMODE_A::AQW)
141    }
142    #[doc = "Automatic Page Write"]
143    #[inline(always)]
144    pub fn ap(self) -> &'a mut W {
145        self.variant(WMODE_A::AP)
146    }
147    #[doc = r"Writes raw bits to the field"]
148    #[inline(always)]
149    pub fn bits(self, value: u8) -> &'a mut W {
150        self.w.bits = (self.w.bits & !(0x03 << 4)) | (((value as u16) & 0x03) << 4);
151        self.w
152    }
153}
154#[doc = "Power Reduction Mode during Sleep\n\nValue on reset: 0"]
155#[derive(Clone, Copy, Debug, PartialEq)]
156#[repr(u8)]
157pub enum PRM_A {
158    #[doc = "0: NVM block enters low-power mode when entering standby mode. NVM block enters low-power mode when SPRM command is issued. NVM block exits low-power mode upon first access."]
159    SEMIAUTO = 0,
160    #[doc = "1: NVM block enters low-power mode when entering standby mode. NVM block enters low-power mode when SPRM command is issued. NVM block exits low-power mode when system is not in standby mode."]
161    FULLAUTO = 1,
162    #[doc = "3: NVM block does not enter low-power mode when entering standby mode. NVM block enters low-power mode when SPRM command is issued. NVM block exits low-power mode upon first access."]
163    MANUAL = 3,
164}
165impl From<PRM_A> for u8 {
166    #[inline(always)]
167    fn from(variant: PRM_A) -> Self {
168        variant as _
169    }
170}
171#[doc = "Reader of field `PRM`"]
172pub type PRM_R = crate::R<u8, PRM_A>;
173impl PRM_R {
174    #[doc = r"Get enumerated values variant"]
175    #[inline(always)]
176    pub fn variant(&self) -> crate::Variant<u8, PRM_A> {
177        use crate::Variant::*;
178        match self.bits {
179            0 => Val(PRM_A::SEMIAUTO),
180            1 => Val(PRM_A::FULLAUTO),
181            3 => Val(PRM_A::MANUAL),
182            i => Res(i),
183        }
184    }
185    #[doc = "Checks if the value of the field is `SEMIAUTO`"]
186    #[inline(always)]
187    pub fn is_semiauto(&self) -> bool {
188        *self == PRM_A::SEMIAUTO
189    }
190    #[doc = "Checks if the value of the field is `FULLAUTO`"]
191    #[inline(always)]
192    pub fn is_fullauto(&self) -> bool {
193        *self == PRM_A::FULLAUTO
194    }
195    #[doc = "Checks if the value of the field is `MANUAL`"]
196    #[inline(always)]
197    pub fn is_manual(&self) -> bool {
198        *self == PRM_A::MANUAL
199    }
200}
201#[doc = "Write proxy for field `PRM`"]
202pub struct PRM_W<'a> {
203    w: &'a mut W,
204}
205impl<'a> PRM_W<'a> {
206    #[doc = r"Writes `variant` to the field"]
207    #[inline(always)]
208    pub fn variant(self, variant: PRM_A) -> &'a mut W {
209        unsafe { self.bits(variant.into()) }
210    }
211    #[doc = "NVM block enters low-power mode when entering standby mode. NVM block enters low-power mode when SPRM command is issued. NVM block exits low-power mode upon first access."]
212    #[inline(always)]
213    pub fn semiauto(self) -> &'a mut W {
214        self.variant(PRM_A::SEMIAUTO)
215    }
216    #[doc = "NVM block enters low-power mode when entering standby mode. NVM block enters low-power mode when SPRM command is issued. NVM block exits low-power mode when system is not in standby mode."]
217    #[inline(always)]
218    pub fn fullauto(self) -> &'a mut W {
219        self.variant(PRM_A::FULLAUTO)
220    }
221    #[doc = "NVM block does not enter low-power mode when entering standby mode. NVM block enters low-power mode when SPRM command is issued. NVM block exits low-power mode upon first access."]
222    #[inline(always)]
223    pub fn manual(self) -> &'a mut W {
224        self.variant(PRM_A::MANUAL)
225    }
226    #[doc = r"Writes raw bits to the field"]
227    #[inline(always)]
228    pub unsafe fn bits(self, value: u8) -> &'a mut W {
229        self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u16) & 0x03) << 6);
230        self.w
231    }
232}
233#[doc = "Reader of field `RWS`"]
234pub type RWS_R = crate::R<u8, u8>;
235#[doc = "Write proxy for field `RWS`"]
236pub struct RWS_W<'a> {
237    w: &'a mut W,
238}
239impl<'a> RWS_W<'a> {
240    #[doc = r"Writes raw bits to the field"]
241    #[inline(always)]
242    pub unsafe fn bits(self, value: u8) -> &'a mut W {
243        self.w.bits = (self.w.bits & !(0x0f << 8)) | (((value as u16) & 0x0f) << 8);
244        self.w
245    }
246}
247#[doc = "Reader of field `AHBNS0`"]
248pub type AHBNS0_R = crate::R<bool, bool>;
249#[doc = "Write proxy for field `AHBNS0`"]
250pub struct AHBNS0_W<'a> {
251    w: &'a mut W,
252}
253impl<'a> AHBNS0_W<'a> {
254    #[doc = r"Sets the field bit"]
255    #[inline(always)]
256    pub fn set_bit(self) -> &'a mut W {
257        self.bit(true)
258    }
259    #[doc = r"Clears the field bit"]
260    #[inline(always)]
261    pub fn clear_bit(self) -> &'a mut W {
262        self.bit(false)
263    }
264    #[doc = r"Writes raw bits to the field"]
265    #[inline(always)]
266    pub fn bit(self, value: bool) -> &'a mut W {
267        self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u16) & 0x01) << 12);
268        self.w
269    }
270}
271#[doc = "Reader of field `AHBNS1`"]
272pub type AHBNS1_R = crate::R<bool, bool>;
273#[doc = "Write proxy for field `AHBNS1`"]
274pub struct AHBNS1_W<'a> {
275    w: &'a mut W,
276}
277impl<'a> AHBNS1_W<'a> {
278    #[doc = r"Sets the field bit"]
279    #[inline(always)]
280    pub fn set_bit(self) -> &'a mut W {
281        self.bit(true)
282    }
283    #[doc = r"Clears the field bit"]
284    #[inline(always)]
285    pub fn clear_bit(self) -> &'a mut W {
286        self.bit(false)
287    }
288    #[doc = r"Writes raw bits to the field"]
289    #[inline(always)]
290    pub fn bit(self, value: bool) -> &'a mut W {
291        self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u16) & 0x01) << 13);
292        self.w
293    }
294}
295#[doc = "Reader of field `CACHEDIS0`"]
296pub type CACHEDIS0_R = crate::R<bool, bool>;
297#[doc = "Write proxy for field `CACHEDIS0`"]
298pub struct CACHEDIS0_W<'a> {
299    w: &'a mut W,
300}
301impl<'a> CACHEDIS0_W<'a> {
302    #[doc = r"Sets the field bit"]
303    #[inline(always)]
304    pub fn set_bit(self) -> &'a mut W {
305        self.bit(true)
306    }
307    #[doc = r"Clears the field bit"]
308    #[inline(always)]
309    pub fn clear_bit(self) -> &'a mut W {
310        self.bit(false)
311    }
312    #[doc = r"Writes raw bits to the field"]
313    #[inline(always)]
314    pub fn bit(self, value: bool) -> &'a mut W {
315        self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u16) & 0x01) << 14);
316        self.w
317    }
318}
319#[doc = "Reader of field `CACHEDIS1`"]
320pub type CACHEDIS1_R = crate::R<bool, bool>;
321#[doc = "Write proxy for field `CACHEDIS1`"]
322pub struct CACHEDIS1_W<'a> {
323    w: &'a mut W,
324}
325impl<'a> CACHEDIS1_W<'a> {
326    #[doc = r"Sets the field bit"]
327    #[inline(always)]
328    pub fn set_bit(self) -> &'a mut W {
329        self.bit(true)
330    }
331    #[doc = r"Clears the field bit"]
332    #[inline(always)]
333    pub fn clear_bit(self) -> &'a mut W {
334        self.bit(false)
335    }
336    #[doc = r"Writes raw bits to the field"]
337    #[inline(always)]
338    pub fn bit(self, value: bool) -> &'a mut W {
339        self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u16) & 0x01) << 15);
340        self.w
341    }
342}
343impl R {
344    #[doc = "Bit 2 - Auto Wait State Enable"]
345    #[inline(always)]
346    pub fn autows(&self) -> AUTOWS_R {
347        AUTOWS_R::new(((self.bits >> 2) & 0x01) != 0)
348    }
349    #[doc = "Bit 3 - Suspend Enable"]
350    #[inline(always)]
351    pub fn suspen(&self) -> SUSPEN_R {
352        SUSPEN_R::new(((self.bits >> 3) & 0x01) != 0)
353    }
354    #[doc = "Bits 4:5 - Write Mode"]
355    #[inline(always)]
356    pub fn wmode(&self) -> WMODE_R {
357        WMODE_R::new(((self.bits >> 4) & 0x03) as u8)
358    }
359    #[doc = "Bits 6:7 - Power Reduction Mode during Sleep"]
360    #[inline(always)]
361    pub fn prm(&self) -> PRM_R {
362        PRM_R::new(((self.bits >> 6) & 0x03) as u8)
363    }
364    #[doc = "Bits 8:11 - NVM Read Wait States"]
365    #[inline(always)]
366    pub fn rws(&self) -> RWS_R {
367        RWS_R::new(((self.bits >> 8) & 0x0f) as u8)
368    }
369    #[doc = "Bit 12 - Force AHB0 access to NONSEQ, burst transfers are continuously rearbitrated"]
370    #[inline(always)]
371    pub fn ahbns0(&self) -> AHBNS0_R {
372        AHBNS0_R::new(((self.bits >> 12) & 0x01) != 0)
373    }
374    #[doc = "Bit 13 - Force AHB1 access to NONSEQ, burst transfers are continuously rearbitrated"]
375    #[inline(always)]
376    pub fn ahbns1(&self) -> AHBNS1_R {
377        AHBNS1_R::new(((self.bits >> 13) & 0x01) != 0)
378    }
379    #[doc = "Bit 14 - AHB0 Cache Disable"]
380    #[inline(always)]
381    pub fn cachedis0(&self) -> CACHEDIS0_R {
382        CACHEDIS0_R::new(((self.bits >> 14) & 0x01) != 0)
383    }
384    #[doc = "Bit 15 - AHB1 Cache Disable"]
385    #[inline(always)]
386    pub fn cachedis1(&self) -> CACHEDIS1_R {
387        CACHEDIS1_R::new(((self.bits >> 15) & 0x01) != 0)
388    }
389}
390impl W {
391    #[doc = "Bit 2 - Auto Wait State Enable"]
392    #[inline(always)]
393    pub fn autows(&mut self) -> AUTOWS_W {
394        AUTOWS_W { w: self }
395    }
396    #[doc = "Bit 3 - Suspend Enable"]
397    #[inline(always)]
398    pub fn suspen(&mut self) -> SUSPEN_W {
399        SUSPEN_W { w: self }
400    }
401    #[doc = "Bits 4:5 - Write Mode"]
402    #[inline(always)]
403    pub fn wmode(&mut self) -> WMODE_W {
404        WMODE_W { w: self }
405    }
406    #[doc = "Bits 6:7 - Power Reduction Mode during Sleep"]
407    #[inline(always)]
408    pub fn prm(&mut self) -> PRM_W {
409        PRM_W { w: self }
410    }
411    #[doc = "Bits 8:11 - NVM Read Wait States"]
412    #[inline(always)]
413    pub fn rws(&mut self) -> RWS_W {
414        RWS_W { w: self }
415    }
416    #[doc = "Bit 12 - Force AHB0 access to NONSEQ, burst transfers are continuously rearbitrated"]
417    #[inline(always)]
418    pub fn ahbns0(&mut self) -> AHBNS0_W {
419        AHBNS0_W { w: self }
420    }
421    #[doc = "Bit 13 - Force AHB1 access to NONSEQ, burst transfers are continuously rearbitrated"]
422    #[inline(always)]
423    pub fn ahbns1(&mut self) -> AHBNS1_W {
424        AHBNS1_W { w: self }
425    }
426    #[doc = "Bit 14 - AHB0 Cache Disable"]
427    #[inline(always)]
428    pub fn cachedis0(&mut self) -> CACHEDIS0_W {
429        CACHEDIS0_W { w: self }
430    }
431    #[doc = "Bit 15 - AHB1 Cache Disable"]
432    #[inline(always)]
433    pub fn cachedis1(&mut self) -> CACHEDIS1_W {
434        CACHEDIS1_W { w: self }
435    }
436}
atsamd51n20a/nvmctrl/ctrla.rs

atsamd51n20a/nvmctrl/
ctrla.rs
