[][src]Type Definition atsamd21j18a::i2s::clkctrl::W

type W = W<u32, CLKCTRL>;

Writer for register CLKCTRL%s

Methods

impl W[src]

pub fn slotsize(&mut self) -> SLOTSIZE_W[src]

Bits 0:1 - Slot Size

pub fn nbslots(&mut self) -> NBSLOTS_W[src]

Bits 2:4 - Number of Slots in Frame

pub fn fswidth(&mut self) -> FSWIDTH_W[src]

Bits 5:6 - Frame Sync Width

pub fn bitdelay(&mut self) -> BITDELAY_W[src]

Bit 7 - Data Delay from Frame Sync

pub fn fssel(&mut self) -> FSSEL_W[src]

Bit 8 - Frame Sync Select

pub fn fsinv(&mut self) -> FSINV_W[src]

Bit 11 - Frame Sync Invert

pub fn scksel(&mut self) -> SCKSEL_W[src]

Bit 12 - Serial Clock Select

pub fn mcksel(&mut self) -> MCKSEL_W[src]

Bit 16 - Master Clock Select

pub fn mcken(&mut self) -> MCKEN_W[src]

Bit 18 - Master Clock Enable

pub fn mckdiv(&mut self) -> MCKDIV_W[src]

Bits 19:23 - Master Clock Division Factor

pub fn mckoutdiv(&mut self) -> MCKOUTDIV_W[src]

Bits 24:28 - Master Clock Output Division Factor

pub fn fsoutinv(&mut self) -> FSOUTINV_W[src]

Bit 29 - Frame Sync Output Invert

pub fn sckoutinv(&mut self) -> SCKOUTINV_W[src]

Bit 30 - Serial Clock Output Invert

pub fn mckoutinv(&mut self) -> MCKOUTINV_W[src]

Bit 31 - Master Clock Output Invert