atsamd21e18a/usb/host/
ctrlb.rs

1#[doc = "Reader of register CTRLB"]
2pub type R = crate::R<u16, super::CTRLB>;
3#[doc = "Writer for register CTRLB"]
4pub type W = crate::W<u16, super::CTRLB>;
5#[doc = "Register CTRLB `reset()`'s with value 0"]
6impl crate::ResetValue for super::CTRLB {
7    type Type = u16;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `RESUME`"]
14pub type RESUME_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `RESUME`"]
16pub struct RESUME_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> RESUME_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u16) & 0x01) << 1);
34        self.w
35    }
36}
37#[doc = "Speed Configuration for Host\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum SPDCONF_A {
41    #[doc = "0: Normal mode:the host starts in full-speed mode and performs a high-speed reset to switch to the high speed mode if the downstream peripheral is high-speed capable."]
42    NORMAL = 0,
43    #[doc = "3: Full-speed:the host remains in full-speed mode whatever is the peripheral speed capability. Relevant in UTMI mode only."]
44    FS = 3,
45}
46impl From<SPDCONF_A> for u8 {
47    #[inline(always)]
48    fn from(variant: SPDCONF_A) -> Self {
49        variant as _
50    }
51}
52#[doc = "Reader of field `SPDCONF`"]
53pub type SPDCONF_R = crate::R<u8, SPDCONF_A>;
54impl SPDCONF_R {
55    #[doc = r"Get enumerated values variant"]
56    #[inline(always)]
57    pub fn variant(&self) -> crate::Variant<u8, SPDCONF_A> {
58        use crate::Variant::*;
59        match self.bits {
60            0 => Val(SPDCONF_A::NORMAL),
61            3 => Val(SPDCONF_A::FS),
62            i => Res(i),
63        }
64    }
65    #[doc = "Checks if the value of the field is `NORMAL`"]
66    #[inline(always)]
67    pub fn is_normal(&self) -> bool {
68        *self == SPDCONF_A::NORMAL
69    }
70    #[doc = "Checks if the value of the field is `FS`"]
71    #[inline(always)]
72    pub fn is_fs(&self) -> bool {
73        *self == SPDCONF_A::FS
74    }
75}
76#[doc = "Write proxy for field `SPDCONF`"]
77pub struct SPDCONF_W<'a> {
78    w: &'a mut W,
79}
80impl<'a> SPDCONF_W<'a> {
81    #[doc = r"Writes `variant` to the field"]
82    #[inline(always)]
83    pub fn variant(self, variant: SPDCONF_A) -> &'a mut W {
84        unsafe { self.bits(variant.into()) }
85    }
86    #[doc = "Normal mode:the host starts in full-speed mode and performs a high-speed reset to switch to the high speed mode if the downstream peripheral is high-speed capable."]
87    #[inline(always)]
88    pub fn normal(self) -> &'a mut W {
89        self.variant(SPDCONF_A::NORMAL)
90    }
91    #[doc = "Full-speed:the host remains in full-speed mode whatever is the peripheral speed capability. Relevant in UTMI mode only."]
92    #[inline(always)]
93    pub fn fs(self) -> &'a mut W {
94        self.variant(SPDCONF_A::FS)
95    }
96    #[doc = r"Writes raw bits to the field"]
97    #[inline(always)]
98    pub unsafe fn bits(self, value: u8) -> &'a mut W {
99        self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u16) & 0x03) << 2);
100        self.w
101    }
102}
103#[doc = "Reader of field `TSTJ`"]
104pub type TSTJ_R = crate::R<bool, bool>;
105#[doc = "Write proxy for field `TSTJ`"]
106pub struct TSTJ_W<'a> {
107    w: &'a mut W,
108}
109impl<'a> TSTJ_W<'a> {
110    #[doc = r"Sets the field bit"]
111    #[inline(always)]
112    pub fn set_bit(self) -> &'a mut W {
113        self.bit(true)
114    }
115    #[doc = r"Clears the field bit"]
116    #[inline(always)]
117    pub fn clear_bit(self) -> &'a mut W {
118        self.bit(false)
119    }
120    #[doc = r"Writes raw bits to the field"]
121    #[inline(always)]
122    pub fn bit(self, value: bool) -> &'a mut W {
123        self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u16) & 0x01) << 5);
124        self.w
125    }
126}
127#[doc = "Reader of field `TSTK`"]
128pub type TSTK_R = crate::R<bool, bool>;
129#[doc = "Write proxy for field `TSTK`"]
130pub struct TSTK_W<'a> {
131    w: &'a mut W,
132}
133impl<'a> TSTK_W<'a> {
134    #[doc = r"Sets the field bit"]
135    #[inline(always)]
136    pub fn set_bit(self) -> &'a mut W {
137        self.bit(true)
138    }
139    #[doc = r"Clears the field bit"]
140    #[inline(always)]
141    pub fn clear_bit(self) -> &'a mut W {
142        self.bit(false)
143    }
144    #[doc = r"Writes raw bits to the field"]
145    #[inline(always)]
146    pub fn bit(self, value: bool) -> &'a mut W {
147        self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u16) & 0x01) << 6);
148        self.w
149    }
150}
151#[doc = "Reader of field `SOFE`"]
152pub type SOFE_R = crate::R<bool, bool>;
153#[doc = "Write proxy for field `SOFE`"]
154pub struct SOFE_W<'a> {
155    w: &'a mut W,
156}
157impl<'a> SOFE_W<'a> {
158    #[doc = r"Sets the field bit"]
159    #[inline(always)]
160    pub fn set_bit(self) -> &'a mut W {
161        self.bit(true)
162    }
163    #[doc = r"Clears the field bit"]
164    #[inline(always)]
165    pub fn clear_bit(self) -> &'a mut W {
166        self.bit(false)
167    }
168    #[doc = r"Writes raw bits to the field"]
169    #[inline(always)]
170    pub fn bit(self, value: bool) -> &'a mut W {
171        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u16) & 0x01) << 8);
172        self.w
173    }
174}
175#[doc = "Reader of field `BUSRESET`"]
176pub type BUSRESET_R = crate::R<bool, bool>;
177#[doc = "Write proxy for field `BUSRESET`"]
178pub struct BUSRESET_W<'a> {
179    w: &'a mut W,
180}
181impl<'a> BUSRESET_W<'a> {
182    #[doc = r"Sets the field bit"]
183    #[inline(always)]
184    pub fn set_bit(self) -> &'a mut W {
185        self.bit(true)
186    }
187    #[doc = r"Clears the field bit"]
188    #[inline(always)]
189    pub fn clear_bit(self) -> &'a mut W {
190        self.bit(false)
191    }
192    #[doc = r"Writes raw bits to the field"]
193    #[inline(always)]
194    pub fn bit(self, value: bool) -> &'a mut W {
195        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u16) & 0x01) << 9);
196        self.w
197    }
198}
199#[doc = "Reader of field `VBUSOK`"]
200pub type VBUSOK_R = crate::R<bool, bool>;
201#[doc = "Write proxy for field `VBUSOK`"]
202pub struct VBUSOK_W<'a> {
203    w: &'a mut W,
204}
205impl<'a> VBUSOK_W<'a> {
206    #[doc = r"Sets the field bit"]
207    #[inline(always)]
208    pub fn set_bit(self) -> &'a mut W {
209        self.bit(true)
210    }
211    #[doc = r"Clears the field bit"]
212    #[inline(always)]
213    pub fn clear_bit(self) -> &'a mut W {
214        self.bit(false)
215    }
216    #[doc = r"Writes raw bits to the field"]
217    #[inline(always)]
218    pub fn bit(self, value: bool) -> &'a mut W {
219        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u16) & 0x01) << 10);
220        self.w
221    }
222}
223#[doc = "Reader of field `L1RESUME`"]
224pub type L1RESUME_R = crate::R<bool, bool>;
225#[doc = "Write proxy for field `L1RESUME`"]
226pub struct L1RESUME_W<'a> {
227    w: &'a mut W,
228}
229impl<'a> L1RESUME_W<'a> {
230    #[doc = r"Sets the field bit"]
231    #[inline(always)]
232    pub fn set_bit(self) -> &'a mut W {
233        self.bit(true)
234    }
235    #[doc = r"Clears the field bit"]
236    #[inline(always)]
237    pub fn clear_bit(self) -> &'a mut W {
238        self.bit(false)
239    }
240    #[doc = r"Writes raw bits to the field"]
241    #[inline(always)]
242    pub fn bit(self, value: bool) -> &'a mut W {
243        self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u16) & 0x01) << 11);
244        self.w
245    }
246}
247impl R {
248    #[doc = "Bit 1 - Send USB Resume"]
249    #[inline(always)]
250    pub fn resume(&self) -> RESUME_R {
251        RESUME_R::new(((self.bits >> 1) & 0x01) != 0)
252    }
253    #[doc = "Bits 2:3 - Speed Configuration for Host"]
254    #[inline(always)]
255    pub fn spdconf(&self) -> SPDCONF_R {
256        SPDCONF_R::new(((self.bits >> 2) & 0x03) as u8)
257    }
258    #[doc = "Bit 5 - Test mode J"]
259    #[inline(always)]
260    pub fn tstj(&self) -> TSTJ_R {
261        TSTJ_R::new(((self.bits >> 5) & 0x01) != 0)
262    }
263    #[doc = "Bit 6 - Test mode K"]
264    #[inline(always)]
265    pub fn tstk(&self) -> TSTK_R {
266        TSTK_R::new(((self.bits >> 6) & 0x01) != 0)
267    }
268    #[doc = "Bit 8 - Start of Frame Generation Enable"]
269    #[inline(always)]
270    pub fn sofe(&self) -> SOFE_R {
271        SOFE_R::new(((self.bits >> 8) & 0x01) != 0)
272    }
273    #[doc = "Bit 9 - Send USB Reset"]
274    #[inline(always)]
275    pub fn busreset(&self) -> BUSRESET_R {
276        BUSRESET_R::new(((self.bits >> 9) & 0x01) != 0)
277    }
278    #[doc = "Bit 10 - VBUS is OK"]
279    #[inline(always)]
280    pub fn vbusok(&self) -> VBUSOK_R {
281        VBUSOK_R::new(((self.bits >> 10) & 0x01) != 0)
282    }
283    #[doc = "Bit 11 - Send L1 Resume"]
284    #[inline(always)]
285    pub fn l1resume(&self) -> L1RESUME_R {
286        L1RESUME_R::new(((self.bits >> 11) & 0x01) != 0)
287    }
288}
289impl W {
290    #[doc = "Bit 1 - Send USB Resume"]
291    #[inline(always)]
292    pub fn resume(&mut self) -> RESUME_W {
293        RESUME_W { w: self }
294    }
295    #[doc = "Bits 2:3 - Speed Configuration for Host"]
296    #[inline(always)]
297    pub fn spdconf(&mut self) -> SPDCONF_W {
298        SPDCONF_W { w: self }
299    }
300    #[doc = "Bit 5 - Test mode J"]
301    #[inline(always)]
302    pub fn tstj(&mut self) -> TSTJ_W {
303        TSTJ_W { w: self }
304    }
305    #[doc = "Bit 6 - Test mode K"]
306    #[inline(always)]
307    pub fn tstk(&mut self) -> TSTK_W {
308        TSTK_W { w: self }
309    }
310    #[doc = "Bit 8 - Start of Frame Generation Enable"]
311    #[inline(always)]
312    pub fn sofe(&mut self) -> SOFE_W {
313        SOFE_W { w: self }
314    }
315    #[doc = "Bit 9 - Send USB Reset"]
316    #[inline(always)]
317    pub fn busreset(&mut self) -> BUSRESET_W {
318        BUSRESET_W { w: self }
319    }
320    #[doc = "Bit 10 - VBUS is OK"]
321    #[inline(always)]
322    pub fn vbusok(&mut self) -> VBUSOK_W {
323        VBUSOK_W { w: self }
324    }
325    #[doc = "Bit 11 - Send L1 Resume"]
326    #[inline(always)]
327    pub fn l1resume(&mut self) -> L1RESUME_W {
328        L1RESUME_W { w: self }
329    }
330}
atsamd21e18a/usb/host/ctrlb.rs

atsamd21e18a/usb/host/
ctrlb.rs
