atsamd21e18a/dmac/
intpend.rs

1#[doc = "Reader of register INTPEND"]
2pub type R = crate::R<u16, super::INTPEND>;
3#[doc = "Writer for register INTPEND"]
4pub type W = crate::W<u16, super::INTPEND>;
5#[doc = "Register INTPEND `reset()`'s with value 0"]
6impl crate::ResetValue for super::INTPEND {
7    type Type = u16;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `ID`"]
14pub type ID_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `ID`"]
16pub struct ID_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> ID_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0x0f) | ((value as u16) & 0x0f);
24        self.w
25    }
26}
27#[doc = "Reader of field `TERR`"]
28pub type TERR_R = crate::R<bool, bool>;
29#[doc = "Write proxy for field `TERR`"]
30pub struct TERR_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> TERR_W<'a> {
34    #[doc = r"Sets the field bit"]
35    #[inline(always)]
36    pub fn set_bit(self) -> &'a mut W {
37        self.bit(true)
38    }
39    #[doc = r"Clears the field bit"]
40    #[inline(always)]
41    pub fn clear_bit(self) -> &'a mut W {
42        self.bit(false)
43    }
44    #[doc = r"Writes raw bits to the field"]
45    #[inline(always)]
46    pub fn bit(self, value: bool) -> &'a mut W {
47        self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u16) & 0x01) << 8);
48        self.w
49    }
50}
51#[doc = "Reader of field `TCMPL`"]
52pub type TCMPL_R = crate::R<bool, bool>;
53#[doc = "Write proxy for field `TCMPL`"]
54pub struct TCMPL_W<'a> {
55    w: &'a mut W,
56}
57impl<'a> TCMPL_W<'a> {
58    #[doc = r"Sets the field bit"]
59    #[inline(always)]
60    pub fn set_bit(self) -> &'a mut W {
61        self.bit(true)
62    }
63    #[doc = r"Clears the field bit"]
64    #[inline(always)]
65    pub fn clear_bit(self) -> &'a mut W {
66        self.bit(false)
67    }
68    #[doc = r"Writes raw bits to the field"]
69    #[inline(always)]
70    pub fn bit(self, value: bool) -> &'a mut W {
71        self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u16) & 0x01) << 9);
72        self.w
73    }
74}
75#[doc = "Reader of field `SUSP`"]
76pub type SUSP_R = crate::R<bool, bool>;
77#[doc = "Write proxy for field `SUSP`"]
78pub struct SUSP_W<'a> {
79    w: &'a mut W,
80}
81impl<'a> SUSP_W<'a> {
82    #[doc = r"Sets the field bit"]
83    #[inline(always)]
84    pub fn set_bit(self) -> &'a mut W {
85        self.bit(true)
86    }
87    #[doc = r"Clears the field bit"]
88    #[inline(always)]
89    pub fn clear_bit(self) -> &'a mut W {
90        self.bit(false)
91    }
92    #[doc = r"Writes raw bits to the field"]
93    #[inline(always)]
94    pub fn bit(self, value: bool) -> &'a mut W {
95        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u16) & 0x01) << 10);
96        self.w
97    }
98}
99#[doc = "Reader of field `FERR`"]
100pub type FERR_R = crate::R<bool, bool>;
101#[doc = "Reader of field `BUSY`"]
102pub type BUSY_R = crate::R<bool, bool>;
103#[doc = "Reader of field `PEND`"]
104pub type PEND_R = crate::R<bool, bool>;
105impl R {
106    #[doc = "Bits 0:3 - Channel ID"]
107    #[inline(always)]
108    pub fn id(&self) -> ID_R {
109        ID_R::new((self.bits & 0x0f) as u8)
110    }
111    #[doc = "Bit 8 - Transfer Error"]
112    #[inline(always)]
113    pub fn terr(&self) -> TERR_R {
114        TERR_R::new(((self.bits >> 8) & 0x01) != 0)
115    }
116    #[doc = "Bit 9 - Transfer Complete"]
117    #[inline(always)]
118    pub fn tcmpl(&self) -> TCMPL_R {
119        TCMPL_R::new(((self.bits >> 9) & 0x01) != 0)
120    }
121    #[doc = "Bit 10 - Channel Suspend"]
122    #[inline(always)]
123    pub fn susp(&self) -> SUSP_R {
124        SUSP_R::new(((self.bits >> 10) & 0x01) != 0)
125    }
126    #[doc = "Bit 13 - Fetch Error"]
127    #[inline(always)]
128    pub fn ferr(&self) -> FERR_R {
129        FERR_R::new(((self.bits >> 13) & 0x01) != 0)
130    }
131    #[doc = "Bit 14 - Busy"]
132    #[inline(always)]
133    pub fn busy(&self) -> BUSY_R {
134        BUSY_R::new(((self.bits >> 14) & 0x01) != 0)
135    }
136    #[doc = "Bit 15 - Pending"]
137    #[inline(always)]
138    pub fn pend(&self) -> PEND_R {
139        PEND_R::new(((self.bits >> 15) & 0x01) != 0)
140    }
141}
142impl W {
143    #[doc = "Bits 0:3 - Channel ID"]
144    #[inline(always)]
145    pub fn id(&mut self) -> ID_W {
146        ID_W { w: self }
147    }
148    #[doc = "Bit 8 - Transfer Error"]
149    #[inline(always)]
150    pub fn terr(&mut self) -> TERR_W {
151        TERR_W { w: self }
152    }
153    #[doc = "Bit 9 - Transfer Complete"]
154    #[inline(always)]
155    pub fn tcmpl(&mut self) -> TCMPL_W {
156        TCMPL_W { w: self }
157    }
158    #[doc = "Bit 10 - Channel Suspend"]
159    #[inline(always)]
160    pub fn susp(&mut self) -> SUSP_W {
161        SUSP_W { w: self }
162    }
163}
atsamd21e18a/dmac/intpend.rs

atsamd21e18a/dmac/
intpend.rs
