Module atsamd21e::dmac [−][src]
Expand description
Direct Memory Access Controller
Modules
Active Channel and Levels
Descriptor Memory Section Base Address
Busy Channels
Channel Control A
Channel Control B
Channel ID
Channel Interrupt Enable Clear
Channel Interrupt Enable Set
Channel Interrupt Flag Status and Clear
Channel Status
CRC Checksum
CRC Control
CRC Data Input
CRC Status
Control
Debug Control
Interrupt Pending
Interrupt Status
Pending Channels
Priority Control 0
QOS Control
Software Trigger Control
Write-Back Memory Section Base Address
Structs
Register block
Type Definitions
Active Channel and Levels
Descriptor Memory Section Base Address
Busy Channels
Channel Control A
Channel Control B
Channel ID
Channel Interrupt Enable Clear
Channel Interrupt Enable Set
Channel Interrupt Flag Status and Clear
Channel Status
CRC Checksum
CRC Control
CRC Data Input
CRC Status
Control
Debug Control
Interrupt Pending
Interrupt Status
Pending Channels
Priority Control 0
QOS Control
Software Trigger Control
Write-Back Memory Section Base Address