[][src]Type Definition atsam4sd32c_pac::usart1::idr::W

type W = W<u32, IDR>;

Writer for register IDR

Implementations

impl W[src]

pub fn rxrdy(&mut self) -> RXRDY_W<'_>[src]

Bit 0 - RXRDY Interrupt Disable

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 1 - TXRDY Interrupt Disable

pub fn rxbrk(&mut self) -> RXBRK_W<'_>[src]

Bit 2 - Receiver Break Interrupt Disable

pub fn endrx(&mut self) -> ENDRX_W<'_>[src]

Bit 3 - End of Receive Buffer Transfer Interrupt Disable (available in all USART modes of operation)

pub fn endtx(&mut self) -> ENDTX_W<'_>[src]

Bit 4 - End of Transmit Buffer Interrupt Disable (available in all USART modes of operation)

pub fn ovre(&mut self) -> OVRE_W<'_>[src]

Bit 5 - Overrun Error Interrupt Enable

pub fn frame(&mut self) -> FRAME_W<'_>[src]

Bit 6 - Framing Error Interrupt Disable

pub fn pare(&mut self) -> PARE_W<'_>[src]

Bit 7 - Parity Error Interrupt Disable

pub fn timeout(&mut self) -> TIMEOUT_W<'_>[src]

Bit 8 - Time-out Interrupt Disable

pub fn txempty(&mut self) -> TXEMPTY_W<'_>[src]

Bit 9 - TXEMPTY Interrupt Disable

pub fn iter(&mut self) -> ITER_W<'_>[src]

Bit 10 - Max Number of Repetitions Reached Interrupt Disable

pub fn txbufe(&mut self) -> TXBUFE_W<'_>[src]

Bit 11 - Transmit Buffer Empty Interrupt Disable (available in all USART modes of operation)

pub fn rxbuff(&mut self) -> RXBUFF_W<'_>[src]

Bit 12 - Receive Buffer Full Interrupt Disable (available in all USART modes of operation)

pub fn nack(&mut self) -> NACK_W<'_>[src]

Bit 13 - Non Acknowledge Interrupt Disable

pub fn riic(&mut self) -> RIIC_W<'_>[src]

Bit 16 - Ring Indicator Input Change Disable

pub fn dsric(&mut self) -> DSRIC_W<'_>[src]

Bit 17 - Data Set Ready Input Change Disable

pub fn dcdic(&mut self) -> DCDIC_W<'_>[src]

Bit 18 - Data Carrier Detect Input Change Interrupt Disable

pub fn ctsic(&mut self) -> CTSIC_W<'_>[src]

Bit 19 - Clear to Send Input Change Interrupt Disable

pub fn mane(&mut self) -> MANE_W<'_>[src]

Bit 24 - Manchester Error Interrupt Disable