[][src]Type Definition atsam4sd32c_pac::hsmci::ier::W

type W = W<u32, IER>;

Writer for register IER

Implementations

impl W[src]

pub fn cmdrdy(&mut self) -> CMDRDY_W<'_>[src]

Bit 0 - Command Ready Interrupt Enable

pub fn rxrdy(&mut self) -> RXRDY_W<'_>[src]

Bit 1 - Receiver Ready Interrupt Enable

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 2 - Transmit Ready Interrupt Enable

pub fn blke(&mut self) -> BLKE_W<'_>[src]

Bit 3 - Data Block Ended Interrupt Enable

pub fn dtip(&mut self) -> DTIP_W<'_>[src]

Bit 4 - Data Transfer in Progress Interrupt Enable

pub fn notbusy(&mut self) -> NOTBUSY_W<'_>[src]

Bit 5 - Data Not Busy Interrupt Enable

pub fn endrx(&mut self) -> ENDRX_W<'_>[src]

Bit 6 - End of Receive Buffer Interrupt Enable

pub fn endtx(&mut self) -> ENDTX_W<'_>[src]

Bit 7 - End of Transmit Buffer Interrupt Enable

pub fn sdioirqa(&mut self) -> SDIOIRQA_W<'_>[src]

Bit 8 - SDIO Interrupt for Slot A Interrupt Enable

pub fn sdiowait(&mut self) -> SDIOWAIT_W<'_>[src]

Bit 12 - SDIO Read Wait Operation Status Interrupt Enable

pub fn csrcv(&mut self) -> CSRCV_W<'_>[src]

Bit 13 - Completion Signal Received Interrupt Enable

pub fn rxbuff(&mut self) -> RXBUFF_W<'_>[src]

Bit 14 - Receive Buffer Full Interrupt Enable

pub fn txbufe(&mut self) -> TXBUFE_W<'_>[src]

Bit 15 - Transmit Buffer Empty Interrupt Enable

pub fn rinde(&mut self) -> RINDE_W<'_>[src]

Bit 16 - Response Index Error Interrupt Enable

pub fn rdire(&mut self) -> RDIRE_W<'_>[src]

Bit 17 - Response Direction Error Interrupt Enable

pub fn rcrce(&mut self) -> RCRCE_W<'_>[src]

Bit 18 - Response CRC Error Interrupt Enable

pub fn rende(&mut self) -> RENDE_W<'_>[src]

Bit 19 - Response End Bit Error Interrupt Enable

pub fn rtoe(&mut self) -> RTOE_W<'_>[src]

Bit 20 - Response Time-out Error Interrupt Enable

pub fn dcrce(&mut self) -> DCRCE_W<'_>[src]

Bit 21 - Data CRC Error Interrupt Enable

pub fn dtoe(&mut self) -> DTOE_W<'_>[src]

Bit 22 - Data Time-out Error Interrupt Enable

pub fn cstoe(&mut self) -> CSTOE_W<'_>[src]

Bit 23 - Completion Signal Timeout Error Interrupt Enable

pub fn fifoempty(&mut self) -> FIFOEMPTY_W<'_>[src]

Bit 26 - FIFO empty Interrupt enable

pub fn xfrdone(&mut self) -> XFRDONE_W<'_>[src]

Bit 27 - Transfer Done Interrupt enable

pub fn ackrcv(&mut self) -> ACKRCV_W<'_>[src]

Bit 28 - Boot Acknowledge Interrupt Enable

pub fn ackrcve(&mut self) -> ACKRCVE_W<'_>[src]

Bit 29 - Boot Acknowledge Error Interrupt Enable

pub fn ovre(&mut self) -> OVRE_W<'_>[src]

Bit 30 - Overrun Interrupt Enable

pub fn unre(&mut self) -> UNRE_W<'_>[src]

Bit 31 - Underrun Interrupt Enable