1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
#[doc = "Reader of register SR"] pub type R = crate::R<u32, super::SR>; #[doc = "Reader of field `RDRF`"] pub type RDRF_R = crate::R<bool, bool>; #[doc = "Reader of field `TDRE`"] pub type TDRE_R = crate::R<bool, bool>; #[doc = "Reader of field `MODF`"] pub type MODF_R = crate::R<bool, bool>; #[doc = "Reader of field `OVRES`"] pub type OVRES_R = crate::R<bool, bool>; #[doc = "Reader of field `ENDRX`"] pub type ENDRX_R = crate::R<bool, bool>; #[doc = "Reader of field `ENDTX`"] pub type ENDTX_R = crate::R<bool, bool>; #[doc = "Reader of field `RXBUFF`"] pub type RXBUFF_R = crate::R<bool, bool>; #[doc = "Reader of field `TXBUFE`"] pub type TXBUFE_R = crate::R<bool, bool>; #[doc = "Reader of field `NSSR`"] pub type NSSR_R = crate::R<bool, bool>; #[doc = "Reader of field `TXEMPTY`"] pub type TXEMPTY_R = crate::R<bool, bool>; #[doc = "Reader of field `UNDES`"] pub type UNDES_R = crate::R<bool, bool>; #[doc = "Reader of field `SPIENS`"] pub type SPIENS_R = crate::R<bool, bool>; impl R { #[doc = "Bit 0 - Receive Data Register Full"] #[inline(always)] pub fn rdrf(&self) -> RDRF_R { RDRF_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Transmit Data Register Empty"] #[inline(always)] pub fn tdre(&self) -> TDRE_R { TDRE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Mode Fault Error"] #[inline(always)] pub fn modf(&self) -> MODF_R { MODF_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Overrun Error Status"] #[inline(always)] pub fn ovres(&self) -> OVRES_R { OVRES_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - End of RX buffer"] #[inline(always)] pub fn endrx(&self) -> ENDRX_R { ENDRX_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - End of TX buffer"] #[inline(always)] pub fn endtx(&self) -> ENDTX_R { ENDTX_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - RX Buffer Full"] #[inline(always)] pub fn rxbuff(&self) -> RXBUFF_R { RXBUFF_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - TX Buffer Empty"] #[inline(always)] pub fn txbufe(&self) -> TXBUFE_R { TXBUFE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - NSS Rising"] #[inline(always)] pub fn nssr(&self) -> NSSR_R { NSSR_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Transmission Registers Empty"] #[inline(always)] pub fn txempty(&self) -> TXEMPTY_R { TXEMPTY_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Underrun Error Status (Slave mode Only)"] #[inline(always)] pub fn undes(&self) -> UNDES_R { UNDES_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 16 - SPI Enable Status"] #[inline(always)] pub fn spiens(&self) -> SPIENS_R { SPIENS_R::new(((self.bits >> 16) & 0x01) != 0) } }