Struct atsam4sd16c_pac::piob::RegisterBlock

source · 
#[repr(C)]
pub struct RegisterBlock {
Show 53 fields
    pub per: PER,
    pub pdr: PDR,
    pub psr: PSR,
    pub oer: OER,
    pub odr: ODR,
    pub osr: OSR,
    pub ifer: IFER,
    pub ifdr: IFDR,
    pub ifsr: IFSR,
    pub sodr: SODR,
    pub codr: CODR,
    pub odsr: ODSR,
    pub pdsr: PDSR,
    pub ier: IER,
    pub idr: IDR,
    pub imr: IMR,
    pub isr: ISR,
    pub mder: MDER,
    pub mddr: MDDR,
    pub mdsr: MDSR,
    pub pudr: PUDR,
    pub puer: PUER,
    pub pusr: PUSR,
    pub abcdsr: [ABCDSR; 2],
    pub ifscdr: IFSCDR,
    pub ifscer: IFSCER,
    pub ifscsr: IFSCSR,
    pub scdr: SCDR,
    pub ppddr: PPDDR,
    pub ppder: PPDER,
    pub ppdsr: PPDSR,
    pub ower: OWER,
    pub owdr: OWDR,
    pub owsr: OWSR,
    pub aimer: AIMER,
    pub aimdr: AIMDR,
    pub aimmr: AIMMR,
    pub esr: ESR,
    pub lsr: LSR,
    pub elsr: ELSR,
    pub fellsr: FELLSR,
    pub rehlsr: REHLSR,
    pub frlhsr: FRLHSR,
    pub locksr: LOCKSR,
    pub wpmr: WPMR,
    pub wpsr: WPSR,
    pub schmitt: SCHMITT,
    pub pcmr: PCMR,
    pub pcier: PCIER,
    pub pcidr: PCIDR,
    pub pcimr: PCIMR,
    pub pcisr: PCISR,
    pub pcrhr: PCRHR,
    /* private fields */

}
Expand description

Register block

Fields§

§per: PER

0x00 - PIO Enable Register

§pdr: PDR

0x04 - PIO Disable Register

§psr: PSR

0x08 - PIO Status Register

§oer: OER

0x10 - Output Enable Register

§odr: ODR

0x14 - Output Disable Register

§osr: OSR

0x18 - Output Status Register

§ifer: IFER

0x20 - Glitch Input Filter Enable Register

§ifdr: IFDR

0x24 - Glitch Input Filter Disable Register

§ifsr: IFSR

0x28 - Glitch Input Filter Status Register

§sodr: SODR

0x30 - Set Output Data Register

§codr: CODR

0x34 - Clear Output Data Register

§odsr: ODSR

0x38 - Output Data Status Register

§pdsr: PDSR

0x3c - Pin Data Status Register

§ier: IER

0x40 - Interrupt Enable Register

§idr: IDR

0x44 - Interrupt Disable Register

§imr: IMR

0x48 - Interrupt Mask Register

§isr: ISR

0x4c - Interrupt Status Register

§mder: MDER

0x50 - Multi-driver Enable Register

§mddr: MDDR

0x54 - Multi-driver Disable Register

§mdsr: MDSR

0x58 - Multi-driver Status Register

§pudr: PUDR

0x60 - Pull-up Disable Register

§puer: PUER

0x64 - Pull-up Enable Register

§pusr: PUSR

0x68 - Pad Pull-up Status Register

§abcdsr: [ABCDSR; 2]

0x70..0x78 - Peripheral Select Register

§ifscdr: IFSCDR

0x80 - Input Filter Slow Clock Disable Register

§ifscer: IFSCER

0x84 - Input Filter Slow Clock Enable Register

§ifscsr: IFSCSR

0x88 - Input Filter Slow Clock Status Register

§scdr: SCDR

0x8c - Slow Clock Divider Debouncing Register

§ppddr: PPDDR

0x90 - Pad Pull-down Disable Register

§ppder: PPDER

0x94 - Pad Pull-down Enable Register

§ppdsr: PPDSR

0x98 - Pad Pull-down Status Register

§ower: OWER

0xa0 - Output Write Enable

§owdr: OWDR

0xa4 - Output Write Disable

§owsr: OWSR

0xa8 - Output Write Status Register

§aimer: AIMER

0xb0 - Additional Interrupt Modes Enable Register

§aimdr: AIMDR

0xb4 - Additional Interrupt Modes Disable Register

§aimmr: AIMMR

0xb8 - Additional Interrupt Modes Mask Register

§esr: ESR

0xc0 - Edge Select Register

§lsr: LSR

0xc4 - Level Select Register

§elsr: ELSR

0xc8 - Edge/Level Status Register

§fellsr: FELLSR

0xd0 - Falling Edge/Low-Level Select Register

§rehlsr: REHLSR

0xd4 - Rising Edge/ High-Level Select Register

§frlhsr: FRLHSR

0xd8 - Fall/Rise - Low/High Status Register

§locksr: LOCKSR

0xe0 - Lock Status

§wpmr: WPMR

0xe4 - Write Protection Mode Register

§wpsr: WPSR

0xe8 - Write Protection Status Register

§schmitt: SCHMITT

0x100 - Schmitt Trigger Register

§pcmr: PCMR

0x150 - Parallel Capture Mode Register

§pcier: PCIER

0x154 - Parallel Capture Interrupt Enable Register

§pcidr: PCIDR

0x158 - Parallel Capture Interrupt Disable Register

§pcimr: PCIMR

0x15c - Parallel Capture Interrupt Mask Register

§pcisr: PCISR

0x160 - Parallel Capture Interrupt Status Register

§pcrhr: PCRHR

0x164 - Parallel Capture Reception Holding Register

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