Type Definition atsam4sd16b_pac::adc::idr::W[][src]

type W = W<u32, IDR>;

Writer for register IDR

Implementations

impl W[src]

pub fn eoc0(&mut self) -> EOC0_W<'_>[src]

Bit 0 - End of Conversion Interrupt Disable 0

pub fn eoc1(&mut self) -> EOC1_W<'_>[src]

Bit 1 - End of Conversion Interrupt Disable 1

pub fn eoc2(&mut self) -> EOC2_W<'_>[src]

Bit 2 - End of Conversion Interrupt Disable 2

pub fn eoc3(&mut self) -> EOC3_W<'_>[src]

Bit 3 - End of Conversion Interrupt Disable 3

pub fn eoc4(&mut self) -> EOC4_W<'_>[src]

Bit 4 - End of Conversion Interrupt Disable 4

pub fn eoc5(&mut self) -> EOC5_W<'_>[src]

Bit 5 - End of Conversion Interrupt Disable 5

pub fn eoc6(&mut self) -> EOC6_W<'_>[src]

Bit 6 - End of Conversion Interrupt Disable 6

pub fn eoc7(&mut self) -> EOC7_W<'_>[src]

Bit 7 - End of Conversion Interrupt Disable 7

pub fn eoc8(&mut self) -> EOC8_W<'_>[src]

Bit 8 - End of Conversion Interrupt Disable 8

pub fn eoc9(&mut self) -> EOC9_W<'_>[src]

Bit 9 - End of Conversion Interrupt Disable 9

pub fn eoc10(&mut self) -> EOC10_W<'_>[src]

Bit 10 - End of Conversion Interrupt Disable 10

pub fn eoc11(&mut self) -> EOC11_W<'_>[src]

Bit 11 - End of Conversion Interrupt Disable 11

pub fn eoc12(&mut self) -> EOC12_W<'_>[src]

Bit 12 - End of Conversion Interrupt Disable 12

pub fn eoc13(&mut self) -> EOC13_W<'_>[src]

Bit 13 - End of Conversion Interrupt Disable 13

pub fn eoc14(&mut self) -> EOC14_W<'_>[src]

Bit 14 - End of Conversion Interrupt Disable 14

pub fn eoc15(&mut self) -> EOC15_W<'_>[src]

Bit 15 - End of Conversion Interrupt Disable 15

pub fn eocal(&mut self) -> EOCAL_W<'_>[src]

Bit 23 - End of Calibration Sequence

pub fn drdy(&mut self) -> DRDY_W<'_>[src]

Bit 24 - Data Ready Interrupt Disable

pub fn govre(&mut self) -> GOVRE_W<'_>[src]

Bit 25 - General Overrun Error Interrupt Disable

pub fn compe(&mut self) -> COMPE_W<'_>[src]

Bit 26 - Comparison Event Interrupt Disable

pub fn endrx(&mut self) -> ENDRX_W<'_>[src]

Bit 27 - End of Receive Buffer Interrupt Disable

pub fn rxbuff(&mut self) -> RXBUFF_W<'_>[src]

Bit 28 - Receive Buffer Full Interrupt Disable