Struct atsam4sa16b_pac::adc::RegisterBlock[−][src]

#[repr(C)]pub struct RegisterBlock {
    pub cr: CR,
    pub mr: MR,
    pub seqr1: SEQR1,
    pub seqr2: SEQR2,
    pub cher: CHER,
    pub chdr: CHDR,
    pub chsr: CHSR,
    pub lcdr: LCDR,
    pub ier: IER,
    pub idr: IDR,
    pub imr: IMR,
    pub isr: ISR,
    pub over: OVER,
    pub emr: EMR,
    pub cwr: CWR,
    pub cgr: CGR,
    pub cor: COR,
    pub cdr: [CDR; 16],
    pub acr: ACR,
    pub wpmr: WPMR,
    pub wpsr: WPSR,
    pub rpr: RPR,
    pub rcr: RCR,
    pub rnpr: RNPR,
    pub rncr: RNCR,
    pub ptcr: PTCR,
    pub ptsr: PTSR,
    // some fields omitted
}

Register block

Fields

cr: CR

0x00 - Control Register

mr: MR

0x04 - Mode Register

seqr1: SEQR1

0x08 - Channel Sequence Register 1

seqr2: SEQR2

0x0c - Channel Sequence Register 2

cher: CHER

0x10 - Channel Enable Register

chdr: CHDR

0x14 - Channel Disable Register

chsr: CHSR

0x18 - Channel Status Register

lcdr: LCDR

0x20 - Last Converted Data Register

ier: IER

0x24 - Interrupt Enable Register

idr: IDR

0x28 - Interrupt Disable Register

imr: IMR

0x2c - Interrupt Mask Register

isr: ISR

0x30 - Interrupt Status Register

over: OVER

0x3c - Overrun Status Register

emr: EMR

0x40 - Extended Mode Register

cwr: CWR

0x44 - Compare Window Register

cgr: CGR

0x48 - Channel Gain Register

cor: COR

0x4c - Channel Offset Register

cdr: [CDR; 16]

0x50 - Channel Data Register

acr: ACR

0x94 - Analog Control Register

wpmr: WPMR

0xe4 - Write Protection Mode Register

wpsr: WPSR

0xe8 - Write Protection Status Register

rpr: RPR

0x100 - Receive Pointer Register

rcr: RCR

0x104 - Receive Counter Register

rnpr: RNPR

0x110 - Receive Next Pointer Register

rncr: RNCR

0x114 - Receive Next Counter Register

ptcr: PTCR

0x120 - Transfer Control Register

ptsr: PTSR

0x124 - Transfer Status Register

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