Struct atsam4s2a_pac::pwm::imr2::R

pub struct R(_);

Register IMR2 reader

Implementations

impl R

pub fn wrdy(&self) -> WRDY_R

Bit 0 - Write Ready for Synchronous Channels Update Interrupt Mask

pub fn endtx(&self) -> ENDTX_R

Bit 1 - PDC End of TX Buffer Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R

Bit 2 - PDC TX Buffer Empty Interrupt Mask

pub fn unre(&self) -> UNRE_R

Bit 3 - Synchronous Channels Update Underrun Error Interrupt Mask

pub fn cmpm0(&self) -> CMPM0_R

Bit 8 - Comparison 0 Match Interrupt Mask

pub fn cmpm1(&self) -> CMPM1_R

Bit 9 - Comparison 1 Match Interrupt Mask

pub fn cmpm2(&self) -> CMPM2_R

Bit 10 - Comparison 2 Match Interrupt Mask

pub fn cmpm3(&self) -> CMPM3_R

Bit 11 - Comparison 3 Match Interrupt Mask

pub fn cmpm4(&self) -> CMPM4_R

Bit 12 - Comparison 4 Match Interrupt Mask

pub fn cmpm5(&self) -> CMPM5_R

Bit 13 - Comparison 5 Match Interrupt Mask

pub fn cmpm6(&self) -> CMPM6_R

Bit 14 - Comparison 6 Match Interrupt Mask

pub fn cmpm7(&self) -> CMPM7_R

Bit 15 - Comparison 7 Match Interrupt Mask

pub fn cmpu0(&self) -> CMPU0_R

Bit 16 - Comparison 0 Update Interrupt Mask

pub fn cmpu1(&self) -> CMPU1_R

Bit 17 - Comparison 1 Update Interrupt Mask

pub fn cmpu2(&self) -> CMPU2_R

Bit 18 - Comparison 2 Update Interrupt Mask

pub fn cmpu3(&self) -> CMPU3_R

Bit 19 - Comparison 3 Update Interrupt Mask

pub fn cmpu4(&self) -> CMPU4_R

Bit 20 - Comparison 4 Update Interrupt Mask

pub fn cmpu5(&self) -> CMPU5_R

Bit 21 - Comparison 5 Update Interrupt Mask

pub fn cmpu6(&self) -> CMPU6_R

Bit 22 - Comparison 6 Update Interrupt Mask

pub fn cmpu7(&self) -> CMPU7_R

Bit 23 - Comparison 7 Update Interrupt Mask

Methods from Deref<Target = R<IMR2_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<IMR2_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<IMR2_SPEC>> for R

fn from(reader: R<IMR2_SPEC>) -> Self

Converts to this type from the input type.