Crate atsam4n8a_pac
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Peripheral access API for ATSAM4N8A microcontrollers (generated using svd2rust v0.27.2 ( ))
You can find an overview of the generated API here.
API features to be included in the next
svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open
.
Re-exports
pub use self::Interrupt as interrupt;
Modules
- Analog-to-Digital Converter
- Chip Identifier
- Embedded Flash Controller
- Common register and bit access and modify traits
- General Purpose Backup Registers
- AHB Bus Matrix
- Parallel Input/Output Controller A
- Parallel Input/Output Controller B
- Power Management Controller
- Pulse Width Modulation Controller
- Reset Controller
- Real-time Clock
- Real-time Timer
- Serial Peripheral Interface
- Supply Controller
- Timer Counter 0
- Two-wire Interface 0
- Two-wire Interface 1
- Two-wire Interface 2
- Universal Asynchronous Receiver Transmitter 0
- Universal Asynchronous Receiver Transmitter 1
- Universal Asynchronous Receiver Transmitter 2
- Universal Asynchronous Receiver Transmitter 3
- Universal Synchronous Asynchronous Receiver Transmitter 0
- Watchdog Timer
Structs
- Analog-to-Digital Converter
- Cache and branch predictor maintenance operations
- Chip Identifier
- CPUID
- Core peripherals
- Debug Control Block
- Data Watchpoint and Trace unit
- Embedded Flash Controller
- Flash Patch and Breakpoint unit
- General Purpose Backup Registers
- Instrumentation Trace Macrocell
- AHB Bus Matrix
- Memory Protection Unit
- Nested Vector Interrupt Controller
- Parallel Input/Output Controller A
- Parallel Input/Output Controller B
- Power Management Controller
- Pulse Width Modulation Controller
- All the peripherals.
- Reset Controller
- Real-time Clock
- Real-time Timer
- System Control Block
- Serial Peripheral Interface
- Supply Controller
- SysTick: System Timer
- Timer Counter 0
- Trace Port Interface Unit
- Two-wire Interface 0
- Two-wire Interface 1
- Two-wire Interface 2
- Universal Asynchronous Receiver Transmitter 0
- Universal Asynchronous Receiver Transmitter 1
- Universal Asynchronous Receiver Transmitter 2
- Universal Asynchronous Receiver Transmitter 3
- Universal Synchronous Asynchronous Receiver Transmitter 0
- Watchdog Timer
Enums
- Enumeration of all the interrupts.
Constants
- Number available in the NVIC for configuring priority