Struct atsam4n16b_pac::pmc::RegisterBlock[−][src]

#[repr(C)]pub struct RegisterBlock {
    pub pmc_scer: PMC_SCER,
    pub pmc_scdr: PMC_SCDR,
    pub pmc_scsr: PMC_SCSR,
    pub pmc_pcer0: PMC_PCER0,
    pub pmc_pcdr0: PMC_PCDR0,
    pub pmc_pcsr0: PMC_PCSR0,
    pub ckgr_mor: CKGR_MOR,
    pub ckgr_mcfr: CKGR_MCFR,
    pub ckgr_pllar: CKGR_PLLAR,
    pub pmc_mckr: PMC_MCKR,
    pub pmc_pck: [PMC_PCK; 3],
    pub pmc_ier: PMC_IER,
    pub pmc_idr: PMC_IDR,
    pub pmc_sr: PMC_SR,
    pub pmc_imr: PMC_IMR,
    pub pmc_fsmr: PMC_FSMR,
    pub pmc_fspr: PMC_FSPR,
    pub pmc_focr: PMC_FOCR,
    pub pmc_wpmr: PMC_WPMR,
    pub pmc_wpsr: PMC_WPSR,
    pub pmc_ocr: PMC_OCR,
    pub pmc_pmmr: PMC_PMMR,
    // some fields omitted
}

Register block

Fields

pmc_scer: PMC_SCER

0x00 - System Clock Enable Register

pmc_scdr: PMC_SCDR

0x04 - System Clock Disable Register

pmc_scsr: PMC_SCSR

0x08 - System Clock Status Register

pmc_pcer0: PMC_PCER0

0x10 - Peripheral Clock Enable Register 0

pmc_pcdr0: PMC_PCDR0

0x14 - Peripheral Clock Disable Register 0

pmc_pcsr0: PMC_PCSR0

0x18 - Peripheral Clock Status Register 0

ckgr_mor: CKGR_MOR

0x20 - Main Oscillator Register

ckgr_mcfr: CKGR_MCFR

0x24 - Main Clock Frequency Register

ckgr_pllar: CKGR_PLLAR

0x28 - PLLA Register

pmc_mckr: PMC_MCKR

0x30 - Master Clock Register

pmc_pck: [PMC_PCK; 3]

0x40 - Programmable Clock 0 Register

pmc_ier: PMC_IER

0x60 - Interrupt Enable Register

pmc_idr: PMC_IDR

0x64 - Interrupt Disable Register

pmc_sr: PMC_SR

0x68 - Status Register

pmc_imr: PMC_IMR

0x6c - Interrupt Mask Register

pmc_fsmr: PMC_FSMR

0x70 - Fast Start-up Mode Register

pmc_fspr: PMC_FSPR

0x74 - Fast Start-up Polarity Register

pmc_focr: PMC_FOCR

0x78 - Fault Output Clear Register

pmc_wpmr: PMC_WPMR

0xe4 - Write Protect Mode Register

pmc_wpsr: PMC_WPSR

0xe8 - Write Protect Status Register

pmc_ocr: PMC_OCR

0x110 - Oscillator Calibration Register

pmc_pmmr: PMC_PMMR

0x130 - PLL Maximum Multiplier Value Register

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