Struct atsam4ls4b_pac::generic::W[][src]

pub struct W<U, REG> { /* fields omitted */ }

Register writer.

Used as an argument to the closures in the write and modify methods of the register.

Implementations

impl<U, REG> W<U, REG>[src]

pub unsafe fn bits(&mut self, bits: U) -> &mut Self[src]

Writes raw bits to the register.

impl W<u32, Reg<u32, _CR>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Enable

pub fn swap(&mut self) -> SWAP_W<'_>[src]

Bit 1 - Swap Channels

pub fn altupr(&mut self) -> ALTUPR_W<'_>[src]

Bit 3 - Alternative up-sampling ratio

pub fn cmoc(&mut self) -> CMOC_W<'_>[src]

Bit 4 - Common mode offset control

pub fn mono(&mut self) -> MONO_W<'_>[src]

Bit 5 - Mono mode

pub fn swrst(&mut self) -> SWRST_W<'_>[src]

Bit 7 - Software reset

pub fn dataformat(&mut self) -> DATAFORMAT_W<'_>[src]

Bits 16:18 - Data word format

pub fn fs(&mut self) -> FS_W<'_>[src]

Bits 24:27 - Sampling frequency

impl W<u32, Reg<u32, _IDR>>[src]

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 1 - Transmit Ready Interrupt Disable

pub fn txur(&mut self) -> TXUR_W<'_>[src]

Bit 2 - Transmit Underrun Interrupt Disable

impl W<u32, Reg<u32, _IER>>[src]

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 1 - Transmit Ready Interrupt Enable

pub fn txur(&mut self) -> TXUR_W<'_>[src]

Bit 2 - Transmit Underrun Interrupt Enable

impl W<u32, Reg<u32, _SCR>>[src]

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 1 - Transmit Ready Interrupt Clear

pub fn txur(&mut self) -> TXUR_W<'_>[src]

Bit 2 - Transmit Underrun Interrupt Clear

impl W<u32, Reg<u32, _SDR0>>[src]

pub fn data(&mut self) -> DATA_W<'_>[src]

Bits 0:31 - Sample Data

impl W<u32, Reg<u32, _SDR1>>[src]

pub fn data(&mut self) -> DATA_W<'_>[src]

Bits 0:31 - Sample Data

impl W<u32, Reg<u32, _VCR0>>[src]

pub fn volume(&mut self) -> VOLUME_W<'_>[src]

Bits 0:14 - Volume Control

pub fn mute(&mut self) -> MUTE_W<'_>[src]

Bit 31 - Mute

impl W<u32, Reg<u32, _VCR1>>[src]

pub fn volume(&mut self) -> VOLUME_W<'_>[src]

Bits 0:14 - Volume Control

pub fn mute(&mut self) -> MUTE_W<'_>[src]

Bit 31 - Mute

impl W<u32, Reg<u32, _CONF>>[src]

pub fn is(&mut self) -> IS_W<'_>[src]

Bits 0:1 - Interupt Settings

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bits 4:5 - Analog Comparator Mode

pub fn inseln(&mut self) -> INSELN_W<'_>[src]

Bits 8:9 - Negative Input Select

pub fn evenn(&mut self) -> EVENN_W<'_>[src]

Bit 16 - Peripheral Event Enable Negative

pub fn evenp(&mut self) -> EVENP_W<'_>[src]

Bit 17 - Peripheral Event Enable Positive

pub fn hys(&mut self) -> HYS_W<'_>[src]

Bits 24:25 - Hysteresis Voltage Value

pub fn fast(&mut self) -> FAST_W<'_>[src]

Bit 26 - Fast Mode Enable

pub fn alwayson(&mut self) -> ALWAYSON_W<'_>[src]

Bit 27 - Always On

impl W<u32, Reg<u32, _CONFW>>[src]

pub fn wis(&mut self) -> WIS_W<'_>[src]

Bits 0:2 - Window Mode Interrupt Settings

pub fn wevsrc(&mut self) -> WEVSRC_W<'_>[src]

Bits 8:10 - Peripheral Event Sourse Selection for Window Mode

pub fn weven(&mut self) -> WEVEN_W<'_>[src]

Bit 11 - Window Peripheral Event Enable

pub fn wfen(&mut self) -> WFEN_W<'_>[src]

Bit 16 - Window Mode Enable

impl W<u32, Reg<u32, _CTRL>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - ACIFC Enable

pub fn eventen(&mut self) -> EVENTEN_W<'_>[src]

Bit 1 - Peripheral Event Trigger Enable

pub fn ustart(&mut self) -> USTART_W<'_>[src]

Bit 4 - User Start Single Comparison

pub fn estart(&mut self) -> ESTART_W<'_>[src]

Bit 5 - Peripheral Event Start Single Comparison

pub fn actest(&mut self) -> ACTEST_W<'_>[src]

Bit 7 - Analog Comparator Test Mode

impl W<u32, Reg<u32, _ICR>>[src]

pub fn acint0(&mut self) -> ACINT0_W<'_>[src]

Bit 0 - AC0 Interrupt Status Clear

pub fn sutint0(&mut self) -> SUTINT0_W<'_>[src]

Bit 1 - AC0 Startup Time Interrupt Status Clear

pub fn acint1(&mut self) -> ACINT1_W<'_>[src]

Bit 2 - AC1 Interrupt Status Clear

pub fn sutint1(&mut self) -> SUTINT1_W<'_>[src]

Bit 3 - AC1 Startup Time Interrupt Status Clear

pub fn acint2(&mut self) -> ACINT2_W<'_>[src]

Bit 4 - AC2 Interrupt Status Clear

pub fn sutint2(&mut self) -> SUTINT2_W<'_>[src]

Bit 5 - AC2 Startup Time Interrupt Status Clear

pub fn acint3(&mut self) -> ACINT3_W<'_>[src]

Bit 6 - AC3 Interrupt Status Clear

pub fn sutint3(&mut self) -> SUTINT3_W<'_>[src]

Bit 7 - AC3 Startup Time Interrupt Status Clear

pub fn acint4(&mut self) -> ACINT4_W<'_>[src]

Bit 8 - AC4 Interrupt Status Clear

pub fn sutint4(&mut self) -> SUTINT4_W<'_>[src]

Bit 9 - AC4 Startup Time Interrupt Status Clear

pub fn acint5(&mut self) -> ACINT5_W<'_>[src]

Bit 10 - AC5 Interrupt Status Clear

pub fn sutint5(&mut self) -> SUTINT5_W<'_>[src]

Bit 11 - AC5 Startup Time Interrupt Status Clear

pub fn acint6(&mut self) -> ACINT6_W<'_>[src]

Bit 12 - AC6 Interrupt Status Clear

pub fn sutint6(&mut self) -> SUTINT6_W<'_>[src]

Bit 13 - AC6 Startup Time Interrupt Status Clear

pub fn acint7(&mut self) -> ACINT7_W<'_>[src]

Bit 14 - AC7 Interrupt Status Clear

pub fn sutint7(&mut self) -> SUTINT7_W<'_>[src]

Bit 15 - AC7 Startup Time Interrupt Status Clear

pub fn wfint0(&mut self) -> WFINT0_W<'_>[src]

Bit 24 - Window0 Mode Interrupt Status Clear

pub fn wfint1(&mut self) -> WFINT1_W<'_>[src]

Bit 25 - Window1 Mode Interrupt Status Clear

pub fn wfint2(&mut self) -> WFINT2_W<'_>[src]

Bit 26 - Window2 Mode Interrupt Status Clear

pub fn wfint3(&mut self) -> WFINT3_W<'_>[src]

Bit 27 - Window3 Mode Interrupt Status Clear

impl W<u32, Reg<u32, _IDR>>[src]

pub fn acint0(&mut self) -> ACINT0_W<'_>[src]

Bit 0 - AC0 Interrupt Disable

pub fn sutint0(&mut self) -> SUTINT0_W<'_>[src]

Bit 1 - AC0 Startup Time Interrupt Disable

pub fn acint1(&mut self) -> ACINT1_W<'_>[src]

Bit 2 - AC1 Interrupt Disable

pub fn sutint1(&mut self) -> SUTINT1_W<'_>[src]

Bit 3 - AC1 Startup Time Interrupt Disable

pub fn acint2(&mut self) -> ACINT2_W<'_>[src]

Bit 4 - AC2 Interrupt Disable

pub fn sutint2(&mut self) -> SUTINT2_W<'_>[src]

Bit 5 - AC2 Startup Time Interrupt Disable

pub fn acint3(&mut self) -> ACINT3_W<'_>[src]

Bit 6 - AC3 Interrupt Disable

pub fn sutint3(&mut self) -> SUTINT3_W<'_>[src]

Bit 7 - AC3 Startup Time Interrupt Disable

pub fn acint4(&mut self) -> ACINT4_W<'_>[src]

Bit 8 - AC4 Interrupt Disable

pub fn sutint4(&mut self) -> SUTINT4_W<'_>[src]

Bit 9 - AC4 Startup Time Interrupt Disable

pub fn acint5(&mut self) -> ACINT5_W<'_>[src]

Bit 10 - AC5 Interrupt Disable

pub fn sutint5(&mut self) -> SUTINT5_W<'_>[src]

Bit 11 - AC5 Startup Time Interrupt Disable

pub fn acint6(&mut self) -> ACINT6_W<'_>[src]

Bit 12 - AC6 Interrupt Disable

pub fn sutint6(&mut self) -> SUTINT6_W<'_>[src]

Bit 13 - AC6 Startup Time Interrupt Disable

pub fn acint7(&mut self) -> ACINT7_W<'_>[src]

Bit 14 - AC7 Interrupt Disable

pub fn sutint7(&mut self) -> SUTINT7_W<'_>[src]

Bit 15 - AC7 Startup Time Interrupt Disable

pub fn wfint0(&mut self) -> WFINT0_W<'_>[src]

Bit 24 - Window0 Mode Interrupt Disable

pub fn wfint1(&mut self) -> WFINT1_W<'_>[src]

Bit 25 - Window1 Mode Interrupt Disable

pub fn wfint2(&mut self) -> WFINT2_W<'_>[src]

Bit 26 - Window2 Mode Interrupt Disable

pub fn wfint3(&mut self) -> WFINT3_W<'_>[src]

Bit 27 - Window3 Mode Interrupt Disable

impl W<u32, Reg<u32, _IER>>[src]

pub fn acint0(&mut self) -> ACINT0_W<'_>[src]

Bit 0 - AC0 Interrupt Enable

pub fn sutint0(&mut self) -> SUTINT0_W<'_>[src]

Bit 1 - AC0 Startup Time Interrupt Enable

pub fn acint1(&mut self) -> ACINT1_W<'_>[src]

Bit 2 - AC1 Interrupt Enable

pub fn sutint1(&mut self) -> SUTINT1_W<'_>[src]

Bit 3 - AC1 Startup Time Interrupt Enable

pub fn acint2(&mut self) -> ACINT2_W<'_>[src]

Bit 4 - AC2 Interrupt Enable

pub fn sutint2(&mut self) -> SUTINT2_W<'_>[src]

Bit 5 - AC2 Startup Time Interrupt Enable

pub fn acint3(&mut self) -> ACINT3_W<'_>[src]

Bit 6 - AC3 Interrupt Enable

pub fn sutint3(&mut self) -> SUTINT3_W<'_>[src]

Bit 7 - AC3 Startup Time Interrupt Enable

pub fn acint4(&mut self) -> ACINT4_W<'_>[src]

Bit 8 - AC4 Interrupt Enable

pub fn sutint4(&mut self) -> SUTINT4_W<'_>[src]

Bit 9 - AC4 Startup Time Interrupt Enable

pub fn acint5(&mut self) -> ACINT5_W<'_>[src]

Bit 10 - AC5 Interrupt Enable

pub fn sutint5(&mut self) -> SUTINT5_W<'_>[src]

Bit 11 - AC5 Startup Time Interrupt Enable

pub fn acint6(&mut self) -> ACINT6_W<'_>[src]

Bit 12 - AC6 Interrupt Enable

pub fn sutint6(&mut self) -> SUTINT6_W<'_>[src]

Bit 13 - AC6 Startup Time Interrupt Enable

pub fn acint7(&mut self) -> ACINT7_W<'_>[src]

Bit 14 - AC7 Interrupt Enable

pub fn sutint7(&mut self) -> SUTINT7_W<'_>[src]

Bit 15 - AC7 Startup Time Interrupt Enable

pub fn wfint0(&mut self) -> WFINT0_W<'_>[src]

Bit 24 - Window0 Mode Interrupt Enable

pub fn wfint1(&mut self) -> WFINT1_W<'_>[src]

Bit 25 - Window1 Mode Interrupt Enable

pub fn wfint2(&mut self) -> WFINT2_W<'_>[src]

Bit 26 - Window2 Mode Interrupt Enable

pub fn wfint3(&mut self) -> WFINT3_W<'_>[src]

Bit 27 - Window3 Mode Interrupt Enable

impl W<u32, Reg<u32, _TR>>[src]

pub fn actest0(&mut self) -> ACTEST0_W<'_>[src]

Bit 0 - AC0 Output Override Value

pub fn actest1(&mut self) -> ACTEST1_W<'_>[src]

Bit 1 - AC1 Output Override Value

pub fn actest2(&mut self) -> ACTEST2_W<'_>[src]

Bit 2 - AC2 Output Override Value

pub fn actest3(&mut self) -> ACTEST3_W<'_>[src]

Bit 3 - AC3 Output Override Value

pub fn actest4(&mut self) -> ACTEST4_W<'_>[src]

Bit 4 - AC4 Output Override Value

pub fn actest5(&mut self) -> ACTEST5_W<'_>[src]

Bit 5 - AC5 Output Override Value

pub fn actest6(&mut self) -> ACTEST6_W<'_>[src]

Bit 6 - AC6 Output Override Value

pub fn actest7(&mut self) -> ACTEST7_W<'_>[src]

Bit 7 - AC7 Output Override Value

impl W<u32, Reg<u32, _CALIB>>[src]

pub fn calib(&mut self) -> CALIB_W<'_>[src]

Bits 0:7 - Calibration Value

pub fn biassel(&mut self) -> BIASSEL_W<'_>[src]

Bit 8 - Select bias mode

pub fn biascal(&mut self) -> BIASCAL_W<'_>[src]

Bits 12:15 - Bias Calibration

pub fn fcd(&mut self) -> FCD_W<'_>[src]

Bit 16 - Flash Calibration Done

impl W<u32, Reg<u32, _CDMA>>[src]

pub fn hwla(&mut self) -> HWLA_W<'_>[src]

Bit 0 - Half word left adjust

pub fn bipolar(&mut self) -> BIPOLAR_W<'_>[src]

Bit 2 - Bipolar Mode

pub fn strig(&mut self) -> STRIG_W<'_>[src]

Bit 3 - Sequencer Trigger Event

pub fn gain(&mut self) -> GAIN_W<'_>[src]

Bits 4:6 - Gain factor

pub fn gcomp(&mut self) -> GCOMP_W<'_>[src]

Bit 7 - Gain Compensation

pub fn enstup(&mut self) -> ENSTUP_W<'_>[src]

Bit 8 - Enable Start-Up Time

pub fn res(&mut self) -> RES_W<'_>[src]

Bit 12 - Resolution

pub fn tss(&mut self) -> TSS_W<'_>[src]

Bit 13 - Internal timer start or stop bit

pub fn internal(&mut self) -> INTERNAL_W<'_>[src]

Bits 14:15 - Internal Voltage Source Selection

pub fn muxpos(&mut self) -> MUXPOS_W<'_>[src]

Bits 16:19 - MUX selection on Positive ADC input channel

pub fn muxneg(&mut self) -> MUXNEG_W<'_>[src]

Bits 20:22 - MUX selection on Negative ADC input channel

pub fn zoomrange(&mut self) -> ZOOMRANGE_W<'_>[src]

Bits 28:30 - Zoom shift/unipolar reference source selection

pub fn dw(&mut self) -> DW_W<'_>[src]

Bit 31 - Double Word transmitting

impl W<u32, Reg<u32, _CDMA_ALT>>[src]

pub fn lt(&mut self) -> LT_W<'_>[src]

Bits 0:11 - Low Threshold

pub fn wm(&mut self) -> WM_W<'_>[src]

Bits 12:14 - Window Monitor Mode

pub fn ht(&mut self) -> HT_W<'_>[src]

Bits 16:27 - High Threshold

pub fn dw(&mut self) -> DW_W<'_>[src]

Bit 31 - Double Word transmitting

impl W<u32, Reg<u32, _CFG>>[src]

pub fn refsel(&mut self) -> REFSEL_W<'_>[src]

Bits 1:3 - ADC Reference Selection

pub fn speed(&mut self) -> SPEED_W<'_>[src]

Bits 4:5 - ADC current reduction

pub fn clksel(&mut self) -> CLKSEL_W<'_>[src]

Bit 6 - Clock Selection for sequencer/ADC cell

pub fn prescal(&mut self) -> PRESCAL_W<'_>[src]

Bits 8:10 - Prescaler Rate Selection

impl W<u32, Reg<u32, _CR>>[src]

pub fn swrst(&mut self) -> SWRST_W<'_>[src]

Bit 0 - Software reset

pub fn tstop(&mut self) -> TSTOP_W<'_>[src]

Bit 1 - Internal timer stop bit

pub fn tstart(&mut self) -> TSTART_W<'_>[src]

Bit 2 - Internal timer start bit

pub fn strig(&mut self) -> STRIG_W<'_>[src]

Bit 3 - Sequencer trigger

pub fn refbufen(&mut self) -> REFBUFEN_W<'_>[src]

Bit 4 - Reference buffer enable

pub fn refbufdis(&mut self) -> REFBUFDIS_W<'_>[src]

Bit 5 - Reference buffer disable

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 8 - ADCIFD enable

pub fn dis(&mut self) -> DIS_W<'_>[src]

Bit 9 - ADCIFD disable

pub fn bgreqen(&mut self) -> BGREQEN_W<'_>[src]

Bit 10 - Bandgap buffer request enable

pub fn bgreqdis(&mut self) -> BGREQDIS_W<'_>[src]

Bit 11 - Bandgap buffer request disable

impl W<u32, Reg<u32, _IDR>>[src]

pub fn seoc(&mut self) -> SEOC_W<'_>[src]

Bit 0 - Sequencer end of conversion Interrupt Disable

pub fn lovr(&mut self) -> LOVR_W<'_>[src]

Bit 1 - Sequencer last converted value overrun Interrupt Disable

pub fn wm(&mut self) -> WM_W<'_>[src]

Bit 2 - Window monitor Interrupt Disable

pub fn smtrg(&mut self) -> SMTRG_W<'_>[src]

Bit 3 - Sequencer missed trigger event Interrupt Disable

pub fn tto(&mut self) -> TTO_W<'_>[src]

Bit 5 - Timer time-out Interrupt Disable

impl W<u32, Reg<u32, _IER>>[src]

pub fn seoc(&mut self) -> SEOC_W<'_>[src]

Bit 0 - Sequencer end of conversion Interrupt Enable

pub fn lovr(&mut self) -> LOVR_W<'_>[src]

Bit 1 - Sequencer last converted value overrun Interrupt Enable

pub fn wm(&mut self) -> WM_W<'_>[src]

Bit 2 - Window monitor Interrupt Enable

pub fn smtrg(&mut self) -> SMTRG_W<'_>[src]

Bit 3 - Sequencer missed trigger event Interrupt Enable

pub fn tto(&mut self) -> TTO_W<'_>[src]

Bit 5 - Timer time-out Interrupt Enable

impl W<u32, Reg<u32, _ITIMER>>[src]

pub fn itmc(&mut self) -> ITMC_W<'_>[src]

Bits 0:15 - Internal timer max counter

impl W<u32, Reg<u32, _SCR>>[src]

pub fn seoc(&mut self) -> SEOC_W<'_>[src]

Bit 0 - Sequencer end of conversion

pub fn lovr(&mut self) -> LOVR_W<'_>[src]

Bit 1 - Sequencer last converted value overrun

pub fn wm(&mut self) -> WM_W<'_>[src]

Bit 2 - Window monitor

pub fn smtrg(&mut self) -> SMTRG_W<'_>[src]

Bit 3 - Sequencer missed trigger event

pub fn sutd(&mut self) -> SUTD_W<'_>[src]

Bit 4 - Start-up time done

pub fn tto(&mut self) -> TTO_W<'_>[src]

Bit 5 - Timer time-out

impl W<u32, Reg<u32, _SEQCFG>>[src]

pub fn hwla(&mut self) -> HWLA_W<'_>[src]

Bit 0 - Half word left adjust

pub fn bipolar(&mut self) -> BIPOLAR_W<'_>[src]

Bit 2 - Bipolar Mode

pub fn gain(&mut self) -> GAIN_W<'_>[src]

Bits 4:6 - Gain factor

pub fn gcomp(&mut self) -> GCOMP_W<'_>[src]

Bit 7 - Gain Compensation

pub fn trgsel(&mut self) -> TRGSEL_W<'_>[src]

Bits 8:10 - Trigger selection

pub fn res(&mut self) -> RES_W<'_>[src]

Bit 12 - Resolution

pub fn internal(&mut self) -> INTERNAL_W<'_>[src]

Bits 14:15 - Internal Voltage Source Selection

pub fn muxpos(&mut self) -> MUXPOS_W<'_>[src]

Bits 16:19 - MUX selection on Positive ADC input channel

pub fn muxneg(&mut self) -> MUXNEG_W<'_>[src]

Bits 20:22 - MUX selection on Negative ADC input channel

pub fn zoomrange(&mut self) -> ZOOMRANGE_W<'_>[src]

Bits 28:30 - Zoom shift/unipolar reference source selection

impl W<u32, Reg<u32, _TIM>>[src]

pub fn startup(&mut self) -> STARTUP_W<'_>[src]

Bits 0:4 - Startup time

pub fn enstup(&mut self) -> ENSTUP_W<'_>[src]

Bit 8 - Enable Startup

impl W<u32, Reg<u32, _WCFG>>[src]

pub fn wm(&mut self) -> WM_W<'_>[src]

Bits 12:14 - Window Monitor Mode

impl W<u32, Reg<u32, _WTH>>[src]

pub fn lt(&mut self) -> LT_W<'_>[src]

Bits 0:11 - Low threshold

pub fn ht(&mut self) -> HT_W<'_>[src]

Bits 16:27 - High Threshold

impl W<u32, Reg<u32, _AR0>>[src]

pub fn value(&mut self) -> VALUE_W<'_>[src]

Bits 0:31 - Alarm Value

impl W<u32, Reg<u32, _AR1>>[src]

pub fn value(&mut self) -> VALUE_W<'_>[src]

Bits 0:31 - Alarm Value

impl W<u32, Reg<u32, _CALV>>[src]

pub fn sec(&mut self) -> SEC_W<'_>[src]

Bits 0:5 - Second

pub fn min(&mut self) -> MIN_W<'_>[src]

Bits 6:11 - Minute

pub fn hour(&mut self) -> HOUR_W<'_>[src]

Bits 12:16 - Hour

pub fn day(&mut self) -> DAY_W<'_>[src]

Bits 17:21 - Day

pub fn month(&mut self) -> MONTH_W<'_>[src]

Bits 22:25 - Month

pub fn year(&mut self) -> YEAR_W<'_>[src]

Bits 26:31 - Year

impl W<u32, Reg<u32, _CLOCK>>[src]

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 0 - Clock Enable

pub fn cssel(&mut self) -> CSSEL_W<'_>[src]

Bits 8:10 - Clock Source Selection

impl W<u32, Reg<u32, _CR>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Enable

pub fn pclr(&mut self) -> PCLR_W<'_>[src]

Bit 1 - Prescaler Clear

pub fn cal(&mut self) -> CAL_W<'_>[src]

Bit 2 - Calendar mode

pub fn ca0(&mut self) -> CA0_W<'_>[src]

Bit 8 - Clear on Alarm 0

pub fn ca1(&mut self) -> CA1_W<'_>[src]

Bit 9 - Clear on Alarm 1

pub fn psel(&mut self) -> PSEL_W<'_>[src]

Bits 16:20 - Prescaler Select

impl W<u32, Reg<u32, _CV>>[src]

pub fn value(&mut self) -> VALUE_W<'_>[src]

Bits 0:31 - AST Value

impl W<u32, Reg<u32, _DTR>>[src]

pub fn exp(&mut self) -> EXP_W<'_>[src]

Bits 0:4 - EXP

pub fn add(&mut self) -> ADD_W<'_>[src]

Bit 5 - ADD

pub fn value(&mut self) -> VALUE_W<'_>[src]

Bits 8:15 - VALUE

impl W<u32, Reg<u32, _EVD>>[src]

pub fn ovf(&mut self) -> OVF_W<'_>[src]

Bit 0 - Overflow

pub fn alarm0(&mut self) -> ALARM0_W<'_>[src]

Bit 8 - Alarm 0

pub fn alarm1(&mut self) -> ALARM1_W<'_>[src]

Bit 9 - Alarm 1

pub fn per0(&mut self) -> PER0_W<'_>[src]

Bit 16 - Perioidc 0

pub fn per1(&mut self) -> PER1_W<'_>[src]

Bit 17 - Periodic 1

impl W<u32, Reg<u32, _EVE>>[src]

pub fn ovf(&mut self) -> OVF_W<'_>[src]

Bit 0 - Overflow

pub fn alarm0(&mut self) -> ALARM0_W<'_>[src]

Bit 8 - Alarm 0

pub fn alarm1(&mut self) -> ALARM1_W<'_>[src]

Bit 9 - Alarm 1

pub fn per0(&mut self) -> PER0_W<'_>[src]

Bit 16 - Perioidc 0

pub fn per1(&mut self) -> PER1_W<'_>[src]

Bit 17 - Periodic 1

impl W<u32, Reg<u32, _IDR>>[src]

pub fn ovf(&mut self) -> OVF_W<'_>[src]

Bit 0 - Overflow

pub fn alarm0(&mut self) -> ALARM0_W<'_>[src]

Bit 8 - Alarm 0

pub fn alarm1(&mut self) -> ALARM1_W<'_>[src]

Bit 9 - Alarm 1

pub fn per0(&mut self) -> PER0_W<'_>[src]

Bit 16 - Periodic 0

pub fn per1(&mut self) -> PER1_W<'_>[src]

Bit 17 - Periodic 1

pub fn ready(&mut self) -> READY_W<'_>[src]

Bit 25 - AST Ready

pub fn clkrdy(&mut self) -> CLKRDY_W<'_>[src]

Bit 29 - Clock Ready

impl W<u32, Reg<u32, _IER>>[src]

pub fn ovf(&mut self) -> OVF_W<'_>[src]

Bit 0 - Overflow

pub fn alarm0(&mut self) -> ALARM0_W<'_>[src]

Bit 8 - Alarm 0

pub fn alarm1(&mut self) -> ALARM1_W<'_>[src]

Bit 9 - Alarm 1

pub fn per0(&mut self) -> PER0_W<'_>[src]

Bit 16 - Periodic 0

pub fn per1(&mut self) -> PER1_W<'_>[src]

Bit 17 - Periodic 1

pub fn ready(&mut self) -> READY_W<'_>[src]

Bit 25 - AST Ready

pub fn clkrdy(&mut self) -> CLKRDY_W<'_>[src]

Bit 29 - Clock Ready

impl W<u32, Reg<u32, _PIR0>>[src]

pub fn insel(&mut self) -> INSEL_W<'_>[src]

Bits 0:4 - Interval Select

impl W<u32, Reg<u32, _PIR1>>[src]

pub fn insel(&mut self) -> INSEL_W<'_>[src]

Bits 0:4 - Interval Select

impl W<u32, Reg<u32, _SCR>>[src]

pub fn ovf(&mut self) -> OVF_W<'_>[src]

Bit 0 - Overflow

pub fn alarm0(&mut self) -> ALARM0_W<'_>[src]

Bit 8 - Alarm 0

pub fn alarm1(&mut self) -> ALARM1_W<'_>[src]

Bit 9 - Alarm 1

pub fn per0(&mut self) -> PER0_W<'_>[src]

Bit 16 - Periodic 0

pub fn per1(&mut self) -> PER1_W<'_>[src]

Bit 17 - Periodic 1

pub fn ready(&mut self) -> READY_W<'_>[src]

Bit 25 - AST Ready

pub fn clkrdy(&mut self) -> CLKRDY_W<'_>[src]

Bit 29 - Clock Ready

impl W<u32, Reg<u32, _WER>>[src]

pub fn ovf(&mut self) -> OVF_W<'_>[src]

Bit 0 - Overflow

pub fn alarm0(&mut self) -> ALARM0_W<'_>[src]

Bit 8 - Alarm 0

pub fn alarm1(&mut self) -> ALARM1_W<'_>[src]

Bit 9 - Alarm 1

pub fn per0(&mut self) -> PER0_W<'_>[src]

Bit 16 - Periodic 0

pub fn per1(&mut self) -> PER1_W<'_>[src]

Bit 17 - Periodic 1

impl W<u32, Reg<u32, _BKUPPMUX>>[src]

pub fn bkuppmux(&mut self) -> BKUPPMUX_W<'_>[src]

Bits 0:8 - Backup Pin Muxing

impl W<u32, Reg<u32, _BPR>>[src]

pub fn runpspb(&mut self) -> RUNPSPB_W<'_>[src]

Bit 0 - Run Mode Power Scaling Preset Bypass

pub fn psmpspb(&mut self) -> PSMPSPB_W<'_>[src]

Bit 1 - Power Save Mode Power Scaling Preset Bypass

pub fn seqstn(&mut self) -> SEQSTN_W<'_>[src]

Bit 2 - Sequencial Startup from ULP (Active Low)

pub fn psbtd(&mut self) -> PSBTD_W<'_>[src]

Bit 3 - Power Scaling Bias Timing Disable

pub fn pshfd(&mut self) -> PSHFD_W<'_>[src]

Bit 4 - Power Scaling Halt Flash Until VREGOK Disable

pub fn dlyrstd(&mut self) -> DLYRSTD_W<'_>[src]

Bit 5 - Delaying Reset Disable

pub fn biassen(&mut self) -> BIASSEN_W<'_>[src]

Bit 6 - Bias Switch Enable

pub fn latsen(&mut self) -> LATSEN_W<'_>[src]

Bit 7 - Latdel Switch Enable

pub fn bod18cont(&mut self) -> BOD18CONT_W<'_>[src]

Bit 8 - BOD18 in continuous mode not disabled in WAIT/RET/BACKUP modes

pub fn pobs(&mut self) -> POBS_W<'_>[src]

Bit 9 - Pico Uart Observability

pub fn fffw(&mut self) -> FFFW_W<'_>[src]

Bit 10 - Force Flash Fast Wakeup

pub fn fbrdyen(&mut self) -> FBRDYEN_W<'_>[src]

Bit 11 - Flash Bias Ready Enable

pub fn fvrefsen(&mut self) -> FVREFSEN_W<'_>[src]

Bit 12 - Flash Vref Switch Enable

impl W<u32, Reg<u32, _ICR>>[src]

pub fn psok(&mut self) -> PSOK_W<'_>[src]

Bit 0 - Power Scaling OK Interrupt Status Clear

pub fn ae(&mut self) -> AE_W<'_>[src]

Bit 31 - Access Error Interrupt Status Clear

impl W<u32, Reg<u32, _IDR>>[src]

pub fn psok(&mut self) -> PSOK_W<'_>[src]

Bit 0 - Power Scaling OK Interrupt Disable

pub fn ae(&mut self) -> AE_W<'_>[src]

Bit 31 - Access Error Interrupt Disable

impl W<u32, Reg<u32, _IER>>[src]

pub fn psok(&mut self) -> PSOK_W<'_>[src]

Bit 0 - Power Scaling OK Interrupt Enable

pub fn ae(&mut self) -> AE_W<'_>[src]

Bit 31 - Access Error Interrupt Enable

impl W<u32, Reg<u32, _IORET>>[src]

pub fn ret(&mut self) -> RET_W<'_>[src]

Bit 0 - Retention on I/O lines after waking up from the BACKUP mode

impl W<u32, Reg<u32, _PMCON>>[src]

pub fn ps(&mut self) -> PS_W<'_>[src]

Bits 0:1 - Power Scaling Configuration Value

pub fn pscreq(&mut self) -> PSCREQ_W<'_>[src]

Bit 2 - Power Scaling Change Request

pub fn pscm(&mut self) -> PSCM_W<'_>[src]

Bit 3 - Power Scaling Change Mode

pub fn bkup(&mut self) -> BKUP_W<'_>[src]

Bit 8 - BACKUP Mode

pub fn ret(&mut self) -> RET_W<'_>[src]

Bit 9 - RETENTION Mode

pub fn sleep(&mut self) -> SLEEP_W<'_>[src]

Bits 12:13 - SLEEP mode Configuration

pub fn ck32s(&mut self) -> CK32S_W<'_>[src]

Bit 16 - 32Khz-1Khz Clock Source Selection

pub fn fastwkup(&mut self) -> FASTWKUP_W<'_>[src]

Bit 24 - Fast Wakeup

impl W<u32, Reg<u32, _UNLOCK>>[src]

pub fn addr(&mut self) -> ADDR_W<'_>[src]

Bits 0:9 - Unlock Address

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 24:31 - Unlock Key

impl W<u32, Reg<u32, _BGCTRL>>[src]

pub fn adcisel(&mut self) -> ADCISEL_W<'_>[src]

Bits 0:1 - ADC Input Selection

pub fn tsen(&mut self) -> TSEN_W<'_>[src]

Bit 8 - Temperature Sensor Enable

impl W<u32, Reg<u32, _BOD18CTRL>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Enable

pub fn hyst(&mut self) -> HYST_W<'_>[src]

Bit 1 - BOD Hysteresis

pub fn action(&mut self) -> ACTION_W<'_>[src]

Bits 8:9 - Action

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bit 16 - Operation modes

pub fn fcd(&mut self) -> FCD_W<'_>[src]

Bit 30 - BOD Fuse Calibration Done

pub fn sfv(&mut self) -> SFV_W<'_>[src]

Bit 31 - BOD Control Register Store Final Value

impl W<u32, Reg<u32, _BOD18LEVEL>>[src]

pub fn val(&mut self) -> VAL_W<'_>[src]

Bits 0:5 - BOD Value

pub fn range(&mut self) -> RANGE_W<'_>[src]

Bit 31 - BOD Threshold Range

impl W<u32, Reg<u32, _BOD33CTRL>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Enable

pub fn hyst(&mut self) -> HYST_W<'_>[src]

Bit 1 - BOD Hysteresis

pub fn action(&mut self) -> ACTION_W<'_>[src]

Bits 8:9 - Action

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bit 16 - Operation modes

pub fn fcd(&mut self) -> FCD_W<'_>[src]

Bit 30 - BOD Fuse Calibration Done

pub fn sfv(&mut self) -> SFV_W<'_>[src]

Bit 31 - BOD Control Register Store Final Value

impl W<u32, Reg<u32, _BOD33LEVEL>>[src]

pub fn val(&mut self) -> VAL_W<'_>[src]

Bits 0:5 - BOD Value

impl W<u32, Reg<u32, _BOD33SAMPLING>>[src]

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 0 - Clock Enable

pub fn cssel(&mut self) -> CSSEL_W<'_>[src]

Bit 1 - Clock Source Select

pub fn psel(&mut self) -> PSEL_W<'_>[src]

Bits 8:11 - Prescaler Select

impl W<u32, Reg<u32, _ICR>>[src]

pub fn osc32rdy(&mut self) -> OSC32RDY_W<'_>[src]

Bit 0 - 32kHz Oscillator Ready

pub fn rc32krdy(&mut self) -> RC32KRDY_W<'_>[src]

Bit 1 - 32kHz RC Oscillator Ready

pub fn rc32klock(&mut self) -> RC32KLOCK_W<'_>[src]

Bit 2 - 32kHz RC Oscillator Lock

pub fn rc32krefe(&mut self) -> RC32KREFE_W<'_>[src]

Bit 3 - 32kHz RC Oscillator Reference Error

pub fn rc32ksat(&mut self) -> RC32KSAT_W<'_>[src]

Bit 4 - 32kHz RC Oscillator Saturation

pub fn bod33det(&mut self) -> BOD33DET_W<'_>[src]

Bit 5 - BOD33 Detected

pub fn bod18det(&mut self) -> BOD18DET_W<'_>[src]

Bit 6 - BOD18 Detected

pub fn bod33synrdy(&mut self) -> BOD33SYNRDY_W<'_>[src]

Bit 7 - BOD33 Synchronization Ready

pub fn bod18synrdy(&mut self) -> BOD18SYNRDY_W<'_>[src]

Bit 8 - BOD18 Synchronization Ready

pub fn sswrdy(&mut self) -> SSWRDY_W<'_>[src]

Bit 9 - VREG Stop Switching Ready

pub fn vregok(&mut self) -> VREGOK_W<'_>[src]

Bit 10 - Main VREG OK

pub fn lpbgrdy(&mut self) -> LPBGRDY_W<'_>[src]

Bit 12 - Low Power Bandgap Voltage Reference Ready

pub fn ae(&mut self) -> AE_W<'_>[src]

Bit 31 - Access Error

impl W<u32, Reg<u32, _IDR>>[src]

pub fn osc32rdy(&mut self) -> OSC32RDY_W<'_>[src]

Bit 0 - 32kHz Oscillator Ready

pub fn rc32krdy(&mut self) -> RC32KRDY_W<'_>[src]

Bit 1 - 32kHz RC Oscillator Ready

pub fn rc32klock(&mut self) -> RC32KLOCK_W<'_>[src]

Bit 2 - 32kHz RC Oscillator Lock

pub fn rc32krefe(&mut self) -> RC32KREFE_W<'_>[src]

Bit 3 - 32kHz RC Oscillator Reference Error

pub fn rc32ksat(&mut self) -> RC32KSAT_W<'_>[src]

Bit 4 - 32kHz RC Oscillator Saturation

pub fn bod33det(&mut self) -> BOD33DET_W<'_>[src]

Bit 5 - BOD33 Detected

pub fn bod18det(&mut self) -> BOD18DET_W<'_>[src]

Bit 6 - BOD18 Detected

pub fn bod33synrdy(&mut self) -> BOD33SYNRDY_W<'_>[src]

Bit 7 - BOD33 Synchronization Ready

pub fn bod18synrdy(&mut self) -> BOD18SYNRDY_W<'_>[src]

Bit 8 - BOD18 Synchronization Ready

pub fn sswrdy(&mut self) -> SSWRDY_W<'_>[src]

Bit 9 - VREG Stop Switching Ready

pub fn vregok(&mut self) -> VREGOK_W<'_>[src]

Bit 10 - Mai n VREG OK

pub fn lpbgrdy(&mut self) -> LPBGRDY_W<'_>[src]

Bit 12 - Low Power Bandgap Voltage Reference Ready

pub fn ae(&mut self) -> AE_W<'_>[src]

Bit 31 - Access Error

impl W<u32, Reg<u32, _IER>>[src]

pub fn osc32rdy(&mut self) -> OSC32RDY_W<'_>[src]

Bit 0 - 32kHz Oscillator Ready

pub fn rc32krdy(&mut self) -> RC32KRDY_W<'_>[src]

Bit 1 - 32kHz RC Oscillator Ready

pub fn rc32klock(&mut self) -> RC32KLOCK_W<'_>[src]

Bit 2 - 32kHz RC Oscillator Lock

pub fn rc32krefe(&mut self) -> RC32KREFE_W<'_>[src]

Bit 3 - 32kHz RC Oscillator Reference Error

pub fn rc32ksat(&mut self) -> RC32KSAT_W<'_>[src]

Bit 4 - 32kHz RC Oscillator Saturation

pub fn bod33det(&mut self) -> BOD33DET_W<'_>[src]

Bit 5 - BOD33 Detected

pub fn bod18det(&mut self) -> BOD18DET_W<'_>[src]

Bit 6 - BOD18 Detected

pub fn bod33synrdy(&mut self) -> BOD33SYNRDY_W<'_>[src]

Bit 7 - BOD33 Synchronization Ready

pub fn bod18synrdy(&mut self) -> BOD18SYNRDY_W<'_>[src]

Bit 8 - BOD18 Synchronization Ready

pub fn sswrdy(&mut self) -> SSWRDY_W<'_>[src]

Bit 9 - VREG Stop Switching Ready

pub fn vregok(&mut self) -> VREGOK_W<'_>[src]

Bit 10 - Main VREG OK

pub fn lpbgrdy(&mut self) -> LPBGRDY_W<'_>[src]

Bit 12 - Low Power Bandgap Voltage Reference Ready

pub fn ae(&mut self) -> AE_W<'_>[src]

Bit 31 - Access Error

impl W<u32, Reg<u32, _OSCCTRL32>>[src]

pub fn osc32en(&mut self) -> OSC32EN_W<'_>[src]

Bit 0 - 32 KHz Oscillator Enable

pub fn pinsel(&mut self) -> PINSEL_W<'_>[src]

Bit 1 - Pins Select

pub fn en32k(&mut self) -> EN32K_W<'_>[src]

Bit 2 - 32 KHz output Enable

pub fn en1k(&mut self) -> EN1K_W<'_>[src]

Bit 3 - 1 KHz output Enable

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bits 8:10 - Oscillator Mode

pub fn selcurr(&mut self) -> SELCURR_W<'_>[src]

Bits 12:15 - Current selection

pub fn startup(&mut self) -> STARTUP_W<'_>[src]

Bits 16:18 - Oscillator Start-up Time

impl W<u32, Reg<u32, _RC1MCR>>[src]

pub fn clkoe(&mut self) -> CLKOE_W<'_>[src]

Bit 0 - 1MHz RC Osc Clock Output Enable

pub fn fcd(&mut self) -> FCD_W<'_>[src]

Bit 7 - Flash Calibration Done

pub fn clkcal(&mut self) -> CLKCAL_W<'_>[src]

Bits 8:12 - 1MHz RC Osc Calibration

impl W<u32, Reg<u32, _RC32KCR>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Enable as Generic clock source

pub fn tcen(&mut self) -> TCEN_W<'_>[src]

Bit 1 - Temperature Compensation Enable

pub fn en32k(&mut self) -> EN32K_W<'_>[src]

Bit 2 - Enable 32 KHz output

pub fn en1k(&mut self) -> EN1K_W<'_>[src]

Bit 3 - Enable 1 kHz output

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bit 4 - Mode Selection

pub fn ref_(&mut self) -> REF_W<'_>[src]

Bit 5 - Reference select

pub fn fcd(&mut self) -> FCD_W<'_>[src]

Bit 7 - Flash calibration done

impl W<u32, Reg<u32, _RC32KTUNE>>[src]

pub fn fine(&mut self) -> FINE_W<'_>[src]

Bits 0:5 - Fine value

pub fn coarse(&mut self) -> COARSE_W<'_>[src]

Bits 16:22 - Coarse Value

impl W<u32, Reg<u32, _UNLOCK>>[src]

pub fn addr(&mut self) -> ADDR_W<'_>[src]

Bits 0:9 - Unlock Address

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 24:31 - Unlock Key

impl W<u32, Reg<u32, _VREGCR>>[src]

pub fn dis(&mut self) -> DIS_W<'_>[src]

Bit 0 - Voltage Regulator disable

pub fn ssg(&mut self) -> SSG_W<'_>[src]

Bit 8 - Spread Spectrum Generator Enable

pub fn ssw(&mut self) -> SSW_W<'_>[src]

Bit 9 - Stop Switching

pub fn sswevt(&mut self) -> SSWEVT_W<'_>[src]

Bit 10 - Stop Switching On Event Enable

pub fn sfv(&mut self) -> SFV_W<'_>[src]

Bit 31 - Store Final Value

impl W<u32, Reg<u32, _CNTCR>>[src]

pub fn top(&mut self) -> TOP_W<'_>[src]

Bits 0:23 - Counter Top Value

pub fn spread(&mut self) -> SPREAD_W<'_>[src]

Bits 24:27 - Spread Spectrum

pub fn repeat(&mut self) -> REPEAT_W<'_>[src]

Bits 28:30 - Repeat Measurements

impl W<u32, Reg<u32, _CR>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Module Enable

pub fn run(&mut self) -> RUN_W<'_>[src]

Bit 1 - Start Operation

pub fn iidle(&mut self) -> IIDLE_W<'_>[src]

Bit 2 - Initialize Idle Value

pub fn etrig(&mut self) -> ETRIG_W<'_>[src]

Bit 3 - Event Triggered Operation

pub fn intres(&mut self) -> INTRES_W<'_>[src]

Bit 4 - Internal Resistors

pub fn cksel(&mut self) -> CKSEL_W<'_>[src]

Bit 5 - Clock Select

pub fn diff(&mut self) -> DIFF_W<'_>[src]

Bit 6 - Differential Mode

pub fn dmaen(&mut self) -> DMAEN_W<'_>[src]

Bit 7 - DMA Enable

pub fn esamples(&mut self) -> ESAMPLES_W<'_>[src]

Bits 8:14 - Number of Event Samples

pub fn charget(&mut self) -> CHARGET_W<'_>[src]

Bits 16:19 - Charge Time

pub fn swrst(&mut self) -> SWRST_W<'_>[src]

Bit 31 - Software Reset

impl W<u32, Reg<u32, _DMA>>[src]

pub fn dma(&mut self) -> DMA_W<'_>[src]

Bits 0:31 - Direct Memory Access

impl W<u32, Reg<u32, _IDLE>>[src]

pub fn fidle(&mut self) -> FIDLE_W<'_>[src]

Bits 0:11 - Fractional Sensor Idle

pub fn ridle(&mut self) -> RIDLE_W<'_>[src]

Bits 12:27 - Integer Sensor Idle

impl W<u32, Reg<u32, _IDR>>[src]

pub fn sample(&mut self) -> SAMPLE_W<'_>[src]

Bit 0 - Sample Ready Interrupt Disable

pub fn intch(&mut self) -> INTCH_W<'_>[src]

Bit 1 - In-touch Interrupt Disable

pub fn outtch(&mut self) -> OUTTCH_W<'_>[src]

Bit 2 - Out-of-Touch Interrupt Disable

impl W<u32, Reg<u32, _IER>>[src]

pub fn sample(&mut self) -> SAMPLE_W<'_>[src]

Bit 0 - Sample Ready Interrupt Enable

pub fn intch(&mut self) -> INTCH_W<'_>[src]

Bit 1 - In-touch Interrupt Enable

pub fn outtch(&mut self) -> OUTTCH_W<'_>[src]

Bit 2 - Out-of-Touch Interrupt Enable

impl W<u32, Reg<u32, _INTCHCLR>>[src]

pub fn intchclr(&mut self) -> INTCHCLR_W<'_>[src]

Bits 0:31 - In-Touch Clear

impl W<u32, Reg<u32, _OUTTCHCLR>>[src]

pub fn outtchclr(&mut self) -> OUTTCHCLR_W<'_>[src]

Bits 0:31 - Out of Touch

impl W<u32, Reg<u32, _PINSEL>>[src]

pub fn pinsel(&mut self) -> PINSEL_W<'_>[src]

Bits 0:7 - Pin Select

impl W<u32, Reg<u32, _SCR>>[src]

pub fn sample(&mut self) -> SAMPLE_W<'_>[src]

Bit 0 - Sample Ready

pub fn intch(&mut self) -> INTCH_W<'_>[src]

Bit 1 - In-touch

pub fn outtch(&mut self) -> OUTTCH_W<'_>[src]

Bit 2 - Out-of-Touch

impl W<u32, Reg<u32, _THRESH>>[src]

pub fn fthresh(&mut self) -> FTHRESH_W<'_>[src]

Bits 0:11 - Fractional part of Threshold Value

pub fn rthresh(&mut self) -> RTHRESH_W<'_>[src]

Bits 12:19 - Rational part of Threshold Value

pub fn dir(&mut self) -> DIR_W<'_>[src]

Bit 23 - Threshold Direction

pub fn length(&mut self) -> LENGTH_W<'_>[src]

Bits 24:28 - Threshold Length

impl W<u32, Reg<u32, _TIMING>>[src]

pub fn tlevel(&mut self) -> TLEVEL_W<'_>[src]

Bits 0:11 - Relative Level Smoothing

pub fn tidle(&mut self) -> TIDLE_W<'_>[src]

Bits 16:27 - Idle Smoothening

impl W<u32, Reg<u32, _CR>>[src]

pub fn reset(&mut self) -> RESET_W<'_>[src]

Bit 0 - Reset CRCComputation

impl W<u32, Reg<u32, _DMADIS>>[src]

pub fn dmadis(&mut self) -> DMADIS_W<'_>[src]

Bit 0 - DMA Disable

impl W<u32, Reg<u32, _DMAEN>>[src]

pub fn dmaen(&mut self) -> DMAEN_W<'_>[src]

Bit 0 - DMA Enable

impl W<u32, Reg<u32, _DMAIDR>>[src]

pub fn dmaidr(&mut self) -> DMAIDR_W<'_>[src]

Bit 0 - DMA Interrupt Disable

impl W<u32, Reg<u32, _DMAIER>>[src]

pub fn dmaier(&mut self) -> DMAIER_W<'_>[src]

Bit 0 - DMA Interrupt Enable

impl W<u32, Reg<u32, _DSCR>>[src]

pub fn dscr(&mut self) -> DSCR_W<'_>[src]

Bits 9:31 - Description Base Address

impl W<u32, Reg<u32, _IDR>>[src]

pub fn erridr(&mut self) -> ERRIDR_W<'_>[src]

Bit 0 - CRC Error Interrupt Disable

impl W<u32, Reg<u32, _IER>>[src]

pub fn errier(&mut self) -> ERRIER_W<'_>[src]

Bit 0 - CRC Error Interrupt Enable

impl W<u32, Reg<u32, _MR>>[src]

pub fn enable(&mut self) -> ENABLE_W<'_>[src]

Bit 0 - CRC Computation Enable

pub fn compare(&mut self) -> COMPARE_W<'_>[src]

Bit 1 - CRC Compare

pub fn ptype(&mut self) -> PTYPE_W<'_>[src]

Bits 2:3 - Polynomial Type

pub fn divider(&mut self) -> DIVIDER_W<'_>[src]

Bits 4:7 - Bandwidth Divider

impl W<u32, Reg<u32, _CDR>>[src]

pub fn data(&mut self) -> DATA_W<'_>[src]

Bits 0:31 - Data to Convert

impl W<u32, Reg<u32, _CR>>[src]

pub fn swrst(&mut self) -> SWRST_W<'_>[src]

Bit 0 - Software Reset

impl W<u32, Reg<u32, _IDR>>[src]

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 0 - Transmit Ready Interrupt Disable

impl W<u32, Reg<u32, _IER>>[src]

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 0 - Transmit Ready Interrupt Enable

impl W<u32, Reg<u32, _MR>>[src]

pub fn trgen(&mut self) -> TRGEN_W<'_>[src]

Bit 0 - Trigger Enable

pub fn trgsel(&mut self) -> TRGSEL_W<'_>[src]

Bits 1:3 - Trigger Selection

pub fn dacen(&mut self) -> DACEN_W<'_>[src]

Bit 4 - DAC Enable

pub fn word(&mut self) -> WORD_W<'_>[src]

Bit 5 - Word Transfer

pub fn startup(&mut self) -> STARTUP_W<'_>[src]

Bits 8:15 - Startup Time Selection

pub fn clkdiv(&mut self) -> CLKDIV_W<'_>[src]

Bits 16:31 - Clock Divider for Internal Trigger

impl W<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&mut self) -> WPEN_W<'_>[src]

Bit 0 - Write Protect Enable

pub fn wpkey(&mut self) -> WPKEY_W<'_>[src]

Bits 8:31 - Write Protect Key

impl W<u32, Reg<u32, _ASYNC>>[src]

pub fn nmi(&mut self) -> NMI_W<'_>[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&mut self) -> INT1_W<'_>[src]

Bit 1 - External Interrupt 1

pub fn int2(&mut self) -> INT2_W<'_>[src]

Bit 2 - External Interrupt 2

pub fn int3(&mut self) -> INT3_W<'_>[src]

Bit 3 - External Interrupt 3

pub fn int4(&mut self) -> INT4_W<'_>[src]

Bit 4 - External Interrupt 4

pub fn int5(&mut self) -> INT5_W<'_>[src]

Bit 5 - External Interrupt 5

pub fn int6(&mut self) -> INT6_W<'_>[src]

Bit 6 - External Interrupt 6

pub fn int7(&mut self) -> INT7_W<'_>[src]

Bit 7 - External Interrupt 7

pub fn int8(&mut self) -> INT8_W<'_>[src]

Bit 8 - External Interrupt 8

pub fn int9(&mut self) -> INT9_W<'_>[src]

Bit 9 - External Interrupt 9

pub fn int10(&mut self) -> INT10_W<'_>[src]

Bit 10 - External Interrupt 10

pub fn int11(&mut self) -> INT11_W<'_>[src]

Bit 11 - External Interrupt 11

pub fn int12(&mut self) -> INT12_W<'_>[src]

Bit 12 - External Interrupt 12

pub fn int13(&mut self) -> INT13_W<'_>[src]

Bit 13 - External Interrupt 13

pub fn int14(&mut self) -> INT14_W<'_>[src]

Bit 14 - External Interrupt 14

pub fn int15(&mut self) -> INT15_W<'_>[src]

Bit 15 - External Interrupt 15

impl W<u32, Reg<u32, _DIS>>[src]

pub fn nmi(&mut self) -> NMI_W<'_>[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&mut self) -> INT1_W<'_>[src]

Bit 1 - External Interrupt 1

pub fn int2(&mut self) -> INT2_W<'_>[src]

Bit 2 - External Interrupt 2

pub fn int3(&mut self) -> INT3_W<'_>[src]

Bit 3 - External Interrupt 3

pub fn int4(&mut self) -> INT4_W<'_>[src]

Bit 4 - External Interrupt 4

pub fn int5(&mut self) -> INT5_W<'_>[src]

Bit 5 - External Interrupt 5

pub fn int6(&mut self) -> INT6_W<'_>[src]

Bit 6 - External Interrupt 6

pub fn int7(&mut self) -> INT7_W<'_>[src]

Bit 7 - External Interrupt 7

pub fn int8(&mut self) -> INT8_W<'_>[src]

Bit 8 - External Interrupt 8

pub fn int9(&mut self) -> INT9_W<'_>[src]

Bit 9 - External Interrupt 9

pub fn int10(&mut self) -> INT10_W<'_>[src]

Bit 10 - External Interrupt 10

pub fn int11(&mut self) -> INT11_W<'_>[src]

Bit 11 - External Interrupt 11

pub fn int12(&mut self) -> INT12_W<'_>[src]

Bit 12 - External Interrupt 12

pub fn int13(&mut self) -> INT13_W<'_>[src]

Bit 13 - External Interrupt 13

pub fn int14(&mut self) -> INT14_W<'_>[src]

Bit 14 - External Interrupt 14

pub fn int15(&mut self) -> INT15_W<'_>[src]

Bit 15 - External Interrupt 15

impl W<u32, Reg<u32, _EDGE>>[src]

pub fn nmi(&mut self) -> NMI_W<'_>[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&mut self) -> INT1_W<'_>[src]

Bit 1 - External Interrupt 1

pub fn int2(&mut self) -> INT2_W<'_>[src]

Bit 2 - External Interrupt 2

pub fn int3(&mut self) -> INT3_W<'_>[src]

Bit 3 - External Interrupt 3

pub fn int4(&mut self) -> INT4_W<'_>[src]

Bit 4 - External Interrupt 4

pub fn int5(&mut self) -> INT5_W<'_>[src]

Bit 5 - External Interrupt 5

pub fn int6(&mut self) -> INT6_W<'_>[src]

Bit 6 - External Interrupt 6

pub fn int7(&mut self) -> INT7_W<'_>[src]

Bit 7 - External Interrupt 7

pub fn int8(&mut self) -> INT8_W<'_>[src]

Bit 8 - External Interrupt 8

pub fn int9(&mut self) -> INT9_W<'_>[src]

Bit 9 - External Interrupt 9

pub fn int10(&mut self) -> INT10_W<'_>[src]

Bit 10 - External Interrupt 10

pub fn int11(&mut self) -> INT11_W<'_>[src]

Bit 11 - External Interrupt 11

pub fn int12(&mut self) -> INT12_W<'_>[src]

Bit 12 - External Interrupt 12

pub fn int13(&mut self) -> INT13_W<'_>[src]

Bit 13 - External Interrupt 13

pub fn int14(&mut self) -> INT14_W<'_>[src]

Bit 14 - External Interrupt 14

pub fn int15(&mut self) -> INT15_W<'_>[src]

Bit 15 - External Interrupt 15

impl W<u32, Reg<u32, _EN>>[src]

pub fn nmi(&mut self) -> NMI_W<'_>[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&mut self) -> INT1_W<'_>[src]

Bit 1 - External Interrupt 1

pub fn int2(&mut self) -> INT2_W<'_>[src]

Bit 2 - External Interrupt 2

pub fn int3(&mut self) -> INT3_W<'_>[src]

Bit 3 - External Interrupt 3

pub fn int4(&mut self) -> INT4_W<'_>[src]

Bit 4 - External Interrupt 4

pub fn int5(&mut self) -> INT5_W<'_>[src]

Bit 5 - External Interrupt 5

pub fn int6(&mut self) -> INT6_W<'_>[src]

Bit 6 - External Interrupt 6

pub fn int7(&mut self) -> INT7_W<'_>[src]

Bit 7 - External Interrupt 7

pub fn int8(&mut self) -> INT8_W<'_>[src]

Bit 8 - External Interrupt 8

pub fn int9(&mut self) -> INT9_W<'_>[src]

Bit 9 - External Interrupt 9

pub fn int10(&mut self) -> INT10_W<'_>[src]

Bit 10 - External Interrupt 10

pub fn int11(&mut self) -> INT11_W<'_>[src]

Bit 11 - External Interrupt 11

pub fn int12(&mut self) -> INT12_W<'_>[src]

Bit 12 - External Interrupt 12

pub fn int13(&mut self) -> INT13_W<'_>[src]

Bit 13 - External Interrupt 13

pub fn int14(&mut self) -> INT14_W<'_>[src]

Bit 14 - External Interrupt 14

pub fn int15(&mut self) -> INT15_W<'_>[src]

Bit 15 - External Interrupt 15

impl W<u32, Reg<u32, _FILTER>>[src]

pub fn nmi(&mut self) -> NMI_W<'_>[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&mut self) -> INT1_W<'_>[src]

Bit 1 - External Interrupt 1

pub fn int2(&mut self) -> INT2_W<'_>[src]

Bit 2 - External Interrupt 2

pub fn int3(&mut self) -> INT3_W<'_>[src]

Bit 3 - External Interrupt 3

pub fn int4(&mut self) -> INT4_W<'_>[src]

Bit 4 - External Interrupt 4

pub fn int5(&mut self) -> INT5_W<'_>[src]

Bit 5 - External Interrupt 5

pub fn int6(&mut self) -> INT6_W<'_>[src]

Bit 6 - External Interrupt 6

pub fn int7(&mut self) -> INT7_W<'_>[src]

Bit 7 - External Interrupt 7

pub fn int8(&mut self) -> INT8_W<'_>[src]

Bit 8 - External Interrupt 8

pub fn int9(&mut self) -> INT9_W<'_>[src]

Bit 9 - External Interrupt 9

pub fn int10(&mut self) -> INT10_W<'_>[src]

Bit 10 - External Interrupt 10

pub fn int11(&mut self) -> INT11_W<'_>[src]

Bit 11 - External Interrupt 11

pub fn int12(&mut self) -> INT12_W<'_>[src]

Bit 12 - External Interrupt 12

pub fn int13(&mut self) -> INT13_W<'_>[src]

Bit 13 - External Interrupt 13

pub fn int14(&mut self) -> INT14_W<'_>[src]

Bit 14 - External Interrupt 14

pub fn int15(&mut self) -> INT15_W<'_>[src]

Bit 15 - External Interrupt 15

impl W<u32, Reg<u32, _ICR>>[src]

pub fn nmi(&mut self) -> NMI_W<'_>[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&mut self) -> INT1_W<'_>[src]

Bit 1 - External Interrupt 1

pub fn int2(&mut self) -> INT2_W<'_>[src]

Bit 2 - External Interrupt 2

pub fn int3(&mut self) -> INT3_W<'_>[src]

Bit 3 - External Interrupt 3

pub fn int4(&mut self) -> INT4_W<'_>[src]

Bit 4 - External Interrupt 4

pub fn int5(&mut self) -> INT5_W<'_>[src]

Bit 5 - External Interrupt 5

pub fn int6(&mut self) -> INT6_W<'_>[src]

Bit 6 - External Interrupt 6

pub fn int7(&mut self) -> INT7_W<'_>[src]

Bit 7 - External Interrupt 7

pub fn int8(&mut self) -> INT8_W<'_>[src]

Bit 8 - External Interrupt 8

pub fn int9(&mut self) -> INT9_W<'_>[src]

Bit 9 - External Interrupt 9

pub fn int10(&mut self) -> INT10_W<'_>[src]

Bit 10 - External Interrupt 10

pub fn int11(&mut self) -> INT11_W<'_>[src]

Bit 11 - External Interrupt 11

pub fn int12(&mut self) -> INT12_W<'_>[src]

Bit 12 - External Interrupt 12

pub fn int13(&mut self) -> INT13_W<'_>[src]

Bit 13 - External Interrupt 13

pub fn int14(&mut self) -> INT14_W<'_>[src]

Bit 14 - External Interrupt 14

pub fn int15(&mut self) -> INT15_W<'_>[src]

Bit 15 - External Interrupt 15

impl W<u32, Reg<u32, _IDR>>[src]

pub fn nmi(&mut self) -> NMI_W<'_>[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&mut self) -> INT1_W<'_>[src]

Bit 1 - External Interrupt 1

pub fn int2(&mut self) -> INT2_W<'_>[src]

Bit 2 - External Interrupt 2

pub fn int3(&mut self) -> INT3_W<'_>[src]

Bit 3 - External Interrupt 3

pub fn int4(&mut self) -> INT4_W<'_>[src]

Bit 4 - External Interrupt 4

pub fn int5(&mut self) -> INT5_W<'_>[src]

Bit 5 - External Interrupt 5

pub fn int6(&mut self) -> INT6_W<'_>[src]

Bit 6 - External Interrupt 6

pub fn int7(&mut self) -> INT7_W<'_>[src]

Bit 7 - External Interrupt 7

pub fn int8(&mut self) -> INT8_W<'_>[src]

Bit 8 - External Interrupt 8

pub fn int9(&mut self) -> INT9_W<'_>[src]

Bit 9 - External Interrupt 9

pub fn int10(&mut self) -> INT10_W<'_>[src]

Bit 10 - External Interrupt 10

pub fn int11(&mut self) -> INT11_W<'_>[src]

Bit 11 - External Interrupt 11

pub fn int12(&mut self) -> INT12_W<'_>[src]

Bit 12 - External Interrupt 12

pub fn int13(&mut self) -> INT13_W<'_>[src]

Bit 13 - External Interrupt 13

pub fn int14(&mut self) -> INT14_W<'_>[src]

Bit 14 - External Interrupt 14

pub fn int15(&mut self) -> INT15_W<'_>[src]

Bit 15 - External Interrupt 15

impl W<u32, Reg<u32, _IER>>[src]

pub fn nmi(&mut self) -> NMI_W<'_>[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&mut self) -> INT1_W<'_>[src]

Bit 1 - External Interrupt 1

pub fn int2(&mut self) -> INT2_W<'_>[src]

Bit 2 - External Interrupt 2

pub fn int3(&mut self) -> INT3_W<'_>[src]

Bit 3 - External Interrupt 3

pub fn int4(&mut self) -> INT4_W<'_>[src]

Bit 4 - External Interrupt 4

pub fn int5(&mut self) -> INT5_W<'_>[src]

Bit 5 - External Interrupt 5

pub fn int6(&mut self) -> INT6_W<'_>[src]

Bit 6 - External Interrupt 6

pub fn int7(&mut self) -> INT7_W<'_>[src]

Bit 7 - External Interrupt 7

pub fn int8(&mut self) -> INT8_W<'_>[src]

Bit 8 - External Interrupt 8

pub fn int9(&mut self) -> INT9_W<'_>[src]

Bit 9 - External Interrupt 9

pub fn int10(&mut self) -> INT10_W<'_>[src]

Bit 10 - External Interrupt 10

pub fn int11(&mut self) -> INT11_W<'_>[src]

Bit 11 - External Interrupt 11

pub fn int12(&mut self) -> INT12_W<'_>[src]

Bit 12 - External Interrupt 12

pub fn int13(&mut self) -> INT13_W<'_>[src]

Bit 13 - External Interrupt 13

pub fn int14(&mut self) -> INT14_W<'_>[src]

Bit 14 - External Interrupt 14

pub fn int15(&mut self) -> INT15_W<'_>[src]

Bit 15 - External Interrupt 15

impl W<u32, Reg<u32, _LEVEL>>[src]

pub fn nmi(&mut self) -> NMI_W<'_>[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&mut self) -> INT1_W<'_>[src]

Bit 1 - External Interrupt 1

pub fn int2(&mut self) -> INT2_W<'_>[src]

Bit 2 - External Interrupt 2

pub fn int3(&mut self) -> INT3_W<'_>[src]

Bit 3 - External Interrupt 3

pub fn int4(&mut self) -> INT4_W<'_>[src]

Bit 4 - External Interrupt 4

pub fn int5(&mut self) -> INT5_W<'_>[src]

Bit 5 - External Interrupt 5

pub fn int6(&mut self) -> INT6_W<'_>[src]

Bit 6 - External Interrupt 6

pub fn int7(&mut self) -> INT7_W<'_>[src]

Bit 7 - External Interrupt 7

pub fn int8(&mut self) -> INT8_W<'_>[src]

Bit 8 - External Interrupt 8

pub fn int9(&mut self) -> INT9_W<'_>[src]

Bit 9 - External Interrupt 9

pub fn int10(&mut self) -> INT10_W<'_>[src]

Bit 10 - External Interrupt 10

pub fn int11(&mut self) -> INT11_W<'_>[src]

Bit 11 - External Interrupt 11

pub fn int12(&mut self) -> INT12_W<'_>[src]

Bit 12 - External Interrupt 12

pub fn int13(&mut self) -> INT13_W<'_>[src]

Bit 13 - External Interrupt 13

pub fn int14(&mut self) -> INT14_W<'_>[src]

Bit 14 - External Interrupt 14

pub fn int15(&mut self) -> INT15_W<'_>[src]

Bit 15 - External Interrupt 15

impl W<u32, Reg<u32, _MODE>>[src]

pub fn nmi(&mut self) -> NMI_W<'_>[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&mut self) -> INT1_W<'_>[src]

Bit 1 - External Interrupt 1

pub fn int2(&mut self) -> INT2_W<'_>[src]

Bit 2 - External Interrupt 2

pub fn int3(&mut self) -> INT3_W<'_>[src]

Bit 3 - External Interrupt 3

pub fn int4(&mut self) -> INT4_W<'_>[src]

Bit 4 - External Interrupt 4

pub fn int5(&mut self) -> INT5_W<'_>[src]

Bit 5 - External Interrupt 5

pub fn int6(&mut self) -> INT6_W<'_>[src]

Bit 6 - External Interrupt 6

pub fn int7(&mut self) -> INT7_W<'_>[src]

Bit 7 - External Interrupt 7

pub fn int8(&mut self) -> INT8_W<'_>[src]

Bit 8 - External Interrupt 8

pub fn int9(&mut self) -> INT9_W<'_>[src]

Bit 9 - External Interrupt 9

pub fn int10(&mut self) -> INT10_W<'_>[src]

Bit 10 - External Interrupt 10

pub fn int11(&mut self) -> INT11_W<'_>[src]

Bit 11 - External Interrupt 11

pub fn int12(&mut self) -> INT12_W<'_>[src]

Bit 12 - External Interrupt 12

pub fn int13(&mut self) -> INT13_W<'_>[src]

Bit 13 - External Interrupt 13

pub fn int14(&mut self) -> INT14_W<'_>[src]

Bit 14 - External Interrupt 14

pub fn int15(&mut self) -> INT15_W<'_>[src]

Bit 15 - External Interrupt 15

impl W<u32, Reg<u32, _FCMD>>[src]

pub fn cmd(&mut self) -> CMD_W<'_>[src]

Bits 0:5 - Command

pub fn pagen(&mut self) -> PAGEN_W<'_>[src]

Bits 8:23 - Page number

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 24:31 - Write protection key

impl W<u32, Reg<u32, _FCR>>[src]

pub fn frdy(&mut self) -> FRDY_W<'_>[src]

Bit 0 - Flash Ready Interrupt Enable

pub fn locke(&mut self) -> LOCKE_W<'_>[src]

Bit 2 - Lock Error Interrupt Enable

pub fn proge(&mut self) -> PROGE_W<'_>[src]

Bit 3 - Programming Error Interrupt Enable

pub fn fws(&mut self) -> FWS_W<'_>[src]

Bit 6 - Flash Wait State

pub fn ws1opt(&mut self) -> WS1OPT_W<'_>[src]

Bit 7 - Wait State 1 Optimization

impl W<u32, Reg<u32, _CTRL>>[src]

pub fn start(&mut self) -> START_W<'_>[src]

Bit 0 - Start frequency measurement

impl W<u32, Reg<u32, _ICR>>[src]

pub fn done(&mut self) -> DONE_W<'_>[src]

Bit 0 - Frequency measurment done

pub fn rclkrdy(&mut self) -> RCLKRDY_W<'_>[src]

Bit 1 - Reference Clock ready

impl W<u32, Reg<u32, _IDR>>[src]

pub fn done(&mut self) -> DONE_W<'_>[src]

Bit 0 - Frequency measurment done

pub fn rclkrdy(&mut self) -> RCLKRDY_W<'_>[src]

Bit 1 - Reference Clock ready

impl W<u32, Reg<u32, _IER>>[src]

pub fn done(&mut self) -> DONE_W<'_>[src]

Bit 0 - Frequency measurment done

pub fn rclkrdy(&mut self) -> RCLKRDY_W<'_>[src]

Bit 1 - Reference Clock ready

impl W<u32, Reg<u32, _MODE>>[src]

pub fn refsel(&mut self) -> REFSEL_W<'_>[src]

Bits 0:1 - Reference Clock Selection

pub fn refnum(&mut self) -> REFNUM_W<'_>[src]

Bits 8:15 - Number of Reference CLock Cycles

pub fn clksel(&mut self) -> CLKSEL_W<'_>[src]

Bits 16:20 - Clock Source Selection

pub fn refcen(&mut self) -> REFCEN_W<'_>[src]

Bit 31 - Reference Clock Enable

impl W<u32, Reg<u32, _CR>>[src]

pub fn aen(&mut self) -> AEN_W<'_>[src]

Bits 0:3 - Input mask

pub fn filten(&mut self) -> FILTEN_W<'_>[src]

Bit 31 - Filter enable

impl W<u32, Reg<u32, _TRUTH>>[src]

pub fn truth(&mut self) -> TRUTH_W<'_>[src]

Bits 0:15 - Truth

impl W<u32, Reg<u32, _ASR>>[src]

pub fn ar(&mut self) -> AR_W<'_>[src]

Bit 0 - Access Error

impl W<u32, Reg<u32, _EVERC>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Event Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Event Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Event Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Event Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Event Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Event Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Event Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Event Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Event Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Event Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Event Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Event Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Event Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Event Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Event Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Event Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Event Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Event Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Event Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Event Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Event Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Event Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Event Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Event Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Event Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Event Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Event Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Event Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Event Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Event Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Event Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Event Enable

impl W<u32, Reg<u32, _EVERS>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Event Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Event Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Event Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Event Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Event Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Event Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Event Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Event Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Event Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Event Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Event Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Event Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Event Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Event Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Event Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Event Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Event Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Event Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Event Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Event Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Event Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Event Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Event Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Event Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Event Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Event Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Event Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Event Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Event Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Event Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Event Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Event Enable

impl W<u32, Reg<u32, _EVERT>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Event Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Event Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Event Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Event Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Event Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Event Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Event Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Event Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Event Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Event Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Event Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Event Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Event Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Event Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Event Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Event Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Event Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Event Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Event Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Event Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Event Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Event Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Event Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Event Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Event Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Event Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Event Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Event Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Event Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Event Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Event Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Event Enable

impl W<u32, Reg<u32, _EVER>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Event Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Event Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Event Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Event Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Event Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Event Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Event Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Event Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Event Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Event Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Event Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Event Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Event Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Event Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Event Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Event Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Event Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Event Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Event Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Event Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Event Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Event Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Event Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Event Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Event Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Event Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Event Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Event Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Event Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Event Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Event Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Event Enable

impl W<u32, Reg<u32, _GFERC>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Glitch Filter Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Glitch Filter Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Glitch Filter Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Glitch Filter Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Glitch Filter Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Glitch Filter Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Glitch Filter Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Glitch Filter Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Glitch Filter Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Glitch Filter Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Glitch Filter Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Glitch Filter Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Glitch Filter Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Glitch Filter Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Glitch Filter Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Glitch Filter Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Glitch Filter Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Glitch Filter Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Glitch Filter Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Glitch Filter Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Glitch Filter Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Glitch Filter Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Glitch Filter Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Glitch Filter Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Glitch Filter Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Glitch Filter Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Glitch Filter Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Glitch Filter Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Glitch Filter Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Glitch Filter Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Glitch Filter Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Glitch Filter Enable

impl W<u32, Reg<u32, _GFERS>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Glitch Filter Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Glitch Filter Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Glitch Filter Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Glitch Filter Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Glitch Filter Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Glitch Filter Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Glitch Filter Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Glitch Filter Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Glitch Filter Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Glitch Filter Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Glitch Filter Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Glitch Filter Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Glitch Filter Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Glitch Filter Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Glitch Filter Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Glitch Filter Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Glitch Filter Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Glitch Filter Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Glitch Filter Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Glitch Filter Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Glitch Filter Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Glitch Filter Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Glitch Filter Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Glitch Filter Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Glitch Filter Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Glitch Filter Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Glitch Filter Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Glitch Filter Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Glitch Filter Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Glitch Filter Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Glitch Filter Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Glitch Filter Enable

impl W<u32, Reg<u32, _GFERT>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Glitch Filter Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Glitch Filter Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Glitch Filter Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Glitch Filter Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Glitch Filter Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Glitch Filter Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Glitch Filter Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Glitch Filter Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Glitch Filter Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Glitch Filter Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Glitch Filter Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Glitch Filter Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Glitch Filter Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Glitch Filter Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Glitch Filter Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Glitch Filter Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Glitch Filter Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Glitch Filter Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Glitch Filter Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Glitch Filter Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Glitch Filter Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Glitch Filter Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Glitch Filter Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Glitch Filter Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Glitch Filter Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Glitch Filter Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Glitch Filter Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Glitch Filter Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Glitch Filter Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Glitch Filter Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Glitch Filter Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Glitch Filter Enable

impl W<u32, Reg<u32, _GFER>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Glitch Filter Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Glitch Filter Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Glitch Filter Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Glitch Filter Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Glitch Filter Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Glitch Filter Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Glitch Filter Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Glitch Filter Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Glitch Filter Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Glitch Filter Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Glitch Filter Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Glitch Filter Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Glitch Filter Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Glitch Filter Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Glitch Filter Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Glitch Filter Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Glitch Filter Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Glitch Filter Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Glitch Filter Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Glitch Filter Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Glitch Filter Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Glitch Filter Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Glitch Filter Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Glitch Filter Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Glitch Filter Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Glitch Filter Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Glitch Filter Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Glitch Filter Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Glitch Filter Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Glitch Filter Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Glitch Filter Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Glitch Filter Enable

impl W<u32, Reg<u32, _GPERC>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - GPIO Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - GPIO Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - GPIO Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - GPIO Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - GPIO Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - GPIO Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - GPIO Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - GPIO Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - GPIO Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - GPIO Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - GPIO Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - GPIO Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - GPIO Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - GPIO Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - GPIO Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - GPIO Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - GPIO Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - GPIO Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - GPIO Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - GPIO Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - GPIO Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - GPIO Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - GPIO Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - GPIO Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - GPIO Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - GPIO Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - GPIO Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - GPIO Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - GPIO Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - GPIO Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - GPIO Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - GPIO Enable

impl W<u32, Reg<u32, _GPERS>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - GPIO Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - GPIO Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - GPIO Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - GPIO Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - GPIO Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - GPIO Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - GPIO Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - GPIO Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - GPIO Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - GPIO Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - GPIO Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - GPIO Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - GPIO Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - GPIO Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - GPIO Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - GPIO Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - GPIO Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - GPIO Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - GPIO Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - GPIO Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - GPIO Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - GPIO Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - GPIO Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - GPIO Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - GPIO Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - GPIO Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - GPIO Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - GPIO Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - GPIO Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - GPIO Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - GPIO Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - GPIO Enable

impl W<u32, Reg<u32, _GPERT>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - GPIO Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - GPIO Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - GPIO Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - GPIO Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - GPIO Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - GPIO Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - GPIO Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - GPIO Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - GPIO Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - GPIO Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - GPIO Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - GPIO Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - GPIO Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - GPIO Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - GPIO Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - GPIO Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - GPIO Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - GPIO Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - GPIO Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - GPIO Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - GPIO Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - GPIO Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - GPIO Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - GPIO Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - GPIO Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - GPIO Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - GPIO Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - GPIO Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - GPIO Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - GPIO Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - GPIO Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - GPIO Enable

impl W<u32, Reg<u32, _GPER>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - GPIO Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - GPIO Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - GPIO Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - GPIO Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - GPIO Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - GPIO Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - GPIO Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - GPIO Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - GPIO Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - GPIO Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - GPIO Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - GPIO Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - GPIO Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - GPIO Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - GPIO Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - GPIO Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - GPIO Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - GPIO Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - GPIO Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - GPIO Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - GPIO Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - GPIO Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - GPIO Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - GPIO Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - GPIO Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - GPIO Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - GPIO Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - GPIO Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - GPIO Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - GPIO Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - GPIO Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - GPIO Enable

impl W<u32, Reg<u32, _IERC>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Interrupt Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Interrupt Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Interrupt Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Interrupt Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Interrupt Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Interrupt Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Interrupt Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Interrupt Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Interrupt Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Interrupt Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Interrupt Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Interrupt Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Interrupt Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Interrupt Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Interrupt Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Interrupt Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Interrupt Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Interrupt Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Interrupt Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Interrupt Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Interrupt Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Interrupt Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Interrupt Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Interrupt Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Interrupt Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Interrupt Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Interrupt Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Interrupt Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Interrupt Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Interrupt Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Interrupt Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Interrupt Enable

impl W<u32, Reg<u32, _IERS>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Interrupt Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Interrupt Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Interrupt Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Interrupt Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Interrupt Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Interrupt Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Interrupt Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Interrupt Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Interrupt Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Interrupt Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Interrupt Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Interrupt Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Interrupt Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Interrupt Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Interrupt Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Interrupt Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Interrupt Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Interrupt Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Interrupt Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Interrupt Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Interrupt Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Interrupt Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Interrupt Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Interrupt Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Interrupt Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Interrupt Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Interrupt Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Interrupt Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Interrupt Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Interrupt Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Interrupt Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Interrupt Enable

impl W<u32, Reg<u32, _IERT>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Interrupt Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Interrupt Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Interrupt Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Interrupt Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Interrupt Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Interrupt Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Interrupt Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Interrupt Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Interrupt Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Interrupt Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Interrupt Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Interrupt Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Interrupt Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Interrupt Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Interrupt Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Interrupt Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Interrupt Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Interrupt Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Interrupt Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Interrupt Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Interrupt Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Interrupt Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Interrupt Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Interrupt Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Interrupt Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Interrupt Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Interrupt Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Interrupt Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Interrupt Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Interrupt Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Interrupt Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Interrupt Enable

impl W<u32, Reg<u32, _IER>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Interrupt Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Interrupt Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Interrupt Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Interrupt Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Interrupt Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Interrupt Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Interrupt Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Interrupt Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Interrupt Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Interrupt Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Interrupt Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Interrupt Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Interrupt Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Interrupt Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Interrupt Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Interrupt Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Interrupt Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Interrupt Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Interrupt Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Interrupt Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Interrupt Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Interrupt Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Interrupt Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Interrupt Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Interrupt Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Interrupt Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Interrupt Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Interrupt Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Interrupt Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Interrupt Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Interrupt Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Interrupt Enable

impl W<u32, Reg<u32, _IFRC>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Interrupt Flag

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Interrupt Flag

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Interrupt Flag

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Interrupt Flag

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Interrupt Flag

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Interrupt Flag

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Interrupt Flag

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Interrupt Flag

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Interrupt Flag

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Interrupt Flag

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Interrupt Flag

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Interrupt Flag

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Interrupt Flag

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Interrupt Flag

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Interrupt Flag

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Interrupt Flag

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Interrupt Flag

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Interrupt Flag

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Interrupt Flag

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Interrupt Flag

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Interrupt Flag

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Interrupt Flag

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Interrupt Flag

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Interrupt Flag

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Interrupt Flag

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Interrupt Flag

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Interrupt Flag

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Interrupt Flag

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Interrupt Flag

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Interrupt Flag

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Interrupt Flag

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Interrupt Flag

impl W<u32, Reg<u32, _IMR0C>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Interrupt Mode Bit 0

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Interrupt Mode Bit 0

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Interrupt Mode Bit 0

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Interrupt Mode Bit 0

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Interrupt Mode Bit 0

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Interrupt Mode Bit 0

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Interrupt Mode Bit 0

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Interrupt Mode Bit 0

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Interrupt Mode Bit 0

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Interrupt Mode Bit 0

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Interrupt Mode Bit 0

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Interrupt Mode Bit 0

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Interrupt Mode Bit 0

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Interrupt Mode Bit 0

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Interrupt Mode Bit 0

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Interrupt Mode Bit 0

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Interrupt Mode Bit 0

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Interrupt Mode Bit 0

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Interrupt Mode Bit 0

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Interrupt Mode Bit 0

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Interrupt Mode Bit 0

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Interrupt Mode Bit 0

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Interrupt Mode Bit 0

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Interrupt Mode Bit 0

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Interrupt Mode Bit 0

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Interrupt Mode Bit 0

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Interrupt Mode Bit 0

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Interrupt Mode Bit 0

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Interrupt Mode Bit 0

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Interrupt Mode Bit 0

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Interrupt Mode Bit 0

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Interrupt Mode Bit 0

impl W<u32, Reg<u32, _IMR0S>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Interrupt Mode Bit 0

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Interrupt Mode Bit 0

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Interrupt Mode Bit 0

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Interrupt Mode Bit 0

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Interrupt Mode Bit 0

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Interrupt Mode Bit 0

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Interrupt Mode Bit 0

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Interrupt Mode Bit 0

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Interrupt Mode Bit 0

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Interrupt Mode Bit 0

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Interrupt Mode Bit 0

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Interrupt Mode Bit 0

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Interrupt Mode Bit 0

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Interrupt Mode Bit 0

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Interrupt Mode Bit 0

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Interrupt Mode Bit 0

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Interrupt Mode Bit 0

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Interrupt Mode Bit 0

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Interrupt Mode Bit 0

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Interrupt Mode Bit 0

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Interrupt Mode Bit 0

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Interrupt Mode Bit 0

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Interrupt Mode Bit 0

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Interrupt Mode Bit 0

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Interrupt Mode Bit 0

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Interrupt Mode Bit 0

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Interrupt Mode Bit 0

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Interrupt Mode Bit 0

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Interrupt Mode Bit 0

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Interrupt Mode Bit 0

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Interrupt Mode Bit 0

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Interrupt Mode Bit 0

impl W<u32, Reg<u32, _IMR0T>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Interrupt Mode Bit 0

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Interrupt Mode Bit 0

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Interrupt Mode Bit 0

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Interrupt Mode Bit 0

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Interrupt Mode Bit 0

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Interrupt Mode Bit 0

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Interrupt Mode Bit 0

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Interrupt Mode Bit 0

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Interrupt Mode Bit 0

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Interrupt Mode Bit 0

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Interrupt Mode Bit 0

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Interrupt Mode Bit 0

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Interrupt Mode Bit 0

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Interrupt Mode Bit 0

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Interrupt Mode Bit 0

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Interrupt Mode Bit 0

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Interrupt Mode Bit 0

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Interrupt Mode Bit 0

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Interrupt Mode Bit 0

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Interrupt Mode Bit 0

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Interrupt Mode Bit 0

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Interrupt Mode Bit 0

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Interrupt Mode Bit 0

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Interrupt Mode Bit 0

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Interrupt Mode Bit 0

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Interrupt Mode Bit 0

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Interrupt Mode Bit 0

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Interrupt Mode Bit 0

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Interrupt Mode Bit 0

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Interrupt Mode Bit 0

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Interrupt Mode Bit 0

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Interrupt Mode Bit 0

impl W<u32, Reg<u32, _IMR1C>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Interrupt Mode Bit 1

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Interrupt Mode Bit 1

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Interrupt Mode Bit 1

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Interrupt Mode Bit 1

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Interrupt Mode Bit 1

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Interrupt Mode Bit 1

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Interrupt Mode Bit 1

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Interrupt Mode Bit 1

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Interrupt Mode Bit 1

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Interrupt Mode Bit 1

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Interrupt Mode Bit 1

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Interrupt Mode Bit 1

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Interrupt Mode Bit 1

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Interrupt Mode Bit 1

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Interrupt Mode Bit 1

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Interrupt Mode Bit 1

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Interrupt Mode Bit 1

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Interrupt Mode Bit 1

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Interrupt Mode Bit 1

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Interrupt Mode Bit 1

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Interrupt Mode Bit 1

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Interrupt Mode Bit 1

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Interrupt Mode Bit 1

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Interrupt Mode Bit 1

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Interrupt Mode Bit 1

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Interrupt Mode Bit 1

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Interrupt Mode Bit 1

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Interrupt Mode Bit 1

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Interrupt Mode Bit 1

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Interrupt Mode Bit 1

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Interrupt Mode Bit 1

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Interrupt Mode Bit 1

impl W<u32, Reg<u32, _IMR1S>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Interrupt Mode Bit 1

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Interrupt Mode Bit 1

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Interrupt Mode Bit 1

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Interrupt Mode Bit 1

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Interrupt Mode Bit 1

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Interrupt Mode Bit 1

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Interrupt Mode Bit 1

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Interrupt Mode Bit 1

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Interrupt Mode Bit 1

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Interrupt Mode Bit 1

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Interrupt Mode Bit 1

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Interrupt Mode Bit 1

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Interrupt Mode Bit 1

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Interrupt Mode Bit 1

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Interrupt Mode Bit 1

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Interrupt Mode Bit 1

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Interrupt Mode Bit 1

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Interrupt Mode Bit 1

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Interrupt Mode Bit 1

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Interrupt Mode Bit 1

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Interrupt Mode Bit 1

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Interrupt Mode Bit 1

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Interrupt Mode Bit 1

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Interrupt Mode Bit 1

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Interrupt Mode Bit 1

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Interrupt Mode Bit 1

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Interrupt Mode Bit 1

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Interrupt Mode Bit 1

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Interrupt Mode Bit 1

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Interrupt Mode Bit 1

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Interrupt Mode Bit 1

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Interrupt Mode Bit 1

impl W<u32, Reg<u32, _IMR1T>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Interrupt Mode Bit 1

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Interrupt Mode Bit 1

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Interrupt Mode Bit 1

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Interrupt Mode Bit 1

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Interrupt Mode Bit 1

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Interrupt Mode Bit 1

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Interrupt Mode Bit 1

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Interrupt Mode Bit 1

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Interrupt Mode Bit 1

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Interrupt Mode Bit 1

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Interrupt Mode Bit 1

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Interrupt Mode Bit 1

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Interrupt Mode Bit 1

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Interrupt Mode Bit 1

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Interrupt Mode Bit 1

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Interrupt Mode Bit 1

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Interrupt Mode Bit 1

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Interrupt Mode Bit 1

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Interrupt Mode Bit 1

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Interrupt Mode Bit 1

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Interrupt Mode Bit 1

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Interrupt Mode Bit 1

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Interrupt Mode Bit 1

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Interrupt Mode Bit 1

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Interrupt Mode Bit 1

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Interrupt Mode Bit 1

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Interrupt Mode Bit 1

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Interrupt Mode Bit 1

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Interrupt Mode Bit 1

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Interrupt Mode Bit 1

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Interrupt Mode Bit 1

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Interrupt Mode Bit 1

impl W<u32, Reg<u32, _IMR0>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Interrupt Mode Bit 0

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Interrupt Mode Bit 0

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Interrupt Mode Bit 0

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Interrupt Mode Bit 0

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Interrupt Mode Bit 0

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Interrupt Mode Bit 0

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Interrupt Mode Bit 0

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Interrupt Mode Bit 0

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Interrupt Mode Bit 0

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Interrupt Mode Bit 0

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Interrupt Mode Bit 0

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Interrupt Mode Bit 0

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Interrupt Mode Bit 0

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Interrupt Mode Bit 0

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Interrupt Mode Bit 0

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Interrupt Mode Bit 0

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Interrupt Mode Bit 0

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Interrupt Mode Bit 0

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Interrupt Mode Bit 0

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Interrupt Mode Bit 0

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Interrupt Mode Bit 0

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Interrupt Mode Bit 0

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Interrupt Mode Bit 0

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Interrupt Mode Bit 0

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Interrupt Mode Bit 0

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Interrupt Mode Bit 0

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Interrupt Mode Bit 0

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Interrupt Mode Bit 0

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Interrupt Mode Bit 0

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Interrupt Mode Bit 0

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Interrupt Mode Bit 0

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Interrupt Mode Bit 0

impl W<u32, Reg<u32, _IMR1>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Interrupt Mode Bit 1

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Interrupt Mode Bit 1

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Interrupt Mode Bit 1

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Interrupt Mode Bit 1

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Interrupt Mode Bit 1

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Interrupt Mode Bit 1

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Interrupt Mode Bit 1

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Interrupt Mode Bit 1

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Interrupt Mode Bit 1

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Interrupt Mode Bit 1

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Interrupt Mode Bit 1

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Interrupt Mode Bit 1

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Interrupt Mode Bit 1

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Interrupt Mode Bit 1

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Interrupt Mode Bit 1

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Interrupt Mode Bit 1

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Interrupt Mode Bit 1

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Interrupt Mode Bit 1

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Interrupt Mode Bit 1

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Interrupt Mode Bit 1

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Interrupt Mode Bit 1

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Interrupt Mode Bit 1

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Interrupt Mode Bit 1

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Interrupt Mode Bit 1

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Interrupt Mode Bit 1

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Interrupt Mode Bit 1

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Interrupt Mode Bit 1

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Interrupt Mode Bit 1

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Interrupt Mode Bit 1

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Interrupt Mode Bit 1

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Interrupt Mode Bit 1

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Interrupt Mode Bit 1

impl W<u32, Reg<u32, _LOCKC>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Lock State

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Lock State

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Lock State

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Lock State

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Lock State

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Lock State

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Lock State

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Lock State

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Lock State

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Lock State

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Lock State

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Lock State

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Lock State

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Lock State

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Lock State

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Lock State

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Lock State

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Lock State

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Lock State

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Lock State

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Lock State

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Lock State

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Lock State

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Lock State

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Lock State

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Lock State

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Lock State

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Lock State

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Lock State

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Lock State

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Lock State

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Lock State

impl W<u32, Reg<u32, _LOCKS>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Lock State

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Lock State

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Lock State

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Lock State

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Lock State

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Lock State

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Lock State

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Lock State

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Lock State

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Lock State

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Lock State

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Lock State

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Lock State

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Lock State

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Lock State

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Lock State

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Lock State

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Lock State

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Lock State

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Lock State

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Lock State

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Lock State

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Lock State

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Lock State

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Lock State

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Lock State

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Lock State

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Lock State

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Lock State

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Lock State

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Lock State

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Lock State

impl W<u32, Reg<u32, _LOCKT>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Lock State

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Lock State

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Lock State

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Lock State

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Lock State

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Lock State

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Lock State

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Lock State

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Lock State

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Lock State

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Lock State

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Lock State

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Lock State

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Lock State

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Lock State

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Lock State

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Lock State

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Lock State

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Lock State

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Lock State

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Lock State

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Lock State

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Lock State

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Lock State

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Lock State

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Lock State

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Lock State

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Lock State

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Lock State

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Lock State

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Lock State

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Lock State

impl W<u32, Reg<u32, _LOCK>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Lock State

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Lock State

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Lock State

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Lock State

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Lock State

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Lock State

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Lock State

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Lock State

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Lock State

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Lock State

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Lock State

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Lock State

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Lock State

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Lock State

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Lock State

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Lock State

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Lock State

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Lock State

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Lock State

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Lock State

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Lock State

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Lock State

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Lock State

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Lock State

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Lock State

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Lock State

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Lock State

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Lock State

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Lock State

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Lock State

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Lock State

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Lock State

impl W<u32, Reg<u32, _ODCR0C>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Driving Capability Register Bit 0

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Driving Capability Register Bit 0

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Driving Capability Register Bit 0

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Driving Capability Register Bit 0

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Driving Capability Register Bit 0

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Driving Capability Register Bit 0

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Driving Capability Register Bit 0

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Driving Capability Register Bit 0

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Driving Capability Register Bit 0

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Driving Capability Register Bit 0

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Driving Capability Register Bit 0

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Driving Capability Register Bit 0

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Driving Capability Register Bit 0

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Driving Capability Register Bit 0

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Driving Capability Register Bit 0

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Driving Capability Register Bit 0

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Driving Capability Register Bit 0

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Driving Capability Register Bit 0

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Driving Capability Register Bit 0

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Driving Capability Register Bit 0

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Driving Capability Register Bit 0

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Driving Capability Register Bit 0

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Driving Capability Register Bit 0

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Driving Capability Register Bit 0

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Driving Capability Register Bit 0

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Driving Capability Register Bit 0

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Driving Capability Register Bit 0

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Driving Capability Register Bit 0

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Driving Capability Register Bit 0

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Driving Capability Register Bit 0

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Driving Capability Register Bit 0

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Driving Capability Register Bit 0

impl W<u32, Reg<u32, _ODCR0S>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Driving Capability Register Bit 0

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Driving Capability Register Bit 0

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Driving Capability Register Bit 0

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Driving Capability Register Bit 0

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Driving Capability Register Bit 0

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Driving Capability Register Bit 0

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Driving Capability Register Bit 0

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Driving Capability Register Bit 0

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Driving Capability Register Bit 0

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Driving Capability Register Bit 0

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Driving Capability Register Bit 0

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Driving Capability Register Bit 0

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Driving Capability Register Bit 0

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Driving Capability Register Bit 0

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Driving Capability Register Bit 0

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Driving Capability Register Bit 0

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Driving Capability Register Bit 0

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Driving Capability Register Bit 0

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Driving Capability Register Bit 0

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Driving Capability Register Bit 0

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Driving Capability Register Bit 0

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Driving Capability Register Bit 0

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Driving Capability Register Bit 0

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Driving Capability Register Bit 0

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Driving Capability Register Bit 0

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Driving Capability Register Bit 0

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Driving Capability Register Bit 0

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Driving Capability Register Bit 0

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Driving Capability Register Bit 0

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Driving Capability Register Bit 0

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Driving Capability Register Bit 0

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Driving Capability Register Bit 0

impl W<u32, Reg<u32, _ODCR0T>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Driving Capability Register Bit 0

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Driving Capability Register Bit 0

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Driving Capability Register Bit 0

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Driving Capability Register Bit 0

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Driving Capability Register Bit 0

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Driving Capability Register Bit 0

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Driving Capability Register Bit 0

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Driving Capability Register Bit 0

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Driving Capability Register Bit 0

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Driving Capability Register Bit 0

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Driving Capability Register Bit 0

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Driving Capability Register Bit 0

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Driving Capability Register Bit 0

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Driving Capability Register Bit 0

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Driving Capability Register Bit 0

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Driving Capability Register Bit 0

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Driving Capability Register Bit 0

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Driving Capability Register Bit 0

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Driving Capability Register Bit 0

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Driving Capability Register Bit 0

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Driving Capability Register Bit 0

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Driving Capability Register Bit 0

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Driving Capability Register Bit 0

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Driving Capability Register Bit 0

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Driving Capability Register Bit 0

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Driving Capability Register Bit 0

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Driving Capability Register Bit 0

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Driving Capability Register Bit 0

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Driving Capability Register Bit 0

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Driving Capability Register Bit 0

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Driving Capability Register Bit 0

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Driving Capability Register Bit 0

impl W<u32, Reg<u32, _ODCR1C>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Driving Capability Register Bit 1

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Driving Capability Register Bit 1

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Driving Capability Register Bit 1

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Driving Capability Register Bit 1

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Driving Capability Register Bit 1

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Driving Capability Register Bit 1

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Driving Capability Register Bit 1

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Driving Capability Register Bit 1

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Driving Capability Register Bit 1

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Driving Capability Register Bit 1

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Driving Capability Register Bit 1

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Driving Capability Register Bit 1

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Driving Capability Register Bit 1

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Driving Capability Register Bit 1

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Driving Capability Register Bit 1

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Driving Capability Register Bit 1

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Driving Capability Register Bit 1

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Driving Capability Register Bit 1

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Driving Capability Register Bit 1

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Driving Capability Register Bit 1

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Driving Capability Register Bit 1

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Driving Capability Register Bit 1

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Driving Capability Register Bit 1

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Driving Capability Register Bit 1

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Driving Capability Register Bit 1

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Driving Capability Register Bit 1

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Driving Capability Register Bit 1

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Driving Capability Register Bit 1

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Driving Capability Register Bit 1

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Driving Capability Register Bit 1

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Driving Capability Register Bit 1

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Driving Capability Register Bit 1

impl W<u32, Reg<u32, _ODCR1S>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Driving Capability Register Bit 1

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Driving Capability Register Bit 1

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Driving Capability Register Bit 1

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Driving Capability Register Bit 1

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Driving Capability Register Bit 1

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Driving Capability Register Bit 1

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Driving Capability Register Bit 1

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Driving Capability Register Bit 1

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Driving Capability Register Bit 1

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Driving Capability Register Bit 1

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Driving Capability Register Bit 1

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Driving Capability Register Bit 1

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Driving Capability Register Bit 1

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Driving Capability Register Bit 1

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Driving Capability Register Bit 1

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Driving Capability Register Bit 1

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Driving Capability Register Bit 1

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Driving Capability Register Bit 1

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Driving Capability Register Bit 1

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Driving Capability Register Bit 1

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Driving Capability Register Bit 1

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Driving Capability Register Bit 1

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Driving Capability Register Bit 1

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Driving Capability Register Bit 1

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Driving Capability Register Bit 1

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Driving Capability Register Bit 1

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Driving Capability Register Bit 1

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Driving Capability Register Bit 1

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Driving Capability Register Bit 1

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Driving Capability Register Bit 1

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Driving Capability Register Bit 1

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Driving Capability Register Bit 1

impl W<u32, Reg<u32, _ODCR1T>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Driving Capability Register Bit 1

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Driving Capability Register Bit 1

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Driving Capability Register Bit 1

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Driving Capability Register Bit 1

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Driving Capability Register Bit 1

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Driving Capability Register Bit 1

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Driving Capability Register Bit 1

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Driving Capability Register Bit 1

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Driving Capability Register Bit 1

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Driving Capability Register Bit 1

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Driving Capability Register Bit 1

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Driving Capability Register Bit 1

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Driving Capability Register Bit 1

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Driving Capability Register Bit 1

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Driving Capability Register Bit 1

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Driving Capability Register Bit 1

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Driving Capability Register Bit 1

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Driving Capability Register Bit 1

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Driving Capability Register Bit 1

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Driving Capability Register Bit 1

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Driving Capability Register Bit 1

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Driving Capability Register Bit 1

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Driving Capability Register Bit 1

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Driving Capability Register Bit 1

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Driving Capability Register Bit 1

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Driving Capability Register Bit 1

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Driving Capability Register Bit 1

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Driving Capability Register Bit 1

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Driving Capability Register Bit 1

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Driving Capability Register Bit 1

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Driving Capability Register Bit 1

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Driving Capability Register Bit 1

impl W<u32, Reg<u32, _ODCR0>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Driving Capability Register Bit 0

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Driving Capability Register Bit 0

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Driving Capability Register Bit 0

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Driving Capability Register Bit 0

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Driving Capability Register Bit 0

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Driving Capability Register Bit 0

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Driving Capability Register Bit 0

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Driving Capability Register Bit 0

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Driving Capability Register Bit 0

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Driving Capability Register Bit 0

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Driving Capability Register Bit 0

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Driving Capability Register Bit 0

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Driving Capability Register Bit 0

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Driving Capability Register Bit 0

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Driving Capability Register Bit 0

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Driving Capability Register Bit 0

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Driving Capability Register Bit 0

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Driving Capability Register Bit 0

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Driving Capability Register Bit 0

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Driving Capability Register Bit 0

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Driving Capability Register Bit 0

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Driving Capability Register Bit 0

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Driving Capability Register Bit 0

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Driving Capability Register Bit 0

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Driving Capability Register Bit 0

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Driving Capability Register Bit 0

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Driving Capability Register Bit 0

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Driving Capability Register Bit 0

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Driving Capability Register Bit 0

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Driving Capability Register Bit 0

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Driving Capability Register Bit 0

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Driving Capability Register Bit 0

impl W<u32, Reg<u32, _ODCR1>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Driving Capability Register Bit 1

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Driving Capability Register Bit 1

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Driving Capability Register Bit 1

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Driving Capability Register Bit 1

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Driving Capability Register Bit 1

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Driving Capability Register Bit 1

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Driving Capability Register Bit 1

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Driving Capability Register Bit 1

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Driving Capability Register Bit 1

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Driving Capability Register Bit 1

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Driving Capability Register Bit 1

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Driving Capability Register Bit 1

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Driving Capability Register Bit 1

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Driving Capability Register Bit 1

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Driving Capability Register Bit 1

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Driving Capability Register Bit 1

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Driving Capability Register Bit 1

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Driving Capability Register Bit 1

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Driving Capability Register Bit 1

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Driving Capability Register Bit 1

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Driving Capability Register Bit 1

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Driving Capability Register Bit 1

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Driving Capability Register Bit 1

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Driving Capability Register Bit 1

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Driving Capability Register Bit 1

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Driving Capability Register Bit 1

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Driving Capability Register Bit 1

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Driving Capability Register Bit 1

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Driving Capability Register Bit 1

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Driving Capability Register Bit 1

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Driving Capability Register Bit 1

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Driving Capability Register Bit 1

impl W<u32, Reg<u32, _ODERC>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Driver Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Driver Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Driver Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Driver Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Driver Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Driver Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Driver Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Driver Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Driver Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Driver Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Driver Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Driver Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Driver Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Driver Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Driver Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Driver Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Driver Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Driver Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Driver Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Driver Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Driver Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Driver Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Driver Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Driver Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Driver Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Driver Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Driver Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Driver Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Driver Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Driver Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Driver Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Driver Enable

impl W<u32, Reg<u32, _ODERS>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Driver Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Driver Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Driver Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Driver Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Driver Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Driver Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Driver Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Driver Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Driver Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Driver Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Driver Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Driver Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Driver Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Driver Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Driver Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Driver Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Driver Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Driver Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Driver Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Driver Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Driver Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Driver Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Driver Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Driver Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Driver Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Driver Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Driver Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Driver Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Driver Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Driver Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Driver Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Driver Enable

impl W<u32, Reg<u32, _ODERT>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Driver Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Driver Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Driver Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Driver Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Driver Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Driver Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Driver Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Driver Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Driver Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Driver Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Driver Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Driver Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Driver Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Driver Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Driver Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Driver Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Driver Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Driver Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Driver Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Driver Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Driver Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Driver Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Driver Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Driver Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Driver Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Driver Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Driver Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Driver Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Driver Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Driver Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Driver Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Driver Enable

impl W<u32, Reg<u32, _ODER>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Driver Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Driver Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Driver Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Driver Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Driver Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Driver Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Driver Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Driver Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Driver Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Driver Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Driver Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Driver Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Driver Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Driver Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Driver Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Driver Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Driver Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Driver Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Driver Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Driver Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Driver Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Driver Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Driver Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Driver Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Driver Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Driver Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Driver Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Driver Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Driver Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Driver Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Driver Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Driver Enable

impl W<u32, Reg<u32, _ODMERC>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Open Drain Mode Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Open Drain Mode Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Open Drain Mode Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Open Drain Mode Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Open Drain Mode Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Open Drain Mode Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Open Drain Mode Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Open Drain Mode Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Open Drain Mode Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Open Drain Mode Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Open Drain Mode Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Open Drain Mode Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Open Drain Mode Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Open Drain Mode Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Open Drain Mode Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Open Drain Mode Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Open Drain Mode Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Open Drain Mode Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Open Drain Mode Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Open Drain Mode Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Open Drain Mode Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Open Drain Mode Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Open Drain Mode Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Open Drain Mode Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Open Drain Mode Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Open Drain Mode Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Open Drain Mode Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Open Drain Mode Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Open Drain Mode Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Open Drain Mode Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Open Drain Mode Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Open Drain Mode Enable

impl W<u32, Reg<u32, _ODMERS>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Open Drain Mode Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Open Drain Mode Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Open Drain Mode Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Open Drain Mode Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Open Drain Mode Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Open Drain Mode Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Open Drain Mode Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Open Drain Mode Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Open Drain Mode Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Open Drain Mode Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Open Drain Mode Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Open Drain Mode Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Open Drain Mode Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Open Drain Mode Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Open Drain Mode Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Open Drain Mode Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Open Drain Mode Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Open Drain Mode Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Open Drain Mode Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Open Drain Mode Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Open Drain Mode Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Open Drain Mode Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Open Drain Mode Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Open Drain Mode Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Open Drain Mode Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Open Drain Mode Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Open Drain Mode Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Open Drain Mode Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Open Drain Mode Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Open Drain Mode Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Open Drain Mode Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Open Drain Mode Enable

impl W<u32, Reg<u32, _ODMERT>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Open Drain Mode Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Open Drain Mode Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Open Drain Mode Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Open Drain Mode Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Open Drain Mode Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Open Drain Mode Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Open Drain Mode Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Open Drain Mode Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Open Drain Mode Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Open Drain Mode Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Open Drain Mode Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Open Drain Mode Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Open Drain Mode Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Open Drain Mode Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Open Drain Mode Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Open Drain Mode Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Open Drain Mode Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Open Drain Mode Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Open Drain Mode Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Open Drain Mode Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Open Drain Mode Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Open Drain Mode Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Open Drain Mode Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Open Drain Mode Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Open Drain Mode Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Open Drain Mode Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Open Drain Mode Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Open Drain Mode Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Open Drain Mode Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Open Drain Mode Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Open Drain Mode Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Open Drain Mode Enable

impl W<u32, Reg<u32, _ODMER>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Open Drain Mode Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Open Drain Mode Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Open Drain Mode Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Open Drain Mode Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Open Drain Mode Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Open Drain Mode Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Open Drain Mode Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Open Drain Mode Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Open Drain Mode Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Open Drain Mode Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Open Drain Mode Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Open Drain Mode Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Open Drain Mode Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Open Drain Mode Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Open Drain Mode Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Open Drain Mode Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Open Drain Mode Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Open Drain Mode Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Open Drain Mode Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Open Drain Mode Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Open Drain Mode Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Open Drain Mode Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Open Drain Mode Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Open Drain Mode Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Open Drain Mode Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Open Drain Mode Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Open Drain Mode Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Open Drain Mode Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Open Drain Mode Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Open Drain Mode Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Open Drain Mode Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Open Drain Mode Enable

impl W<u32, Reg<u32, _OSRR0C>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Slew Rate Control Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Slew Rate Control Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Slew Rate Control Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Slew Rate Control Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Slew Rate Control Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Slew Rate Control Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Slew Rate Control Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Slew Rate Control Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Slew Rate Control Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Slew Rate Control Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Slew Rate Control Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Slew Rate Control Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Slew Rate Control Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Slew Rate Control Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Slew Rate Control Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Slew Rate Control Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Slew Rate Control Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Slew Rate Control Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Slew Rate Control Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Slew Rate Control Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Slew Rate Control Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Slew Rate Control Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Slew Rate Control Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Slew Rate Control Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Slew Rate Control Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Slew Rate Control Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Slew Rate Control Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Slew Rate Control Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Slew Rate Control Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Slew Rate Control Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Slew Rate Control Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Slew Rate Control Enable

impl W<u32, Reg<u32, _OSRR0S>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Slew Rate Control Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Slew Rate Control Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Slew Rate Control Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Slew Rate Control Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Slew Rate Control Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Slew Rate Control Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Slew Rate Control Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Slew Rate Control Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Slew Rate Control Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Slew Rate Control Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Slew Rate Control Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Slew Rate Control Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Slew Rate Control Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Slew Rate Control Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Slew Rate Control Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Slew Rate Control Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Slew Rate Control Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Slew Rate Control Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Slew Rate Control Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Slew Rate Control Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Slew Rate Control Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Slew Rate Control Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Slew Rate Control Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Slew Rate Control Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Slew Rate Control Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Slew Rate Control Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Slew Rate Control Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Slew Rate Control Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Slew Rate Control Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Slew Rate Control Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Slew Rate Control Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Slew Rate Control Enable

impl W<u32, Reg<u32, _OSRR0T>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Slew Rate Control Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Slew Rate Control Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Slew Rate Control Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Slew Rate Control Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Slew Rate Control Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Slew Rate Control Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Slew Rate Control Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Slew Rate Control Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Slew Rate Control Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Slew Rate Control Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Slew Rate Control Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Slew Rate Control Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Slew Rate Control Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Slew Rate Control Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Slew Rate Control Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Slew Rate Control Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Slew Rate Control Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Slew Rate Control Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Slew Rate Control Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Slew Rate Control Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Slew Rate Control Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Slew Rate Control Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Slew Rate Control Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Slew Rate Control Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Slew Rate Control Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Slew Rate Control Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Slew Rate Control Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Slew Rate Control Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Slew Rate Control Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Slew Rate Control Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Slew Rate Control Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Slew Rate Control Enable

impl W<u32, Reg<u32, _OSRR0>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Slew Rate Control Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Slew Rate Control Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Slew Rate Control Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Slew Rate Control Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Slew Rate Control Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Slew Rate Control Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Slew Rate Control Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Slew Rate Control Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Slew Rate Control Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Slew Rate Control Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Slew Rate Control Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Slew Rate Control Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Slew Rate Control Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Slew Rate Control Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Slew Rate Control Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Slew Rate Control Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Slew Rate Control Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Slew Rate Control Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Slew Rate Control Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Slew Rate Control Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Slew Rate Control Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Slew Rate Control Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Slew Rate Control Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Slew Rate Control Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Slew Rate Control Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Slew Rate Control Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Slew Rate Control Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Slew Rate Control Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Slew Rate Control Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Slew Rate Control Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Slew Rate Control Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Slew Rate Control Enable

impl W<u32, Reg<u32, _OVRC>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Value

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Value

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Value

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Value

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Value

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Value

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Value

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Value

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Value

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Value

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Value

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Value

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Value

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Value

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Value

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Value

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Value

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Value

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Value

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Value

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Value

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Value

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Value

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Value

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Value

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Value

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Value

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Value

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Value

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Value

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Value

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Value

impl W<u32, Reg<u32, _OVRS>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Value

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Value

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Value

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Value

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Value

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Value

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Value

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Value

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Value

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Value

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Value

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Value

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Value

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Value

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Value

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Value

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Value

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Value

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Value

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Value

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Value

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Value

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Value

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Value

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Value

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Value

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Value

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Value

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Value

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Value

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Value

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Value

impl W<u32, Reg<u32, _OVRT>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Value

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Value

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Value

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Value

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Value

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Value

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Value

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Value

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Value

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Value

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Value

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Value

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Value

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Value

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Value

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Value

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Value

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Value

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Value

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Value

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Value

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Value

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Value

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Value

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Value

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Value

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Value

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Value

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Value

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Value

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Value

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Value

impl W<u32, Reg<u32, _OVR>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Output Value

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Output Value

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Output Value

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Output Value

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Output Value

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Output Value

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Output Value

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Output Value

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Output Value

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Output Value

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Output Value

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Output Value

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Output Value

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Output Value

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Output Value

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Output Value

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Output Value

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Output Value

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Output Value

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Output Value

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Output Value

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Output Value

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Output Value

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Output Value

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Output Value

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Output Value

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Output Value

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Output Value

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Output Value

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Output Value

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Output Value

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Output Value

impl W<u32, Reg<u32, _PDERC>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Pull-down Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Pull-down Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Pull-down Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Pull-down Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Pull-down Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Pull-down Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Pull-down Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Pull-down Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Pull-down Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Pull-down Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Pull-down Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Pull-down Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Pull-down Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Pull-down Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Pull-down Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Pull-down Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Pull-down Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Pull-down Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Pull-down Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Pull-down Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Pull-down Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Pull-down Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Pull-down Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Pull-down Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Pull-down Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Pull-down Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Pull-down Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Pull-down Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Pull-down Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Pull-down Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Pull-down Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Pull-down Enable

impl W<u32, Reg<u32, _PDERS>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Pull-down Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Pull-down Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Pull-down Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Pull-down Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Pull-down Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Pull-down Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Pull-down Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Pull-down Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Pull-down Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Pull-down Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Pull-down Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Pull-down Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Pull-down Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Pull-down Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Pull-down Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Pull-down Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Pull-down Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Pull-down Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Pull-down Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Pull-down Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Pull-down Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Pull-down Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Pull-down Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Pull-down Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Pull-down Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Pull-down Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Pull-down Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Pull-down Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Pull-down Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Pull-down Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Pull-down Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Pull-down Enable

impl W<u32, Reg<u32, _PDERT>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Pull-down Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Pull-down Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Pull-down Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Pull-down Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Pull-down Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Pull-down Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Pull-down Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Pull-down Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Pull-down Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Pull-down Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Pull-down Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Pull-down Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Pull-down Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Pull-down Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Pull-down Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Pull-down Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Pull-down Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Pull-down Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Pull-down Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Pull-down Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Pull-down Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Pull-down Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Pull-down Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Pull-down Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Pull-down Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Pull-down Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Pull-down Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Pull-down Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Pull-down Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Pull-down Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Pull-down Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Pull-down Enable

impl W<u32, Reg<u32, _PDER>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Pull-down Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Pull-down Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Pull-down Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Pull-down Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Pull-down Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Pull-down Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Pull-down Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Pull-down Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Pull-down Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Pull-down Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Pull-down Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Pull-down Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Pull-down Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Pull-down Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Pull-down Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Pull-down Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Pull-down Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Pull-down Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Pull-down Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Pull-down Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Pull-down Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Pull-down Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Pull-down Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Pull-down Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Pull-down Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Pull-down Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Pull-down Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Pull-down Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Pull-down Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Pull-down Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Pull-down Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Pull-down Enable

impl W<u32, Reg<u32, _PMR0C>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Peripheral Multiplexer Select bit 0

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Peripheral Multiplexer Select bit 0

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Peripheral Multiplexer Select bit 0

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Peripheral Multiplexer Select bit 0

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Peripheral Multiplexer Select bit 0

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Peripheral Multiplexer Select bit 0

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Peripheral Multiplexer Select bit 0

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Peripheral Multiplexer Select bit 0

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Peripheral Multiplexer Select bit 0

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Peripheral Multiplexer Select bit 0

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Peripheral Multiplexer Select bit 0

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Peripheral Multiplexer Select bit 0

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Peripheral Multiplexer Select bit 0

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Peripheral Multiplexer Select bit 0

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Peripheral Multiplexer Select bit 0

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Peripheral Multiplexer Select bit 0

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Peripheral Multiplexer Select bit 0

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Peripheral Multiplexer Select bit 0

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Peripheral Multiplexer Select bit 0

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Peripheral Multiplexer Select bit 0

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Peripheral Multiplexer Select bit 0

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Peripheral Multiplexer Select bit 0

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Peripheral Multiplexer Select bit 0

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Peripheral Multiplexer Select bit 0

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Peripheral Multiplexer Select bit 0

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Peripheral Multiplexer Select bit 0

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Peripheral Multiplexer Select bit 0

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Peripheral Multiplexer Select bit 0

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Peripheral Multiplexer Select bit 0

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Peripheral Multiplexer Select bit 0

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Peripheral Multiplexer Select bit 0

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Peripheral Multiplexer Select bit 0

impl W<u32, Reg<u32, _PMR0S>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Peripheral Multiplexer Select bit 0

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Peripheral Multiplexer Select bit 0

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Peripheral Multiplexer Select bit 0

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Peripheral Multiplexer Select bit 0

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Peripheral Multiplexer Select bit 0

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Peripheral Multiplexer Select bit 0

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Peripheral Multiplexer Select bit 0

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Peripheral Multiplexer Select bit 0

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Peripheral Multiplexer Select bit 0

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Peripheral Multiplexer Select bit 0

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Peripheral Multiplexer Select bit 0

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Peripheral Multiplexer Select bit 0

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Peripheral Multiplexer Select bit 0

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Peripheral Multiplexer Select bit 0

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Peripheral Multiplexer Select bit 0

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Peripheral Multiplexer Select bit 0

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Peripheral Multiplexer Select bit 0

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Peripheral Multiplexer Select bit 0

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Peripheral Multiplexer Select bit 0

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Peripheral Multiplexer Select bit 0

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Peripheral Multiplexer Select bit 0

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Peripheral Multiplexer Select bit 0

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Peripheral Multiplexer Select bit 0

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Peripheral Multiplexer Select bit 0

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Peripheral Multiplexer Select bit 0

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Peripheral Multiplexer Select bit 0

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Peripheral Multiplexer Select bit 0

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Peripheral Multiplexer Select bit 0

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Peripheral Multiplexer Select bit 0

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Peripheral Multiplexer Select bit 0

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Peripheral Multiplexer Select bit 0

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Peripheral Multiplexer Select bit 0

impl W<u32, Reg<u32, _PMR0T>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Peripheral Multiplexer Select bit 0

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Peripheral Multiplexer Select bit 0

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Peripheral Multiplexer Select bit 0

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Peripheral Multiplexer Select bit 0

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Peripheral Multiplexer Select bit 0

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Peripheral Multiplexer Select bit 0

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Peripheral Multiplexer Select bit 0

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Peripheral Multiplexer Select bit 0

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Peripheral Multiplexer Select bit 0

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Peripheral Multiplexer Select bit 0

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Peripheral Multiplexer Select bit 0

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Peripheral Multiplexer Select bit 0

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Peripheral Multiplexer Select bit 0

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Peripheral Multiplexer Select bit 0

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Peripheral Multiplexer Select bit 0

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Peripheral Multiplexer Select bit 0

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Peripheral Multiplexer Select bit 0

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Peripheral Multiplexer Select bit 0

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Peripheral Multiplexer Select bit 0

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Peripheral Multiplexer Select bit 0

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Peripheral Multiplexer Select bit 0

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Peripheral Multiplexer Select bit 0

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Peripheral Multiplexer Select bit 0

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Peripheral Multiplexer Select bit 0

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Peripheral Multiplexer Select bit 0

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Peripheral Multiplexer Select bit 0

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Peripheral Multiplexer Select bit 0

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Peripheral Multiplexer Select bit 0

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Peripheral Multiplexer Select bit 0

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Peripheral Multiplexer Select bit 0

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Peripheral Multiplexer Select bit 0

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Peripheral Multiplexer Select bit 0

impl W<u32, Reg<u32, _PMR1C>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Peripheral Multiplexer Select bit 1

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Peripheral Multiplexer Select bit 1

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Peripheral Multiplexer Select bit 1

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Peripheral Multiplexer Select bit 1

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Peripheral Multiplexer Select bit 1

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Peripheral Multiplexer Select bit 1

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Peripheral Multiplexer Select bit 1

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Peripheral Multiplexer Select bit 1

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Peripheral Multiplexer Select bit 1

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Peripheral Multiplexer Select bit 1

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Peripheral Multiplexer Select bit 1

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Peripheral Multiplexer Select bit 1

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Peripheral Multiplexer Select bit 1

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Peripheral Multiplexer Select bit 1

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Peripheral Multiplexer Select bit 1

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Peripheral Multiplexer Select bit 1

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Peripheral Multiplexer Select bit 1

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Peripheral Multiplexer Select bit 1

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Peripheral Multiplexer Select bit 1

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Peripheral Multiplexer Select bit 1

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Peripheral Multiplexer Select bit 1

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Peripheral Multiplexer Select bit 1

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Peripheral Multiplexer Select bit 1

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Peripheral Multiplexer Select bit 1

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Peripheral Multiplexer Select bit 1

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Peripheral Multiplexer Select bit 1

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Peripheral Multiplexer Select bit 1

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Peripheral Multiplexer Select bit 1

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Peripheral Multiplexer Select bit 1

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Peripheral Multiplexer Select bit 1

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Peripheral Multiplexer Select bit 1

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Peripheral Multiplexer Select bit 1

impl W<u32, Reg<u32, _PMR1S>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Peripheral Multiplexer Select bit 1

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Peripheral Multiplexer Select bit 1

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Peripheral Multiplexer Select bit 1

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Peripheral Multiplexer Select bit 1

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Peripheral Multiplexer Select bit 1

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Peripheral Multiplexer Select bit 1

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Peripheral Multiplexer Select bit 1

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Peripheral Multiplexer Select bit 1

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Peripheral Multiplexer Select bit 1

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Peripheral Multiplexer Select bit 1

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Peripheral Multiplexer Select bit 1

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Peripheral Multiplexer Select bit 1

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Peripheral Multiplexer Select bit 1

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Peripheral Multiplexer Select bit 1

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Peripheral Multiplexer Select bit 1

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Peripheral Multiplexer Select bit 1

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Peripheral Multiplexer Select bit 1

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Peripheral Multiplexer Select bit 1

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Peripheral Multiplexer Select bit 1

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Peripheral Multiplexer Select bit 1

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Peripheral Multiplexer Select bit 1

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Peripheral Multiplexer Select bit 1

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Peripheral Multiplexer Select bit 1

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Peripheral Multiplexer Select bit 1

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Peripheral Multiplexer Select bit 1

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Peripheral Multiplexer Select bit 1

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Peripheral Multiplexer Select bit 1

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Peripheral Multiplexer Select bit 1

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Peripheral Multiplexer Select bit 1

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Peripheral Multiplexer Select bit 1

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Peripheral Multiplexer Select bit 1

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Peripheral Multiplexer Select bit 1

impl W<u32, Reg<u32, _PMR1T>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Peripheral Multiplexer Select bit 1

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Peripheral Multiplexer Select bit 1

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Peripheral Multiplexer Select bit 1

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Peripheral Multiplexer Select bit 1

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Peripheral Multiplexer Select bit 1

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Peripheral Multiplexer Select bit 1

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Peripheral Multiplexer Select bit 1

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Peripheral Multiplexer Select bit 1

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Peripheral Multiplexer Select bit 1

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Peripheral Multiplexer Select bit 1

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Peripheral Multiplexer Select bit 1

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Peripheral Multiplexer Select bit 1

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Peripheral Multiplexer Select bit 1

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Peripheral Multiplexer Select bit 1

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Peripheral Multiplexer Select bit 1

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Peripheral Multiplexer Select bit 1

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Peripheral Multiplexer Select bit 1

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Peripheral Multiplexer Select bit 1

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Peripheral Multiplexer Select bit 1

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Peripheral Multiplexer Select bit 1

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Peripheral Multiplexer Select bit 1

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Peripheral Multiplexer Select bit 1

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Peripheral Multiplexer Select bit 1

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Peripheral Multiplexer Select bit 1

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Peripheral Multiplexer Select bit 1

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Peripheral Multiplexer Select bit 1

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Peripheral Multiplexer Select bit 1

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Peripheral Multiplexer Select bit 1

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Peripheral Multiplexer Select bit 1

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Peripheral Multiplexer Select bit 1

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Peripheral Multiplexer Select bit 1

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Peripheral Multiplexer Select bit 1

impl W<u32, Reg<u32, _PMR2C>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Peripheral Multiplexer Select bit 2

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Peripheral Multiplexer Select bit 2

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Peripheral Multiplexer Select bit 2

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Peripheral Multiplexer Select bit 2

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Peripheral Multiplexer Select bit 2

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Peripheral Multiplexer Select bit 2

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Peripheral Multiplexer Select bit 2

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Peripheral Multiplexer Select bit 2

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Peripheral Multiplexer Select bit 2

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Peripheral Multiplexer Select bit 2

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Peripheral Multiplexer Select bit 2

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Peripheral Multiplexer Select bit 2

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Peripheral Multiplexer Select bit 2

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Peripheral Multiplexer Select bit 2

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Peripheral Multiplexer Select bit 2

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Peripheral Multiplexer Select bit 2

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Peripheral Multiplexer Select bit 2

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Peripheral Multiplexer Select bit 2

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Peripheral Multiplexer Select bit 2

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Peripheral Multiplexer Select bit 2

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Peripheral Multiplexer Select bit 2

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Peripheral Multiplexer Select bit 2

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Peripheral Multiplexer Select bit 2

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Peripheral Multiplexer Select bit 2

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Peripheral Multiplexer Select bit 2

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Peripheral Multiplexer Select bit 2

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Peripheral Multiplexer Select bit 2

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Peripheral Multiplexer Select bit 2

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Peripheral Multiplexer Select bit 2

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Peripheral Multiplexer Select bit 2

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Peripheral Multiplexer Select bit 2

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Peripheral Multiplexer Select bit 2

impl W<u32, Reg<u32, _PMR2S>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Peripheral Multiplexer Select bit 2

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Peripheral Multiplexer Select bit 2

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Peripheral Multiplexer Select bit 2

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Peripheral Multiplexer Select bit 2

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Peripheral Multiplexer Select bit 2

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Peripheral Multiplexer Select bit 2

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Peripheral Multiplexer Select bit 2

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Peripheral Multiplexer Select bit 2

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Peripheral Multiplexer Select bit 2

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Peripheral Multiplexer Select bit 2

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Peripheral Multiplexer Select bit 2

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Peripheral Multiplexer Select bit 2

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Peripheral Multiplexer Select bit 2

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Peripheral Multiplexer Select bit 2

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Peripheral Multiplexer Select bit 2

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Peripheral Multiplexer Select bit 2

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Peripheral Multiplexer Select bit 2

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Peripheral Multiplexer Select bit 2

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Peripheral Multiplexer Select bit 2

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Peripheral Multiplexer Select bit 2

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Peripheral Multiplexer Select bit 2

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Peripheral Multiplexer Select bit 2

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Peripheral Multiplexer Select bit 2

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Peripheral Multiplexer Select bit 2

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Peripheral Multiplexer Select bit 2

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Peripheral Multiplexer Select bit 2

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Peripheral Multiplexer Select bit 2

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Peripheral Multiplexer Select bit 2

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Peripheral Multiplexer Select bit 2

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Peripheral Multiplexer Select bit 2

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Peripheral Multiplexer Select bit 2

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Peripheral Multiplexer Select bit 2

impl W<u32, Reg<u32, _PMR2T>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Peripheral Multiplexer Select bit 2

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Peripheral Multiplexer Select bit 2

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Peripheral Multiplexer Select bit 2

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Peripheral Multiplexer Select bit 2

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Peripheral Multiplexer Select bit 2

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Peripheral Multiplexer Select bit 2

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Peripheral Multiplexer Select bit 2

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Peripheral Multiplexer Select bit 2

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Peripheral Multiplexer Select bit 2

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Peripheral Multiplexer Select bit 2

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Peripheral Multiplexer Select bit 2

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Peripheral Multiplexer Select bit 2

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Peripheral Multiplexer Select bit 2

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Peripheral Multiplexer Select bit 2

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Peripheral Multiplexer Select bit 2

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Peripheral Multiplexer Select bit 2

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Peripheral Multiplexer Select bit 2

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Peripheral Multiplexer Select bit 2

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Peripheral Multiplexer Select bit 2

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Peripheral Multiplexer Select bit 2

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Peripheral Multiplexer Select bit 2

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Peripheral Multiplexer Select bit 2

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Peripheral Multiplexer Select bit 2

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Peripheral Multiplexer Select bit 2

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Peripheral Multiplexer Select bit 2

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Peripheral Multiplexer Select bit 2

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Peripheral Multiplexer Select bit 2

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Peripheral Multiplexer Select bit 2

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Peripheral Multiplexer Select bit 2

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Peripheral Multiplexer Select bit 2

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Peripheral Multiplexer Select bit 2

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Peripheral Multiplexer Select bit 2

impl W<u32, Reg<u32, _PMR0>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Peripheral Multiplexer Select bit 0

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Peripheral Multiplexer Select bit 0

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Peripheral Multiplexer Select bit 0

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Peripheral Multiplexer Select bit 0

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Peripheral Multiplexer Select bit 0

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Peripheral Multiplexer Select bit 0

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Peripheral Multiplexer Select bit 0

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Peripheral Multiplexer Select bit 0

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Peripheral Multiplexer Select bit 0

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Peripheral Multiplexer Select bit 0

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Peripheral Multiplexer Select bit 0

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Peripheral Multiplexer Select bit 0

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Peripheral Multiplexer Select bit 0

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Peripheral Multiplexer Select bit 0

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Peripheral Multiplexer Select bit 0

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Peripheral Multiplexer Select bit 0

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Peripheral Multiplexer Select bit 0

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Peripheral Multiplexer Select bit 0

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Peripheral Multiplexer Select bit 0

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Peripheral Multiplexer Select bit 0

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Peripheral Multiplexer Select bit 0

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Peripheral Multiplexer Select bit 0

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Peripheral Multiplexer Select bit 0

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Peripheral Multiplexer Select bit 0

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Peripheral Multiplexer Select bit 0

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Peripheral Multiplexer Select bit 0

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Peripheral Multiplexer Select bit 0

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Peripheral Multiplexer Select bit 0

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Peripheral Multiplexer Select bit 0

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Peripheral Multiplexer Select bit 0

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Peripheral Multiplexer Select bit 0

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Peripheral Multiplexer Select bit 0

impl W<u32, Reg<u32, _PMR1>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Peripheral Multiplexer Select bit 1

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Peripheral Multiplexer Select bit 1

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Peripheral Multiplexer Select bit 1

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Peripheral Multiplexer Select bit 1

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Peripheral Multiplexer Select bit 1

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Peripheral Multiplexer Select bit 1

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Peripheral Multiplexer Select bit 1

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Peripheral Multiplexer Select bit 1

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Peripheral Multiplexer Select bit 1

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Peripheral Multiplexer Select bit 1

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Peripheral Multiplexer Select bit 1

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Peripheral Multiplexer Select bit 1

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Peripheral Multiplexer Select bit 1

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Peripheral Multiplexer Select bit 1

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Peripheral Multiplexer Select bit 1

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Peripheral Multiplexer Select bit 1

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Peripheral Multiplexer Select bit 1

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Peripheral Multiplexer Select bit 1

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Peripheral Multiplexer Select bit 1

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Peripheral Multiplexer Select bit 1

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Peripheral Multiplexer Select bit 1

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Peripheral Multiplexer Select bit 1

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Peripheral Multiplexer Select bit 1

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Peripheral Multiplexer Select bit 1

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Peripheral Multiplexer Select bit 1

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Peripheral Multiplexer Select bit 1

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Peripheral Multiplexer Select bit 1

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Peripheral Multiplexer Select bit 1

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Peripheral Multiplexer Select bit 1

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Peripheral Multiplexer Select bit 1

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Peripheral Multiplexer Select bit 1

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Peripheral Multiplexer Select bit 1

impl W<u32, Reg<u32, _PMR2>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Peripheral Multiplexer Select bit 2

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Peripheral Multiplexer Select bit 2

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Peripheral Multiplexer Select bit 2

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Peripheral Multiplexer Select bit 2

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Peripheral Multiplexer Select bit 2

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Peripheral Multiplexer Select bit 2

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Peripheral Multiplexer Select bit 2

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Peripheral Multiplexer Select bit 2

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Peripheral Multiplexer Select bit 2

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Peripheral Multiplexer Select bit 2

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Peripheral Multiplexer Select bit 2

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Peripheral Multiplexer Select bit 2

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Peripheral Multiplexer Select bit 2

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Peripheral Multiplexer Select bit 2

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Peripheral Multiplexer Select bit 2

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Peripheral Multiplexer Select bit 2

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Peripheral Multiplexer Select bit 2

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Peripheral Multiplexer Select bit 2

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Peripheral Multiplexer Select bit 2

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Peripheral Multiplexer Select bit 2

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Peripheral Multiplexer Select bit 2

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Peripheral Multiplexer Select bit 2

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Peripheral Multiplexer Select bit 2

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Peripheral Multiplexer Select bit 2

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Peripheral Multiplexer Select bit 2

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Peripheral Multiplexer Select bit 2

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Peripheral Multiplexer Select bit 2

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Peripheral Multiplexer Select bit 2

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Peripheral Multiplexer Select bit 2

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Peripheral Multiplexer Select bit 2

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Peripheral Multiplexer Select bit 2

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Peripheral Multiplexer Select bit 2

impl W<u32, Reg<u32, _PUERC>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Pull-up Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Pull-up Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Pull-up Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Pull-up Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Pull-up Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Pull-up Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Pull-up Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Pull-up Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Pull-up Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Pull-up Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Pull-up Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Pull-up Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Pull-up Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Pull-up Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Pull-up Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Pull-up Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Pull-up Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Pull-up Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Pull-up Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Pull-up Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Pull-up Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Pull-up Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Pull-up Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Pull-up Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Pull-up Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Pull-up Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Pull-up Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Pull-up Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Pull-up Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Pull-up Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Pull-up Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Pull-up Enable

impl W<u32, Reg<u32, _PUERS>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Pull-up Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Pull-up Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Pull-up Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Pull-up Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Pull-up Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Pull-up Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Pull-up Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Pull-up Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Pull-up Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Pull-up Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Pull-up Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Pull-up Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Pull-up Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Pull-up Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Pull-up Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Pull-up Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Pull-up Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Pull-up Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Pull-up Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Pull-up Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Pull-up Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Pull-up Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Pull-up Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Pull-up Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Pull-up Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Pull-up Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Pull-up Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Pull-up Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Pull-up Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Pull-up Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Pull-up Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Pull-up Enable

impl W<u32, Reg<u32, _PUERT>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Pull-up Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Pull-up Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Pull-up Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Pull-up Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Pull-up Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Pull-up Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Pull-up Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Pull-up Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Pull-up Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Pull-up Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Pull-up Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Pull-up Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Pull-up Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Pull-up Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Pull-up Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Pull-up Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Pull-up Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Pull-up Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Pull-up Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Pull-up Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Pull-up Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Pull-up Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Pull-up Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Pull-up Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Pull-up Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Pull-up Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Pull-up Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Pull-up Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Pull-up Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Pull-up Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Pull-up Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Pull-up Enable

impl W<u32, Reg<u32, _PUER>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Pull-up Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Pull-up Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Pull-up Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Pull-up Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Pull-up Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Pull-up Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Pull-up Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Pull-up Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Pull-up Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Pull-up Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Pull-up Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Pull-up Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Pull-up Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Pull-up Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Pull-up Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Pull-up Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Pull-up Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Pull-up Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Pull-up Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Pull-up Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Pull-up Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Pull-up Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Pull-up Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Pull-up Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Pull-up Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Pull-up Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Pull-up Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Pull-up Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Pull-up Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Pull-up Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Pull-up Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Pull-up Enable

impl W<u32, Reg<u32, _STERC>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Schmitt Trigger Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Schmitt Trigger Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Schmitt Trigger Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Schmitt Trigger Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Schmitt Trigger Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Schmitt Trigger Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Schmitt Trigger Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Schmitt Trigger Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Schmitt Trigger Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Schmitt Trigger Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Schmitt Trigger Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Schmitt Trigger Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Schmitt Trigger Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Schmitt Trigger Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Schmitt Trigger Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Schmitt Trigger Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Schmitt Trigger Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Schmitt Trigger Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Schmitt Trigger Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Schmitt Trigger Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Schmitt Trigger Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Schmitt Trigger Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Schmitt Trigger Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Schmitt Trigger Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Schmitt Trigger Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Schmitt Trigger Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Schmitt Trigger Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Schmitt Trigger Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Schmitt Trigger Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Schmitt Trigger Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Schmitt Trigger Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Schmitt Trigger Enable

impl W<u32, Reg<u32, _STERS>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Schmitt Trigger Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Schmitt Trigger Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Schmitt Trigger Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Schmitt Trigger Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Schmitt Trigger Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Schmitt Trigger Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Schmitt Trigger Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Schmitt Trigger Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Schmitt Trigger Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Schmitt Trigger Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Schmitt Trigger Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Schmitt Trigger Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Schmitt Trigger Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Schmitt Trigger Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Schmitt Trigger Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Schmitt Trigger Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Schmitt Trigger Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Schmitt Trigger Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Schmitt Trigger Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Schmitt Trigger Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Schmitt Trigger Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Schmitt Trigger Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Schmitt Trigger Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Schmitt Trigger Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Schmitt Trigger Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Schmitt Trigger Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Schmitt Trigger Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Schmitt Trigger Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Schmitt Trigger Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Schmitt Trigger Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Schmitt Trigger Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Schmitt Trigger Enable

impl W<u32, Reg<u32, _STERT>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Schmitt Trigger Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Schmitt Trigger Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Schmitt Trigger Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Schmitt Trigger Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Schmitt Trigger Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Schmitt Trigger Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Schmitt Trigger Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Schmitt Trigger Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Schmitt Trigger Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Schmitt Trigger Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Schmitt Trigger Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Schmitt Trigger Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Schmitt Trigger Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Schmitt Trigger Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Schmitt Trigger Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Schmitt Trigger Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Schmitt Trigger Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Schmitt Trigger Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Schmitt Trigger Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Schmitt Trigger Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Schmitt Trigger Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Schmitt Trigger Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Schmitt Trigger Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Schmitt Trigger Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Schmitt Trigger Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Schmitt Trigger Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Schmitt Trigger Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Schmitt Trigger Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Schmitt Trigger Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Schmitt Trigger Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Schmitt Trigger Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Schmitt Trigger Enable

impl W<u32, Reg<u32, _STER>>[src]

pub fn p0(&mut self) -> P0_W<'_>[src]

Bit 0 - Schmitt Trigger Enable

pub fn p1(&mut self) -> P1_W<'_>[src]

Bit 1 - Schmitt Trigger Enable

pub fn p2(&mut self) -> P2_W<'_>[src]

Bit 2 - Schmitt Trigger Enable

pub fn p3(&mut self) -> P3_W<'_>[src]

Bit 3 - Schmitt Trigger Enable

pub fn p4(&mut self) -> P4_W<'_>[src]

Bit 4 - Schmitt Trigger Enable

pub fn p5(&mut self) -> P5_W<'_>[src]

Bit 5 - Schmitt Trigger Enable

pub fn p6(&mut self) -> P6_W<'_>[src]

Bit 6 - Schmitt Trigger Enable

pub fn p7(&mut self) -> P7_W<'_>[src]

Bit 7 - Schmitt Trigger Enable

pub fn p8(&mut self) -> P8_W<'_>[src]

Bit 8 - Schmitt Trigger Enable

pub fn p9(&mut self) -> P9_W<'_>[src]

Bit 9 - Schmitt Trigger Enable

pub fn p10(&mut self) -> P10_W<'_>[src]

Bit 10 - Schmitt Trigger Enable

pub fn p11(&mut self) -> P11_W<'_>[src]

Bit 11 - Schmitt Trigger Enable

pub fn p12(&mut self) -> P12_W<'_>[src]

Bit 12 - Schmitt Trigger Enable

pub fn p13(&mut self) -> P13_W<'_>[src]

Bit 13 - Schmitt Trigger Enable

pub fn p14(&mut self) -> P14_W<'_>[src]

Bit 14 - Schmitt Trigger Enable

pub fn p15(&mut self) -> P15_W<'_>[src]

Bit 15 - Schmitt Trigger Enable

pub fn p16(&mut self) -> P16_W<'_>[src]

Bit 16 - Schmitt Trigger Enable

pub fn p17(&mut self) -> P17_W<'_>[src]

Bit 17 - Schmitt Trigger Enable

pub fn p18(&mut self) -> P18_W<'_>[src]

Bit 18 - Schmitt Trigger Enable

pub fn p19(&mut self) -> P19_W<'_>[src]

Bit 19 - Schmitt Trigger Enable

pub fn p20(&mut self) -> P20_W<'_>[src]

Bit 20 - Schmitt Trigger Enable

pub fn p21(&mut self) -> P21_W<'_>[src]

Bit 21 - Schmitt Trigger Enable

pub fn p22(&mut self) -> P22_W<'_>[src]

Bit 22 - Schmitt Trigger Enable

pub fn p23(&mut self) -> P23_W<'_>[src]

Bit 23 - Schmitt Trigger Enable

pub fn p24(&mut self) -> P24_W<'_>[src]

Bit 24 - Schmitt Trigger Enable

pub fn p25(&mut self) -> P25_W<'_>[src]

Bit 25 - Schmitt Trigger Enable

pub fn p26(&mut self) -> P26_W<'_>[src]

Bit 26 - Schmitt Trigger Enable

pub fn p27(&mut self) -> P27_W<'_>[src]

Bit 27 - Schmitt Trigger Enable

pub fn p28(&mut self) -> P28_W<'_>[src]

Bit 28 - Schmitt Trigger Enable

pub fn p29(&mut self) -> P29_W<'_>[src]

Bit 29 - Schmitt Trigger Enable

pub fn p30(&mut self) -> P30_W<'_>[src]

Bit 30 - Schmitt Trigger Enable

pub fn p31(&mut self) -> P31_W<'_>[src]

Bit 31 - Schmitt Trigger Enable

impl W<u32, Reg<u32, _UNLOCK>>[src]

pub fn addr(&mut self) -> ADDR_W<'_>[src]

Bits 0:9 - Offset Register

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 24:31 - Unlocking Key

impl W<u32, Reg<u32, _CTRL>>[src]

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 0 - Cache Enable

impl W<u32, Reg<u32, _MAINT0>>[src]

pub fn invall(&mut self) -> INVALL_W<'_>[src]

Bit 0 - Cache Controller Invalidate All

impl W<u32, Reg<u32, _MAINT1>>[src]

pub fn index(&mut self) -> INDEX_W<'_>[src]

Bits 4:7 - Invalidate Index

impl W<u32, Reg<u32, _MCFG>>[src]

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bits 0:1 - Cache Controller Monitor Counter Mode

impl W<u32, Reg<u32, _MCTRL>>[src]

pub fn swrst(&mut self) -> SWRST_W<'_>[src]

Bit 0 - Monitor Software Reset

impl W<u32, Reg<u32, _MEN>>[src]

pub fn menable(&mut self) -> MENABLE_W<'_>[src]

Bit 0 - Monitor Enable

impl W<u32, Reg<u32, _MCFG>>[src]

pub fn ulbt(&mut self) -> ULBT_W<'_>[src]

Bits 0:2 - Undefined Length Burst Type

impl W<u32, Reg<u32, _MRCR>>[src]

pub fn rcb0(&mut self) -> RCB0_W<'_>[src]

Bit 0 - Remap Command bit for Master 0

pub fn rcb1(&mut self) -> RCB1_W<'_>[src]

Bit 1 - Remap Command bit for Master 1

pub fn rcb2(&mut self) -> RCB2_W<'_>[src]

Bit 2 - Remap Command bit for Master 2

pub fn rcb3(&mut self) -> RCB3_W<'_>[src]

Bit 3 - Remap Command bit for Master 3

pub fn rcb4(&mut self) -> RCB4_W<'_>[src]

Bit 4 - Remap Command bit for Master 4

pub fn rcb5(&mut self) -> RCB5_W<'_>[src]

Bit 5 - Remap Command bit for Master 5

pub fn rcb6(&mut self) -> RCB6_W<'_>[src]

Bit 6 - Remap Command bit for Master 6

pub fn rcb7(&mut self) -> RCB7_W<'_>[src]

Bit 7 - Remap Command bit for Master 7

pub fn rcb8(&mut self) -> RCB8_W<'_>[src]

Bit 8 - Remap Command bit for Master 8

pub fn rcb9(&mut self) -> RCB9_W<'_>[src]

Bit 9 - Remap Command bit for Master 9

pub fn rcb10(&mut self) -> RCB10_W<'_>[src]

Bit 10 - Remap Command bit for Master 10

pub fn rcb11(&mut self) -> RCB11_W<'_>[src]

Bit 11 - Remap Command bit for Master 11

pub fn rcb12(&mut self) -> RCB12_W<'_>[src]

Bit 12 - Remap Command bit for Master 12

pub fn rcb13(&mut self) -> RCB13_W<'_>[src]

Bit 13 - Remap Command bit for Master 13

pub fn rcb14(&mut self) -> RCB14_W<'_>[src]

Bit 14 - Remap Command bit for Master 14

pub fn rcb15(&mut self) -> RCB15_W<'_>[src]

Bit 15 - Remap Command bit for Master 15

impl W<u32, Reg<u32, _PRAS>>[src]

pub fn m0pr(&mut self) -> M0PR_W<'_>[src]

Bits 0:3 - Master 0 Priority

pub fn m1pr(&mut self) -> M1PR_W<'_>[src]

Bits 4:7 - Master 1 Priority

pub fn m2pr(&mut self) -> M2PR_W<'_>[src]

Bits 8:11 - Master 2 Priority

pub fn m3pr(&mut self) -> M3PR_W<'_>[src]

Bits 12:15 - Master 3 Priority

pub fn m4pr(&mut self) -> M4PR_W<'_>[src]

Bits 16:19 - Master 4 Priority

pub fn m5pr(&mut self) -> M5PR_W<'_>[src]

Bits 20:23 - Master 5 Priority

pub fn m6pr(&mut self) -> M6PR_W<'_>[src]

Bits 24:27 - Master 6 Priority

pub fn m7pr(&mut self) -> M7PR_W<'_>[src]

Bits 28:31 - Master 7 Priority

impl W<u32, Reg<u32, _PRBS>>[src]

pub fn m8pr(&mut self) -> M8PR_W<'_>[src]

Bits 0:3 - Master 8 Priority

pub fn m9pr(&mut self) -> M9PR_W<'_>[src]

Bits 4:7 - Master 9 Priority

pub fn m10pr(&mut self) -> M10PR_W<'_>[src]

Bits 8:11 - Master 10 Priority

pub fn m11pr(&mut self) -> M11PR_W<'_>[src]

Bits 12:15 - Master 11 Priority

pub fn m12pr(&mut self) -> M12PR_W<'_>[src]

Bits 16:19 - Master 12 Priority

pub fn m13pr(&mut self) -> M13PR_W<'_>[src]

Bits 20:23 - Master 13 Priority

pub fn m14pr(&mut self) -> M14PR_W<'_>[src]

Bits 24:27 - Master 14 Priority

pub fn m15pr(&mut self) -> M15PR_W<'_>[src]

Bits 28:31 - Master 15 Priority

impl W<u32, Reg<u32, _SCFG>>[src]

pub fn slot_cycle(&mut self) -> SLOT_CYCLE_W<'_>[src]

Bits 0:7 - Maximum Number of Allowed Cycles for a Burst

pub fn defmstr_type(&mut self) -> DEFMSTR_TYPE_W<'_>[src]

Bits 16:17 - Default Master Type

pub fn fixed_defmstr(&mut self) -> FIXED_DEFMSTR_W<'_>[src]

Bits 18:21 - Fixed Index of Default Master

pub fn arbt(&mut self) -> ARBT_W<'_>[src]

Bit 24 - Arbitration Type

impl W<u32, Reg<u32, _SFR>>[src]

pub fn sfr(&mut self) -> SFR_W<'_>[src]

Bits 0:31 - Special Function Register

impl W<u32, Reg<u32, _CR>>[src]

pub fn rxen(&mut self) -> RXEN_W<'_>[src]

Bit 0 - Receive Enable

pub fn rxdis(&mut self) -> RXDIS_W<'_>[src]

Bit 1 - Receive Disable

pub fn cken(&mut self) -> CKEN_W<'_>[src]

Bit 2 - Clocks Enable

pub fn ckdis(&mut self) -> CKDIS_W<'_>[src]

Bit 3 - Clocks Disable

pub fn txen(&mut self) -> TXEN_W<'_>[src]

Bit 4 - Transmit Enable

pub fn txdis(&mut self) -> TXDIS_W<'_>[src]

Bit 5 - Transmit Disable

pub fn swrst(&mut self) -> SWRST_W<'_>[src]

Bit 7 - Software Reset

impl W<u32, Reg<u32, _IDR>>[src]

pub fn rxrdy(&mut self) -> RXRDY_W<'_>[src]

Bit 1 - Receive Ready Interrupt Disable

pub fn rxor(&mut self) -> RXOR_W<'_>[src]

Bit 2 - Receive Overrun Interrupt Disable

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 5 - Transmit Ready Interrupt Disable

pub fn txur(&mut self) -> TXUR_W<'_>[src]

Bit 6 - Transmit Underrun Interrupt Disable

impl W<u32, Reg<u32, _IER>>[src]

pub fn rxrdy(&mut self) -> RXRDY_W<'_>[src]

Bit 1 - Receiver Ready Interrupt Enable

pub fn rxor(&mut self) -> RXOR_W<'_>[src]

Bit 2 - Receive Overrun Interrupt Enable

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 5 - Transmit Ready Interrupt Enable

pub fn txur(&mut self) -> TXUR_W<'_>[src]

Bit 6 - Transmit Underrun Interrupt Enable

impl W<u32, Reg<u32, _MR>>[src]

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bit 0 - Master/Slave/Controller Mode

pub fn datalength(&mut self) -> DATALENGTH_W<'_>[src]

Bits 2:4 - Data Word Length

pub fn rxmono(&mut self) -> RXMONO_W<'_>[src]

Bit 8 - Receiver Mono

pub fn rxdma(&mut self) -> RXDMA_W<'_>[src]

Bit 9 - Single or Multiple DMA Channels for Receiver

pub fn rxloop(&mut self) -> RXLOOP_W<'_>[src]

Bit 10 - Loop-back Test Mode

pub fn txmono(&mut self) -> TXMONO_W<'_>[src]

Bit 12 - Transmitter Mono

pub fn txdma(&mut self) -> TXDMA_W<'_>[src]

Bit 13 - Single or Multiple DMA Channels for Transmitter

pub fn txsame(&mut self) -> TXSAME_W<'_>[src]

Bit 14 - Transmit Data when Underrun

pub fn imckfs(&mut self) -> IMCKFS_W<'_>[src]

Bits 24:29 - Master Clock to fs Ratio

pub fn imckmode(&mut self) -> IMCKMODE_W<'_>[src]

Bit 30 - Master Clock Mode

pub fn iws24(&mut self) -> IWS24_W<'_>[src]

Bit 31 - IWS Data Slot Width

impl W<u32, Reg<u32, _SCR>>[src]

pub fn rxor(&mut self) -> RXOR_W<'_>[src]

Bit 2 - Receive Overrun

pub fn txur(&mut self) -> TXUR_W<'_>[src]

Bit 6 - Transmit Underrun

pub fn rxorch(&mut self) -> RXORCH_W<'_>[src]

Bits 8:9 - Receive Overrun Channels

pub fn txurch(&mut self) -> TXURCH_W<'_>[src]

Bits 20:21 - Transmit Underrun Channels

impl W<u32, Reg<u32, _SSR>>[src]

pub fn rxor(&mut self) -> RXOR_W<'_>[src]

Bit 2 - Receive Overrun

pub fn txur(&mut self) -> TXUR_W<'_>[src]

Bit 6 - Transmit Underrun

pub fn rxorch(&mut self) -> RXORCH_W<'_>[src]

Bits 8:9 - Receive Overrun Channels

pub fn txurch(&mut self) -> TXURCH_W<'_>[src]

Bits 20:21 - Transmit Underrun Channels

impl W<u32, Reg<u32, _THR>>[src]

pub fn tdat(&mut self) -> TDAT_W<'_>[src]

Bits 0:31 - Transmit Data

impl W<u32, Reg<u32, _CFG>>[src]

pub fn dsize(&mut self) -> DSIZE_W<'_>[src]

Bits 0:1 - Data Size

pub fn smode(&mut self) -> SMODE_W<'_>[src]

Bits 2:3 - Sampling Mode

pub fn emode(&mut self) -> EMODE_W<'_>[src]

Bit 4 - Events Mode

pub fn edge(&mut self) -> EDGE_W<'_>[src]

Bit 5 - Sampling Edge Select

pub fn half(&mut self) -> HALF_W<'_>[src]

Bit 6 - Half Capture

pub fn odd(&mut self) -> ODD_W<'_>[src]

Bit 7 - Odd Capture

impl W<u32, Reg<u32, _CR>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Enable

pub fn dis(&mut self) -> DIS_W<'_>[src]

Bit 1 - Disable

pub fn start(&mut self) -> START_W<'_>[src]

Bit 2 - Start Capture

pub fn stop(&mut self) -> STOP_W<'_>[src]

Bit 3 - Stop Capture

impl W<u32, Reg<u32, _ICR>>[src]

pub fn drdy(&mut self) -> DRDY_W<'_>[src]

Bit 2 - Data Ready Interrupt Status Clear

pub fn ovr(&mut self) -> OVR_W<'_>[src]

Bit 3 - Overrun Interrupt Status Clear

impl W<u32, Reg<u32, _IDR>>[src]

pub fn drdy(&mut self) -> DRDY_W<'_>[src]

Bit 2 - Data Ready Interrupt Disable

pub fn ovr(&mut self) -> OVR_W<'_>[src]

Bit 3 - Overrun Interrupt Disable

impl W<u32, Reg<u32, _IER>>[src]

pub fn drdy(&mut self) -> DRDY_W<'_>[src]

Bit 2 - Data Ready Interrupt Enable

pub fn ovr(&mut self) -> OVR_W<'_>[src]

Bit 3 - Overrun Interrupt Enable

impl W<u32, Reg<u32, _CR>>[src]

pub fn ten(&mut self) -> TEN_W<'_>[src]

Bit 0 - Transfer Enable

pub fn tdis(&mut self) -> TDIS_W<'_>[src]

Bit 1 - Transfer Disable

pub fn eclr(&mut self) -> ECLR_W<'_>[src]

Bit 8 - Error Clear

impl W<u32, Reg<u32, _IDR>>[src]

pub fn rcz(&mut self) -> RCZ_W<'_>[src]

Bit 0 - Reload Counter Zero

pub fn trc(&mut self) -> TRC_W<'_>[src]

Bit 1 - Transfer Complete

pub fn terr(&mut self) -> TERR_W<'_>[src]

Bit 2 - Transfer Error

impl W<u32, Reg<u32, _IER>>[src]

pub fn rcz(&mut self) -> RCZ_W<'_>[src]

Bit 0 - Reload Counter Zero

pub fn trc(&mut self) -> TRC_W<'_>[src]

Bit 1 - Transfer Complete

pub fn terr(&mut self) -> TERR_W<'_>[src]

Bit 2 - Transfer Error

impl W<u32, Reg<u32, _MARR>>[src]

pub fn marv(&mut self) -> MARV_W<'_>[src]

Bits 0:31 - Memory Address Reload Value

impl W<u32, Reg<u32, _MAR>>[src]

pub fn maddr(&mut self) -> MADDR_W<'_>[src]

Bits 0:31 - Memory Address

impl W<u32, Reg<u32, _MR>>[src]

pub fn size(&mut self) -> SIZE_W<'_>[src]

Bits 0:1 - Transfer size

pub fn etrig(&mut self) -> ETRIG_W<'_>[src]

Bit 2 - Event trigger

pub fn ring(&mut self) -> RING_W<'_>[src]

Bit 3 - Ring Buffer

impl W<u32, Reg<u32, _PCONTROL>>[src]

pub fn ch0en(&mut self) -> CH0EN_W<'_>[src]

Bit 0 - Channel 0 Enabled

pub fn ch1en(&mut self) -> CH1EN_W<'_>[src]

Bit 1 - Channel 1 Enabled.

pub fn ch0of(&mut self) -> CH0OF_W<'_>[src]

Bit 4 - Channel 0 Overflow Freeze

pub fn ch1of(&mut self) -> CH1OF_W<'_>[src]

Bit 5 - Channel 1 overflow freeze

pub fn ch0res(&mut self) -> CH0RES_W<'_>[src]

Bit 8 - Channel 0 counter reset

pub fn ch1res(&mut self) -> CH1RES_W<'_>[src]

Bit 9 - Channel 1 counter reset

pub fn mon0ch(&mut self) -> MON0CH_W<'_>[src]

Bits 16:21 - PDCA Channel to monitor with counter 0

pub fn mon1ch(&mut self) -> MON1CH_W<'_>[src]

Bits 24:29 - PDCA Channel to monitor with counter 1

impl W<u32, Reg<u32, _PSR>>[src]

pub fn pid(&mut self) -> PID_W<'_>[src]

Bits 0:7 - Peripheral Identifier

impl W<u32, Reg<u32, _TCRR>>[src]

pub fn tcrv(&mut self) -> TCRV_W<'_>[src]

Bits 0:15 - Transfer Counter Reload Value

impl W<u32, Reg<u32, _TCR>>[src]

pub fn tcv(&mut self) -> TCV_W<'_>[src]

Bits 0:15 - Transfer Counter Value

impl W<u32, Reg<u32, _CHDR>>[src]

pub fn chd(&mut self) -> CHD_W<'_>[src]

Bits 0:31 - Channel Disable

impl W<u32, Reg<u32, _CHER>>[src]

pub fn che(&mut self) -> CHE_W<'_>[src]

Bits 0:31 - Channel Enable

impl W<u32, Reg<u32, _CHMX>>[src]

pub fn evmx(&mut self) -> EVMX_W<'_>[src]

Bits 0:5 - Event Multiplexer

pub fn smx(&mut self) -> SMX_W<'_>[src]

Bit 8 - Software Event Multiplexer

impl W<u32, Reg<u32, _EVS>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Event Shaper Enable

pub fn igfr(&mut self) -> IGFR_W<'_>[src]

Bit 16 - Input Glitch Filter Rise

pub fn igff(&mut self) -> IGFF_W<'_>[src]

Bit 17 - Input Glitch Filter Fall

pub fn igfon(&mut self) -> IGFON_W<'_>[src]

Bit 18 - Input Glitch Filter Status

impl W<u32, Reg<u32, _IGFDR>>[src]

pub fn igfdr(&mut self) -> IGFDR_W<'_>[src]

Bits 0:3 - Input Glitch Filter Divider Register

impl W<u32, Reg<u32, _OVIDR>>[src]

pub fn ovid(&mut self) -> OVID_W<'_>[src]

Bits 0:31 - Overrun Interrupt Disable

impl W<u32, Reg<u32, _OVIER>>[src]

pub fn ovie(&mut self) -> OVIE_W<'_>[src]

Bits 0:31 - Overrun Interrupt Enable

impl W<u32, Reg<u32, _OVSCR>>[src]

pub fn ovsc(&mut self) -> OVSC_W<'_>[src]

Bits 0:31 - Overrun Interrupt Status Clear

impl W<u32, Reg<u32, _SEV>>[src]

pub fn sev(&mut self) -> SEV_W<'_>[src]

Bits 0:31 - Software Event

impl W<u32, Reg<u32, _TRIDR>>[src]

pub fn trid(&mut self) -> TRID_W<'_>[src]

Bits 0:31 - Trigger Interrupt Disable

impl W<u32, Reg<u32, _TRIER>>[src]

pub fn trie(&mut self) -> TRIE_W<'_>[src]

Bits 0:31 - Trigger Interrupt Enable

impl W<u32, Reg<u32, _TRSCR>>[src]

pub fn trsc(&mut self) -> TRSC_W<'_>[src]

Bits 0:31 - Trigger Interrupt Status Clear

impl W<u32, Reg<u32, _CFG>>[src]

pub fn source(&mut self) -> SOURCE_W<'_>[src]

Bits 0:1 - Source Enable Mode

pub fn action(&mut self) -> ACTION_W<'_>[src]

Bit 2 - Action to perform

pub fn match_(&mut self) -> MATCH_W<'_>[src]

Bits 8:15 - Data Match

impl W<u32, Reg<u32, _CR>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Enable

pub fn dis(&mut self) -> DIS_W<'_>[src]

Bit 1 - Disable

impl W<u32, Reg<u32, _AWEN>>[src]

pub fn awen(&mut self) -> AWEN_W<'_>[src]

Bits 0:31 - Asynchronous Wake Up

impl W<u32, Reg<u32, _CFDCTRL>>[src]

pub fn cfden(&mut self) -> CFDEN_W<'_>[src]

Bit 0 - Clock Failure Detection Enable

pub fn sfv(&mut self) -> SFV_W<'_>[src]

Bit 31 - Store Final Value

impl W<u32, Reg<u32, _CPUMASK>>[src]

pub fn ocd_(&mut self) -> OCD__W<'_>[src]

Bit 0 - OCD CPU Clock Mask

impl W<u32, Reg<u32, _CPUSEL>>[src]

pub fn cpusel(&mut self) -> CPUSEL_W<'_>[src]

Bits 0:2 - CPU Clock Select

pub fn cpudiv(&mut self) -> CPUDIV_W<'_>[src]

Bit 7 - CPU Division

impl W<u32, Reg<u32, _FASTSLEEP>>[src]

pub fn osc(&mut self) -> OSC_W<'_>[src]

Bit 0 - Oscillator

pub fn pll(&mut self) -> PLL_W<'_>[src]

Bit 8 - PLL

pub fn fastrcosc(&mut self) -> FASTRCOSC_W<'_>[src]

Bits 16:20 - RC80 or FLO

pub fn dfll(&mut self) -> DFLL_W<'_>[src]

Bit 24 - DFLL

impl W<u32, Reg<u32, _HSBMASK>>[src]

pub fn pdca_(&mut self) -> PDCA__W<'_>[src]

Bit 0 - PDCA HSB Clock Mask

pub fn hflashc_(&mut self) -> HFLASHC__W<'_>[src]

Bit 1 - HFLASHC HSB Clock Mask

pub fn hramc1_(&mut self) -> HRAMC1__W<'_>[src]

Bit 2 - HRAMC1 HSB Clock Mask

pub fn usbc_(&mut self) -> USBC__W<'_>[src]

Bit 3 - USBC HSB Clock Mask

pub fn crccu_(&mut self) -> CRCCU__W<'_>[src]

Bit 4 - CRCCU HSB Clock Mask

pub fn htop0_(&mut self) -> HTOP0__W<'_>[src]

Bit 5 - HTOP0 HSB Clock Mask

pub fn htop1_(&mut self) -> HTOP1__W<'_>[src]

Bit 6 - HTOP1 HSB Clock Mask

pub fn htop2_(&mut self) -> HTOP2__W<'_>[src]

Bit 7 - HTOP2 HSB Clock Mask

pub fn htop3_(&mut self) -> HTOP3__W<'_>[src]

Bit 8 - HTOP3 HSB Clock Mask

impl W<u32, Reg<u32, _ICR>>[src]

pub fn cfd(&mut self) -> CFD_W<'_>[src]

Bit 0 - Clock Failure Detected Interrupt Status Clear

pub fn ckrdy(&mut self) -> CKRDY_W<'_>[src]

Bit 5 - Clock Ready Interrupt Status Clear

pub fn wake(&mut self) -> WAKE_W<'_>[src]

Bit 8 - Wake up Interrupt Status Clear

pub fn ae(&mut self) -> AE_W<'_>[src]

Bit 31 - Access Error Interrupt Status Clear

impl W<u32, Reg<u32, _IDR>>[src]

pub fn cfd(&mut self) -> CFD_W<'_>[src]

Bit 0 - Clock Failure Detected Interrupt Disable

pub fn ckrdy(&mut self) -> CKRDY_W<'_>[src]

Bit 5 - Clock Ready Interrupt Disable

pub fn wake(&mut self) -> WAKE_W<'_>[src]

Bit 8 - Wake up Interrupt Disable

pub fn ae(&mut self) -> AE_W<'_>[src]

Bit 31 - Access Error Interrupt Disable

impl W<u32, Reg<u32, _IER>>[src]

pub fn cfd(&mut self) -> CFD_W<'_>[src]

Bit 0 - Clock Failure Detected Interrupt Enable

pub fn ckrdy(&mut self) -> CKRDY_W<'_>[src]

Bit 5 - Clock Ready Interrupt Enable

pub fn wake(&mut self) -> WAKE_W<'_>[src]

Bit 8 - Wake up Interrupt Enable

pub fn ae(&mut self) -> AE_W<'_>[src]

Bit 31 - Access Error Interrupt Enable

impl W<u32, Reg<u32, _MCCTRL>>[src]

pub fn mcsel(&mut self) -> MCSEL_W<'_>[src]

Bits 0:2 - Main Clock Select

impl W<u32, Reg<u32, _PBAMASK>>[src]

pub fn iisc_(&mut self) -> IISC__W<'_>[src]

Bit 0 - IISC APB Clock Enable

pub fn spi_(&mut self) -> SPI__W<'_>[src]

Bit 1 - SPI APB Clock Enable

pub fn tc0_(&mut self) -> TC0__W<'_>[src]

Bit 2 - TC0 APB Clock Enable

pub fn tc1_(&mut self) -> TC1__W<'_>[src]

Bit 3 - TC1 APB Clock Enable

pub fn twim0_(&mut self) -> TWIM0__W<'_>[src]

Bit 4 - TWIM0 APB Clock Enable

pub fn twis0_(&mut self) -> TWIS0__W<'_>[src]

Bit 5 - TWIS0 APB Clock Enable

pub fn twim1_(&mut self) -> TWIM1__W<'_>[src]

Bit 6 - TWIM1 APB Clock Enable

pub fn twis1_(&mut self) -> TWIS1__W<'_>[src]

Bit 7 - TWIS1 APB Clock Enable

pub fn usart0_(&mut self) -> USART0__W<'_>[src]

Bit 8 - USART0 APB Clock Enable

pub fn usart1_(&mut self) -> USART1__W<'_>[src]

Bit 9 - USART1 APB Clock Enable

pub fn usart2_(&mut self) -> USART2__W<'_>[src]

Bit 10 - USART2 APB Clock Enable

pub fn usart3_(&mut self) -> USART3__W<'_>[src]

Bit 11 - USART3 APB Clock Enable

pub fn adcife_(&mut self) -> ADCIFE__W<'_>[src]

Bit 12 - ADCIFE APB Clock Enable

pub fn dacc_(&mut self) -> DACC__W<'_>[src]

Bit 13 - DACC APB Clock Enable

pub fn acifc_(&mut self) -> ACIFC__W<'_>[src]

Bit 14 - ACIFC APB Clock Enable

pub fn gloc_(&mut self) -> GLOC__W<'_>[src]

Bit 15 - GLOC APB Clock Enable

pub fn abdacb_(&mut self) -> ABDACB__W<'_>[src]

Bit 16 - ABDACB APB Clock Enable

pub fn trng_(&mut self) -> TRNG__W<'_>[src]

Bit 17 - TRNG APB Clock Enable

pub fn parc_(&mut self) -> PARC__W<'_>[src]

Bit 18 - PARC APB Clock Enable

pub fn catb_(&mut self) -> CATB__W<'_>[src]

Bit 19 - CATB APB Clock Enable

pub fn twim2_(&mut self) -> TWIM2__W<'_>[src]

Bit 21 - TWIM2 APB Clock Enable

pub fn twim3_(&mut self) -> TWIM3__W<'_>[src]

Bit 22 - TWIM3 APB Clock Enable

impl W<u32, Reg<u32, _PBASEL>>[src]

pub fn pbsel(&mut self) -> PBSEL_W<'_>[src]

Bits 0:2 - PBA Clock Select

pub fn pbdiv(&mut self) -> PBDIV_W<'_>[src]

Bit 7 - PBA Division Select

impl W<u32, Reg<u32, _PBBMASK>>[src]

pub fn hflashc_(&mut self) -> HFLASHC__W<'_>[src]

Bit 0 - HFLASHC APB Clock Enable

pub fn hcache_(&mut self) -> HCACHE__W<'_>[src]

Bit 1 - HCACHE APB Clock Enable

pub fn hmatrix_(&mut self) -> HMATRIX__W<'_>[src]

Bit 2 - HMATRIX APB Clock Enable

pub fn pdca_(&mut self) -> PDCA__W<'_>[src]

Bit 3 - PDCA APB Clock Enable

pub fn crccu_(&mut self) -> CRCCU__W<'_>[src]

Bit 4 - CRCCU APB Clock Enable

pub fn usbc_(&mut self) -> USBC__W<'_>[src]

Bit 5 - USBC APB Clock Enable

pub fn pevc_(&mut self) -> PEVC__W<'_>[src]

Bit 6 - PEVC APB Clock Enable

impl W<u32, Reg<u32, _PBBSEL>>[src]

pub fn pbsel(&mut self) -> PBSEL_W<'_>[src]

Bits 0:2 - PBB Clock Select

pub fn pbdiv(&mut self) -> PBDIV_W<'_>[src]

Bit 7 - PBB Division Select

impl W<u32, Reg<u32, _PBCMASK>>[src]

pub fn pm_(&mut self) -> PM__W<'_>[src]

Bit 0 - PM APB Clock Enable

pub fn chipid_(&mut self) -> CHIPID__W<'_>[src]

Bit 1 - CHIPID APB Clock Enable

pub fn scif_(&mut self) -> SCIF__W<'_>[src]

Bit 2 - SCIF APB Clock Enable

pub fn freqm_(&mut self) -> FREQM__W<'_>[src]

Bit 3 - FREQM APB Clock Enable

pub fn gpio_(&mut self) -> GPIO__W<'_>[src]

Bit 4 - GPIO APB Clock Enable

impl W<u32, Reg<u32, _PBCSEL>>[src]

pub fn pbsel(&mut self) -> PBSEL_W<'_>[src]

Bits 0:2 - PBC Clock Select

pub fn pbdiv(&mut self) -> PBDIV_W<'_>[src]

Bit 7 - PBC Division Select

impl W<u32, Reg<u32, _PBDMASK>>[src]

pub fn bpm_(&mut self) -> BPM__W<'_>[src]

Bit 0 - BPM APB Clock Enable

pub fn bscif_(&mut self) -> BSCIF__W<'_>[src]

Bit 1 - BSCIF APB Clock Enable

pub fn ast_(&mut self) -> AST__W<'_>[src]

Bit 2 - AST APB Clock Enable

pub fn wdt_(&mut self) -> WDT__W<'_>[src]

Bit 3 - WDT APB Clock Enable

pub fn eic_(&mut self) -> EIC__W<'_>[src]

Bit 4 - EIC APB Clock Enable

pub fn picouart_(&mut self) -> PICOUART__W<'_>[src]

Bit 5 - PICOUART APB Clock Enable

impl W<u32, Reg<u32, _PBDSEL>>[src]

pub fn pbsel(&mut self) -> PBSEL_W<'_>[src]

Bits 0:2 - PBD Clock Select

pub fn pbdiv(&mut self) -> PBDIV_W<'_>[src]

Bit 7 - PBD Division Select

impl W<u32, Reg<u32, _PPCR>>[src]

pub fn rstpun(&mut self) -> RSTPUN_W<'_>[src]

Bit 0 - Reset Pullup

pub fn catbrcmask(&mut self) -> CATBRCMASK_W<'_>[src]

Bit 1 - CAT Request Clock Mask

pub fn acifcrcmask(&mut self) -> ACIFCRCMASK_W<'_>[src]

Bit 2 - ACIFC Request Clock Mask

pub fn astrcmask(&mut self) -> ASTRCMASK_W<'_>[src]

Bit 3 - AST Request Clock Mask

pub fn twis0rcmask(&mut self) -> TWIS0RCMASK_W<'_>[src]

Bit 4 - TWIS0 Request Clock Mask

pub fn twis1rcmask(&mut self) -> TWIS1RCMASK_W<'_>[src]

Bit 5 - TWIS1 Request Clock Mask

pub fn pevcrcmask(&mut self) -> PEVCRCMASK_W<'_>[src]

Bit 6 - PEVC Request Clock Mask

pub fn adcifercmask(&mut self) -> ADCIFERCMASK_W<'_>[src]

Bit 7 - ADCIFE Request Clock Mask

pub fn vregrcmask(&mut self) -> VREGRCMASK_W<'_>[src]

Bit 8 - VREG Request Clock Mask

pub fn fwbgref(&mut self) -> FWBGREF_W<'_>[src]

Bit 9 - Flash Wait BGREF

pub fn fwbod18(&mut self) -> FWBOD18_W<'_>[src]

Bit 10 - Flash Wait BOD18

impl W<u32, Reg<u32, _UNLOCK>>[src]

pub fn addr(&mut self) -> ADDR_W<'_>[src]

Bits 0:9 - Unlock Address

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 24:31 - Unlock Key

impl W<u32, Reg<u32, _DFLL0CONF>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Enable

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bit 1 - Mode Selection

pub fn stable(&mut self) -> STABLE_W<'_>[src]

Bit 2 - Stable DFLL Frequency

pub fn llaw(&mut self) -> LLAW_W<'_>[src]

Bit 3 - Lose Lock After Wake

pub fn ccdis(&mut self) -> CCDIS_W<'_>[src]

Bit 5 - Chill Cycle Disable

pub fn qldis(&mut self) -> QLDIS_W<'_>[src]

Bit 6 - Quick Lock Disable

pub fn range(&mut self) -> RANGE_W<'_>[src]

Bits 16:17 - Range Value

pub fn fcd(&mut self) -> FCD_W<'_>[src]

Bit 23 - Fuse Calibration Done

pub fn calib(&mut self) -> CALIB_W<'_>[src]

Bits 24:27 - Calibration Value

impl W<u32, Reg<u32, _DFLL0MUL>>[src]

pub fn mul(&mut self) -> MUL_W<'_>[src]

Bits 0:15 - DFLL Multiply Factor

impl W<u32, Reg<u32, _DFLL0SSG>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Enable

pub fn prbs(&mut self) -> PRBS_W<'_>[src]

Bit 1 - Pseudo Random Bit Sequence

pub fn amplitude(&mut self) -> AMPLITUDE_W<'_>[src]

Bits 8:12 - SSG Amplitude

pub fn stepsize(&mut self) -> STEPSIZE_W<'_>[src]

Bits 16:20 - SSG Step Size

impl W<u32, Reg<u32, _DFLL0STEP>>[src]

pub fn fstep(&mut self) -> FSTEP_W<'_>[src]

Bits 0:7 - Fine Maximum Step

pub fn cstep(&mut self) -> CSTEP_W<'_>[src]

Bits 16:20 - Coarse Maximum Step

impl W<u32, Reg<u32, _DFLL0SYNC>>[src]

pub fn sync(&mut self) -> SYNC_W<'_>[src]

Bit 0 - Synchronization

impl W<u32, Reg<u32, _DFLL0VAL>>[src]

pub fn fine(&mut self) -> FINE_W<'_>[src]

Bits 0:7 - Fine Value

pub fn coarse(&mut self) -> COARSE_W<'_>[src]

Bits 16:20 - Coarse Value

impl W<u32, Reg<u32, _FPCR>>[src]

pub fn fpen(&mut self) -> FPEN_W<'_>[src]

Bit 0 - High Resolution Prescaler Enable

pub fn cksel(&mut self) -> CKSEL_W<'_>[src]

Bits 1:3 - Clock Input Selection

impl W<u32, Reg<u32, _FPDIV>>[src]

pub fn fpdiv(&mut self) -> FPDIV_W<'_>[src]

Bits 0:15 - Fractional Prescaler Division Factor

impl W<u32, Reg<u32, _FPMUL>>[src]

pub fn fpmul(&mut self) -> FPMUL_W<'_>[src]

Bits 0:15 - Fractional Prescaler Multiplication Factor

impl W<u32, Reg<u32, _GCCTRL>>[src]

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 0 - Clock Enable

pub fn diven(&mut self) -> DIVEN_W<'_>[src]

Bit 1 - Divide Enable

pub fn oscsel(&mut self) -> OSCSEL_W<'_>[src]

Bits 8:12 - Clock Select

pub fn div(&mut self) -> DIV_W<'_>[src]

Bits 16:31 - Division Factor

impl W<u32, Reg<u32, _HRPCR>>[src]

pub fn hrpen(&mut self) -> HRPEN_W<'_>[src]

Bit 0 - High Resolution Prescaler Enable

pub fn cksel(&mut self) -> CKSEL_W<'_>[src]

Bits 1:3 - Clock Input Selection

pub fn hrcount(&mut self) -> HRCOUNT_W<'_>[src]

Bits 8:31 - High Resolution Counter

impl W<u32, Reg<u32, _ICR>>[src]

pub fn osc0rdy(&mut self) -> OSC0RDY_W<'_>[src]

Bit 0 - OSC0 Ready

pub fn dfll0lockc(&mut self) -> DFLL0LOCKC_W<'_>[src]

Bit 1 - DFLL0 Lock Coarse

pub fn dfll0lockf(&mut self) -> DFLL0LOCKF_W<'_>[src]

Bit 2 - DFLL0 Lock Fine

pub fn dfll0rdy(&mut self) -> DFLL0RDY_W<'_>[src]

Bit 3 - DFLL0 Ready

pub fn dfll0rcs(&mut self) -> DFLL0RCS_W<'_>[src]

Bit 4 - DFLL0 Reference Clock Stopped

pub fn dfll0oob(&mut self) -> DFLL0OOB_W<'_>[src]

Bit 5 - DFLL0 Out Of Bounds

pub fn pll0lock(&mut self) -> PLL0LOCK_W<'_>[src]

Bit 6 - PLL0 Lock

pub fn pll0locklost(&mut self) -> PLL0LOCKLOST_W<'_>[src]

Bit 7 - PLL0 Lock Lost

pub fn rcfastlock(&mut self) -> RCFASTLOCK_W<'_>[src]

Bit 13 - RCFAST Lock

pub fn rcfastlocklost(&mut self) -> RCFASTLOCKLOST_W<'_>[src]

Bit 14 - RCFAST Lock Lost

pub fn ae(&mut self) -> AE_W<'_>[src]

Bit 31 - Access Error

impl W<u32, Reg<u32, _IDR>>[src]

pub fn osc0rdy(&mut self) -> OSC0RDY_W<'_>[src]

Bit 0 - OSC0 Ready

pub fn dfll0lockc(&mut self) -> DFLL0LOCKC_W<'_>[src]

Bit 1 - DFLL0 Lock Coarse

pub fn dfll0lockf(&mut self) -> DFLL0LOCKF_W<'_>[src]

Bit 2 - DFLL0 Lock Fine

pub fn dfll0rdy(&mut self) -> DFLL0RDY_W<'_>[src]

Bit 3 - DFLL0 Ready

pub fn dfll0rcs(&mut self) -> DFLL0RCS_W<'_>[src]

Bit 4 - DFLL0 Reference Clock Stopped

pub fn dfll0oob(&mut self) -> DFLL0OOB_W<'_>[src]

Bit 5 - DFLL0 Out Of Bounds

pub fn pll0lock(&mut self) -> PLL0LOCK_W<'_>[src]

Bit 6 - PLL0 Lock

pub fn pll0locklost(&mut self) -> PLL0LOCKLOST_W<'_>[src]

Bit 7 - PLL0 Lock Lost

pub fn rcfastlock(&mut self) -> RCFASTLOCK_W<'_>[src]

Bit 13 - RCFAST Lock

pub fn rcfastlocklost(&mut self) -> RCFASTLOCKLOST_W<'_>[src]

Bit 14 - RCFAST Lock Lost

pub fn ae(&mut self) -> AE_W<'_>[src]

Bit 31 - Access Error

impl W<u32, Reg<u32, _IER>>[src]

pub fn osc0rdy(&mut self) -> OSC0RDY_W<'_>[src]

Bit 0 - OSC0 Ready

pub fn dfll0lockc(&mut self) -> DFLL0LOCKC_W<'_>[src]

Bit 1 - DFLL0 Lock Coarse

pub fn dfll0lockf(&mut self) -> DFLL0LOCKF_W<'_>[src]

Bit 2 - DFLL0 Lock Fine

pub fn dfll0rdy(&mut self) -> DFLL0RDY_W<'_>[src]

Bit 3 - DFLL0 Ready

pub fn dfll0rcs(&mut self) -> DFLL0RCS_W<'_>[src]

Bit 4 - DFLL0 Reference Clock Stopped

pub fn dfll0oob(&mut self) -> DFLL0OOB_W<'_>[src]

Bit 5 - DFLL0 Out Of Bounds

pub fn pll0lock(&mut self) -> PLL0LOCK_W<'_>[src]

Bit 6 - PLL0 Lock

pub fn pll0locklost(&mut self) -> PLL0LOCKLOST_W<'_>[src]

Bit 7 - PLL0 Lock Lost

pub fn rcfastlock(&mut self) -> RCFASTLOCK_W<'_>[src]

Bit 13 - RCFAST Lock

pub fn rcfastlocklost(&mut self) -> RCFASTLOCKLOST_W<'_>[src]

Bit 14 - RCFAST Lock Lost

pub fn ae(&mut self) -> AE_W<'_>[src]

Bit 31 - Access Error

impl W<u32, Reg<u32, _OSCCTRL0>>[src]

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bit 0 - Oscillator Mode

pub fn gain(&mut self) -> GAIN_W<'_>[src]

Bits 1:2 - Gain

pub fn agc(&mut self) -> AGC_W<'_>[src]

Bit 3 - Automatic Gain Control

pub fn startup(&mut self) -> STARTUP_W<'_>[src]

Bits 8:11 - Oscillator Start-up Time

pub fn oscen(&mut self) -> OSCEN_W<'_>[src]

Bit 16 - Oscillator Enable

impl W<u32, Reg<u32, _PLL>>[src]

pub fn pllen(&mut self) -> PLLEN_W<'_>[src]

Bit 0 - PLL Enable

pub fn pllosc(&mut self) -> PLLOSC_W<'_>[src]

Bits 1:2 - PLL Oscillator Select

pub fn pllopt(&mut self) -> PLLOPT_W<'_>[src]

Bits 3:5 - PLL Option

pub fn plldiv(&mut self) -> PLLDIV_W<'_>[src]

Bits 8:11 - PLL Division Factor

pub fn pllmul(&mut self) -> PLLMUL_W<'_>[src]

Bits 16:19 - PLL Multiply Factor

pub fn pllcount(&mut self) -> PLLCOUNT_W<'_>[src]

Bits 24:29 - PLL Count

impl W<u32, Reg<u32, _RCCR>>[src]

pub fn calib(&mut self) -> CALIB_W<'_>[src]

Bits 0:9 - Calibration Value

pub fn fcd(&mut self) -> FCD_W<'_>[src]

Bit 16 - Flash Calibration Done

impl W<u32, Reg<u32, _RCFASTCFG>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Oscillator Enable

pub fn tuneen(&mut self) -> TUNEEN_W<'_>[src]

Bit 1 - Tuner Enable

pub fn jitmode(&mut self) -> JITMODE_W<'_>[src]

Bit 2 - Jitter Mode

pub fn nbperiods(&mut self) -> NBPERIODS_W<'_>[src]

Bits 4:6 - Number of 32kHz Periods

pub fn fcd(&mut self) -> FCD_W<'_>[src]

Bit 7 - RCFAST Fuse Calibration Done

pub fn frange(&mut self) -> FRANGE_W<'_>[src]

Bits 8:9 - Frequency Range

pub fn lockmargin(&mut self) -> LOCKMARGIN_W<'_>[src]

Bits 12:15 - Accepted Count Error for Lock

pub fn calib(&mut self) -> CALIB_W<'_>[src]

Bits 16:22 - Oscillator Calibration Value

impl W<u32, Reg<u32, _RCFASTSR>>[src]

pub fn curtrim(&mut self) -> CURTRIM_W<'_>[src]

Bits 0:6 - Current Trim Value

pub fn cnterr(&mut self) -> CNTERR_W<'_>[src]

Bits 16:20 - Current Count Error

pub fn sign(&mut self) -> SIGN_W<'_>[src]

Bit 21 - Sign of Current Count Error

pub fn lock(&mut self) -> LOCK_W<'_>[src]

Bit 24 - Lock

pub fn locklost(&mut self) -> LOCKLOST_W<'_>[src]

Bit 25 - Lock Lost

pub fn updated(&mut self) -> UPDATED_W<'_>[src]

Bit 31 - Current Trim Value Updated

impl W<u32, Reg<u32, _RC80MCR>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Enable

pub fn fcd(&mut self) -> FCD_W<'_>[src]

Bit 7 - Flash Calibration Done

pub fn calib(&mut self) -> CALIB_W<'_>[src]

Bits 16:17 - Calibration Value

impl W<u32, Reg<u32, _UNLOCK>>[src]

pub fn addr(&mut self) -> ADDR_W<'_>[src]

Bits 0:9 - Unlock Address

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 24:31 - Unlock Key

impl W<u32, Reg<u32, _ADDR>>[src]

pub fn addr(&mut self) -> ADDR_W<'_>[src]

Bits 2:31 - Address Value

impl W<u32, Reg<u32, _CR>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - Enable

pub fn dis(&mut self) -> DIS_W<'_>[src]

Bit 1 - Disable

pub fn crc(&mut self) -> CRC_W<'_>[src]

Bit 2 - User Page Read

pub fn fspr(&mut self) -> FSPR_W<'_>[src]

Bit 3 - Flash Supplementary Page Read

pub fn ce(&mut self) -> CE_W<'_>[src]

Bit 4 - Chip Erase

impl W<u32, Reg<u32, _DATA>>[src]

pub fn data(&mut self) -> DATA_W<'_>[src]

Bits 0:31 - Generic data register

impl W<u32, Reg<u32, _LENGTH>>[src]

pub fn length(&mut self) -> LENGTH_W<'_>[src]

Bits 2:31 - Length Register

impl W<u32, Reg<u32, _SCR>>[src]

pub fn done(&mut self) -> DONE_W<'_>[src]

Bit 0 - Done

pub fn hcr(&mut self) -> HCR_W<'_>[src]

Bit 1 - Hold Core Register

pub fn berr(&mut self) -> BERR_W<'_>[src]

Bit 2 - Bus error

pub fn fail(&mut self) -> FAIL_W<'_>[src]

Bit 3 - Failure

pub fn lck(&mut self) -> LCK_W<'_>[src]

Bit 4 - Lock error

impl W<u32, Reg<u32, _CR>>[src]

pub fn spien(&mut self) -> SPIEN_W<'_>[src]

Bit 0 - SPI Enable

pub fn spidis(&mut self) -> SPIDIS_W<'_>[src]

Bit 1 - SPI Disable

pub fn swrst(&mut self) -> SWRST_W<'_>[src]

Bit 7 - SPI Software Reset

pub fn flushfifo(&mut self) -> FLUSHFIFO_W<'_>[src]

Bit 8 - Flush FIFO command

pub fn lastxfer(&mut self) -> LASTXFER_W<'_>[src]

Bit 24 - Last Transfer

impl W<u32, Reg<u32, _CSR>>[src]

pub fn cpol(&mut self) -> CPOL_W<'_>[src]

Bit 0 - Clock Polarity

pub fn ncpha(&mut self) -> NCPHA_W<'_>[src]

Bit 1 - Clock Phase

pub fn csnaat(&mut self) -> CSNAAT_W<'_>[src]

Bit 2 - Chip Select Not Active After Transfer

pub fn csaat(&mut self) -> CSAAT_W<'_>[src]

Bit 3 - Chip Select Active After Transfer

pub fn bits_(&mut self) -> BITS_W<'_>[src]

Bits 4:7 - Bits Per Transfer

pub fn scbr(&mut self) -> SCBR_W<'_>[src]

Bits 8:15 - Serial Clock Baud Rate

pub fn dlybs(&mut self) -> DLYBS_W<'_>[src]

Bits 16:23 - Delay Before SPCK

pub fn dlybct(&mut self) -> DLYBCT_W<'_>[src]

Bits 24:31 - Delay Between Consecutive Transfers

impl W<u32, Reg<u32, _IDR>>[src]

pub fn rdrf(&mut self) -> RDRF_W<'_>[src]

Bit 0 - Receive Data Register Full Interrupt Disable

pub fn tdre(&mut self) -> TDRE_W<'_>[src]

Bit 1 - Transmit Data Register Empty Interrupt Disable

pub fn modf(&mut self) -> MODF_W<'_>[src]

Bit 2 - Mode Fault Error Interrupt Disable

pub fn ovres(&mut self) -> OVRES_W<'_>[src]

Bit 3 - Overrun Error Interrupt Disable

pub fn endrx(&mut self) -> ENDRX_W<'_>[src]

Bit 4 - End of Receive Buffer Interrupt Disable

pub fn endtx(&mut self) -> ENDTX_W<'_>[src]

Bit 5 - End of Transmit Buffer Interrupt Disable

pub fn rxbuff(&mut self) -> RXBUFF_W<'_>[src]

Bit 6 - Receive Buffer Full Interrupt Disable

pub fn txbufe(&mut self) -> TXBUFE_W<'_>[src]

Bit 7 - Transmit Buffer Empty Interrupt Disable

pub fn nssr(&mut self) -> NSSR_W<'_>[src]

Bit 8 - NSS Rising Interrupt Disable

pub fn txempty(&mut self) -> TXEMPTY_W<'_>[src]

Bit 9 - Transmission Registers Empty Disable

pub fn undes(&mut self) -> UNDES_W<'_>[src]

Bit 10 - Underrun Error Interrupt Disable

impl W<u32, Reg<u32, _IER>>[src]

pub fn rdrf(&mut self) -> RDRF_W<'_>[src]

Bit 0 - Receive Data Register Full Interrupt Enable

pub fn tdre(&mut self) -> TDRE_W<'_>[src]

Bit 1 - Transmit Data Register Empty Interrupt Enable

pub fn modf(&mut self) -> MODF_W<'_>[src]

Bit 2 - Mode Fault Error Interrupt Enable

pub fn ovres(&mut self) -> OVRES_W<'_>[src]

Bit 3 - Overrun Error Interrupt Enable

pub fn endrx(&mut self) -> ENDRX_W<'_>[src]

Bit 4 - End of Receive Buffer Interrupt Enable

pub fn endtx(&mut self) -> ENDTX_W<'_>[src]

Bit 5 - End of Transmit Buffer Interrupt Enable

pub fn rxbuff(&mut self) -> RXBUFF_W<'_>[src]

Bit 6 - Receive Buffer Full Interrupt Enable

pub fn txbufe(&mut self) -> TXBUFE_W<'_>[src]

Bit 7 - Transmit Buffer Empty Interrupt Enable

pub fn nssr(&mut self) -> NSSR_W<'_>[src]

Bit 8 - NSS Rising Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W<'_>[src]

Bit 9 - Transmission Registers Empty Enable

pub fn undes(&mut self) -> UNDES_W<'_>[src]

Bit 10 - Underrun Error Interrupt Enable

impl W<u32, Reg<u32, _MR>>[src]

pub fn mstr(&mut self) -> MSTR_W<'_>[src]

Bit 0 - Master/Slave Mode

pub fn ps(&mut self) -> PS_W<'_>[src]

Bit 1 - Peripheral Select

pub fn pcsdec(&mut self) -> PCSDEC_W<'_>[src]

Bit 2 - Chip Select Decode

pub fn modfdis(&mut self) -> MODFDIS_W<'_>[src]

Bit 4 - Mode Fault Detection

pub fn wdrbt(&mut self) -> WDRBT_W<'_>[src]

Bit 5 - wait data read before transfer

pub fn rxfifoen(&mut self) -> RXFIFOEN_W<'_>[src]

Bit 6 - FIFO in Reception Enable

pub fn llb(&mut self) -> LLB_W<'_>[src]

Bit 7 - Local Loopback Enable

pub fn pcs(&mut self) -> PCS_W<'_>[src]

Bits 16:19 - Peripheral Chip Select

pub fn dlybcs(&mut self) -> DLYBCS_W<'_>[src]

Bits 24:31 - Delay Between Chip Selects

impl W<u32, Reg<u32, _TDR>>[src]

pub fn td(&mut self) -> TD_W<'_>[src]

Bits 0:15 - Transmit Data

pub fn pcs(&mut self) -> PCS_W<'_>[src]

Bits 16:19 - Peripheral Chip Select

pub fn lastxfer(&mut self) -> LASTXFER_W<'_>[src]

Bit 24 - Last Transfer

impl W<u32, Reg<u32, _WPCR>>[src]

pub fn wpen(&mut self) -> WPEN_W<'_>[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&mut self) -> WPKEY_W<'_>[src]

Bits 8:31 - Write Protection Key Password

impl W<u32, Reg<u32, _BCR>>[src]

pub fn sync(&mut self) -> SYNC_W<'_>[src]

Bit 0 - Synchro Command

impl W<u32, Reg<u32, _BMR>>[src]

pub fn tc0xc0s(&mut self) -> TC0XC0S_W<'_>[src]

Bits 0:1 - External Clock Signal 0 Selection

pub fn tc1xc1s(&mut self) -> TC1XC1S_W<'_>[src]

Bits 2:3 - External Clock Signal 1 Selection

pub fn tc2xc2s(&mut self) -> TC2XC2S_W<'_>[src]

Bits 4:5 - External Clock Signal 2 Selection

impl W<u32, Reg<u32, _CCR>>[src]

pub fn clken(&mut self) -> CLKEN_W<'_>[src]

Bit 0 - Counter Clock Enable Command

pub fn clkdis(&mut self) -> CLKDIS_W<'_>[src]

Bit 1 - Counter Clock Disable Command

pub fn swtrg(&mut self) -> SWTRG_W<'_>[src]

Bit 2 - Software Trigger Command

impl W<u32, Reg<u32, _CMR>>[src]

pub fn tcclks(&mut self) -> TCCLKS_W<'_>[src]

Bits 0:2 - Clock Selection

pub fn clki(&mut self) -> CLKI_W<'_>[src]

Bit 3 - Clock Invert

pub fn burst(&mut self) -> BURST_W<'_>[src]

Bits 4:5 - Burst Signal Selection

pub fn ldbstop(&mut self) -> LDBSTOP_W<'_>[src]

Bit 6 - Counter Clock Stopped with RB Loading

pub fn ldbdis(&mut self) -> LDBDIS_W<'_>[src]

Bit 7 - Counter Clock Disable with RB Loading

pub fn etrgedg(&mut self) -> ETRGEDG_W<'_>[src]

Bits 8:9 - External Trigger Edge Selection

pub fn abetrg(&mut self) -> ABETRG_W<'_>[src]

Bit 10 - TIOA or TIOB External Trigger Selection

pub fn cpctrg(&mut self) -> CPCTRG_W<'_>[src]

Bit 14 - RC Compare Trigger Enable

pub fn wave(&mut self) -> WAVE_W<'_>[src]

Bit 15 - Wave

pub fn ldra(&mut self) -> LDRA_W<'_>[src]

Bits 16:17 - RA Loading Selection

pub fn ldrb(&mut self) -> LDRB_W<'_>[src]

Bits 18:19 - RB Loading Selection

impl W<u32, Reg<u32, _CMR_ALT>>[src]

pub fn tcclks(&mut self) -> TCCLKS_W<'_>[src]

Bits 0:2 - Clock Selection

pub fn clki(&mut self) -> CLKI_W<'_>[src]

Bit 3 - Clock Invert

pub fn burst(&mut self) -> BURST_W<'_>[src]

Bits 4:5 - Burst Signal Selection

pub fn cpcstop(&mut self) -> CPCSTOP_W<'_>[src]

Bit 6 - Counter Clock Stopped with RC Compare

pub fn cpcdis(&mut self) -> CPCDIS_W<'_>[src]

Bit 7 - Counter Clock Disable with RC Compare

pub fn eevtedg(&mut self) -> EEVTEDG_W<'_>[src]

Bits 8:9 - External Event Edge Selection

pub fn eevt(&mut self) -> EEVT_W<'_>[src]

Bits 10:11 - External Event Selection

pub fn enetrg(&mut self) -> ENETRG_W<'_>[src]

Bit 12 - External Event Trigger Enable

pub fn wavsel(&mut self) -> WAVSEL_W<'_>[src]

Bits 13:14 - Waveform Selection

pub fn wave(&mut self) -> WAVE_W<'_>[src]

Bit 15 - WAVE

pub fn acpa(&mut self) -> ACPA_W<'_>[src]

Bits 16:17 - RA Compare Effect on TIOA

pub fn acpc(&mut self) -> ACPC_W<'_>[src]

Bits 18:19 - RC Compare Effect on TIOA

pub fn aeevt(&mut self) -> AEEVT_W<'_>[src]

Bits 20:21 - External Event Effect on TIOA

pub fn aswtrg(&mut self) -> ASWTRG_W<'_>[src]

Bits 22:23 - Software Trigger Effect on TIOA

pub fn bcpb(&mut self) -> BCPB_W<'_>[src]

Bits 24:25 - RB Compare Effect on TIOB

pub fn bcpc(&mut self) -> BCPC_W<'_>[src]

Bits 26:27 - RC Compare Effect on TIOB

pub fn beevt(&mut self) -> BEEVT_W<'_>[src]

Bits 28:29 - External Event Effect on TIOB

pub fn bswtrg(&mut self) -> BSWTRG_W<'_>[src]

Bits 30:31 - Software Trigger Effect on TIOB

impl W<u32, Reg<u32, _IDR>>[src]

pub fn covfs(&mut self) -> COVFS_W<'_>[src]

Bit 0 - Counter Overflow

pub fn lovrs(&mut self) -> LOVRS_W<'_>[src]

Bit 1 - Load Overrun

pub fn cpas(&mut self) -> CPAS_W<'_>[src]

Bit 2 - RA Compare

pub fn cpbs(&mut self) -> CPBS_W<'_>[src]

Bit 3 - RB Compare

pub fn cpcs(&mut self) -> CPCS_W<'_>[src]

Bit 4 - RC Compare

pub fn ldras(&mut self) -> LDRAS_W<'_>[src]

Bit 5 - RA Loading

pub fn ldrbs(&mut self) -> LDRBS_W<'_>[src]

Bit 6 - RB Loading

pub fn etrgs(&mut self) -> ETRGS_W<'_>[src]

Bit 7 - External Trigger

impl W<u32, Reg<u32, _IER>>[src]

pub fn covfs(&mut self) -> COVFS_W<'_>[src]

Bit 0 - Counter Overflow

pub fn lovrs(&mut self) -> LOVRS_W<'_>[src]

Bit 1 - Load Overrun

pub fn cpas(&mut self) -> CPAS_W<'_>[src]

Bit 2 - RA Compare

pub fn cpbs(&mut self) -> CPBS_W<'_>[src]

Bit 3 - RB Compare

pub fn cpcs(&mut self) -> CPCS_W<'_>[src]

Bit 4 - RC Compare

pub fn ldras(&mut self) -> LDRAS_W<'_>[src]

Bit 5 - RA Loading

pub fn ldrbs(&mut self) -> LDRBS_W<'_>[src]

Bit 6 - RB Loading

pub fn etrgs(&mut self) -> ETRGS_W<'_>[src]

Bit 7 - External Trigger

impl W<u32, Reg<u32, _RA>>[src]

pub fn ra(&mut self) -> RA_W<'_>[src]

Bits 0:15 - Register A

impl W<u32, Reg<u32, _RB>>[src]

pub fn rb(&mut self) -> RB_W<'_>[src]

Bits 0:15 - Register B

impl W<u32, Reg<u32, _RC>>[src]

pub fn rc(&mut self) -> RC_W<'_>[src]

Bits 0:15 - Register C

impl W<u32, Reg<u32, _SMMR>>[src]

pub fn gcen(&mut self) -> GCEN_W<'_>[src]

Bit 0 - Gray Count Enable

pub fn down(&mut self) -> DOWN_W<'_>[src]

Bit 1 - Down Count

impl W<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&mut self) -> WPEN_W<'_>[src]

Bit 0 - Write Protect Enable

pub fn wpkey(&mut self) -> WPKEY_W<'_>[src]

Bits 8:31 - Write Protect Key

impl W<u32, Reg<u32, _CR>>[src]

pub fn enable(&mut self) -> ENABLE_W<'_>[src]

Bit 0 - Enables the TRNG to provide random values

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 8:31 - Security Key

impl W<u32, Reg<u32, _IDR>>[src]

pub fn datrdy(&mut self) -> DATRDY_W<'_>[src]

Bit 0 - Data Ready Interrupt Disable

impl W<u32, Reg<u32, _IER>>[src]

pub fn datrdy(&mut self) -> DATRDY_W<'_>[src]

Bit 0 - Data Ready Interrupt Enable

impl W<u32, Reg<u32, _CMDR>>[src]

pub fn read(&mut self) -> READ_W<'_>[src]

Bit 0 - Transfer Direction

pub fn sadr(&mut self) -> SADR_W<'_>[src]

Bits 1:10 - Slave Address

pub fn tenbit(&mut self) -> TENBIT_W<'_>[src]

Bit 11 - Ten Bit Addressing Mode

pub fn repsame(&mut self) -> REPSAME_W<'_>[src]

Bit 12 - Transfer is to same address as previous address

pub fn start(&mut self) -> START_W<'_>[src]

Bit 13 - Send START condition

pub fn stop(&mut self) -> STOP_W<'_>[src]

Bit 14 - Send STOP condition

pub fn valid(&mut self) -> VALID_W<'_>[src]

Bit 15 - CMDR Valid

pub fn nbytes(&mut self) -> NBYTES_W<'_>[src]

Bits 16:23 - Number of data bytes in transfer

pub fn pecen(&mut self) -> PECEN_W<'_>[src]

Bit 24 - Packet Error Checking Enable

pub fn acklast(&mut self) -> ACKLAST_W<'_>[src]

Bit 25 - ACK Last Master RX Byte

pub fn hs(&mut self) -> HS_W<'_>[src]

Bit 26 - HS-mode

pub fn hsmcode(&mut self) -> HSMCODE_W<'_>[src]

Bits 28:30 - HS-mode Master Code

impl W<u32, Reg<u32, _CR>>[src]

pub fn men(&mut self) -> MEN_W<'_>[src]

Bit 0 - Master Enable

pub fn mdis(&mut self) -> MDIS_W<'_>[src]

Bit 1 - Master Disable

pub fn smen(&mut self) -> SMEN_W<'_>[src]

Bit 4 - SMBus Enable

pub fn smdis(&mut self) -> SMDIS_W<'_>[src]

Bit 5 - SMBus Disable

pub fn swrst(&mut self) -> SWRST_W<'_>[src]

Bit 7 - Software Reset

pub fn stop(&mut self) -> STOP_W<'_>[src]

Bit 8 - Stop the current transfer

impl W<u32, Reg<u32, _CWGR>>[src]

pub fn low(&mut self) -> LOW_W<'_>[src]

Bits 0:7 - Clock Low Cycles

pub fn high(&mut self) -> HIGH_W<'_>[src]

Bits 8:15 - Clock High Cycles

pub fn stasto(&mut self) -> STASTO_W<'_>[src]

Bits 16:23 - START and STOP Cycles

pub fn data(&mut self) -> DATA_W<'_>[src]

Bits 24:27 - Data Setup and Hold Cycles

pub fn exp(&mut self) -> EXP_W<'_>[src]

Bits 28:30 - Clock Prescaler

impl W<u32, Reg<u32, _HSCWGR>>[src]

pub fn low(&mut self) -> LOW_W<'_>[src]

Bits 0:7 - Clock Low Cycles

pub fn high(&mut self) -> HIGH_W<'_>[src]

Bits 8:15 - Clock High Cycles

pub fn stasto(&mut self) -> STASTO_W<'_>[src]

Bits 16:23 - START and STOP Cycles

pub fn data(&mut self) -> DATA_W<'_>[src]

Bits 24:27 - Data Setup and Hold Cycles

pub fn exp(&mut self) -> EXP_W<'_>[src]

Bits 28:30 - Clock Prescaler

impl W<u32, Reg<u32, _HSSRR>>[src]

pub fn dadrivel(&mut self) -> DADRIVEL_W<'_>[src]

Bits 0:2 - Data Drive Strength LOW

pub fn daslew(&mut self) -> DASLEW_W<'_>[src]

Bits 8:9 - Data Slew Limit

pub fn cldrivel(&mut self) -> CLDRIVEL_W<'_>[src]

Bits 16:18 - Clock Drive Strength LOW

pub fn cldriveh(&mut self) -> CLDRIVEH_W<'_>[src]

Bits 20:21 - Clock Drive Strength HIGH

pub fn clslew(&mut self) -> CLSLEW_W<'_>[src]

Bits 24:25 - Clock Slew Limit

pub fn filter(&mut self) -> FILTER_W<'_>[src]

Bits 28:29 - Input Spike Filter Control

impl W<u32, Reg<u32, _IDR>>[src]

pub fn rxrdy(&mut self) -> RXRDY_W<'_>[src]

Bit 0 - RHR Data Ready

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 1 - THR Data Ready

pub fn crdy(&mut self) -> CRDY_W<'_>[src]

Bit 2 - Ready for More Commands

pub fn ccomp(&mut self) -> CCOMP_W<'_>[src]

Bit 3 - Command Complete

pub fn idle(&mut self) -> IDLE_W<'_>[src]

Bit 4 - Master Interface is Idle

pub fn busfree(&mut self) -> BUSFREE_W<'_>[src]

Bit 5 - Two-wire Bus is Free

pub fn anak(&mut self) -> ANAK_W<'_>[src]

Bit 8 - NAK in Address Phase Received

pub fn dnak(&mut self) -> DNAK_W<'_>[src]

Bit 9 - NAK in Data Phase Received

pub fn arblst(&mut self) -> ARBLST_W<'_>[src]

Bit 10 - Arbitration Lost

pub fn smbalert(&mut self) -> SMBALERT_W<'_>[src]

Bit 11 - SMBus Alert

pub fn tout(&mut self) -> TOUT_W<'_>[src]

Bit 12 - Timeout

pub fn pecerr(&mut self) -> PECERR_W<'_>[src]

Bit 13 - PEC Error

pub fn stop(&mut self) -> STOP_W<'_>[src]

Bit 14 - Stop Request Accepted

pub fn hsmcack(&mut self) -> HSMCACK_W<'_>[src]

Bit 17 - ACK in HS-mode Master Code Phase Received

impl W<u32, Reg<u32, _IER>>[src]

pub fn rxrdy(&mut self) -> RXRDY_W<'_>[src]

Bit 0 - RHR Data Ready

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 1 - THR Data Ready

pub fn crdy(&mut self) -> CRDY_W<'_>[src]

Bit 2 - Ready for More Commands

pub fn ccomp(&mut self) -> CCOMP_W<'_>[src]

Bit 3 - Command Complete

pub fn idle(&mut self) -> IDLE_W<'_>[src]

Bit 4 - Master Interface is Idle

pub fn busfree(&mut self) -> BUSFREE_W<'_>[src]

Bit 5 - Two-wire Bus is Free

pub fn anak(&mut self) -> ANAK_W<'_>[src]

Bit 8 - NAK in Address Phase Received

pub fn dnak(&mut self) -> DNAK_W<'_>[src]

Bit 9 - NAK in Data Phase Received

pub fn arblst(&mut self) -> ARBLST_W<'_>[src]

Bit 10 - Arbitration Lost

pub fn smbalert(&mut self) -> SMBALERT_W<'_>[src]

Bit 11 - SMBus Alert

pub fn tout(&mut self) -> TOUT_W<'_>[src]

Bit 12 - Timeout

pub fn pecerr(&mut self) -> PECERR_W<'_>[src]

Bit 13 - PEC Error

pub fn stop(&mut self) -> STOP_W<'_>[src]

Bit 14 - Stop Request Accepted

pub fn hsmcack(&mut self) -> HSMCACK_W<'_>[src]

Bit 17 - ACK in HS-mode Master Code Phase Received

impl W<u32, Reg<u32, _NCMDR>>[src]

pub fn read(&mut self) -> READ_W<'_>[src]

Bit 0 - Transfer Direction

pub fn sadr(&mut self) -> SADR_W<'_>[src]

Bits 1:10 - Slave Address

pub fn tenbit(&mut self) -> TENBIT_W<'_>[src]

Bit 11 - Ten Bit Addressing Mode

pub fn repsame(&mut self) -> REPSAME_W<'_>[src]

Bit 12 - Transfer is to same address as previous address

pub fn start(&mut self) -> START_W<'_>[src]

Bit 13 - Send START condition

pub fn stop(&mut self) -> STOP_W<'_>[src]

Bit 14 - Send STOP condition

pub fn valid(&mut self) -> VALID_W<'_>[src]

Bit 15 - CMDR Valid

pub fn nbytes(&mut self) -> NBYTES_W<'_>[src]

Bits 16:23 - Number of data bytes in transfer

pub fn pecen(&mut self) -> PECEN_W<'_>[src]

Bit 24 - Packet Error Checking Enable

pub fn acklast(&mut self) -> ACKLAST_W<'_>[src]

Bit 25 - ACK Last Master RX Byte

pub fn hs(&mut self) -> HS_W<'_>[src]

Bit 26 - HS-mode

pub fn hsmcode(&mut self) -> HSMCODE_W<'_>[src]

Bits 28:30 - HS-mode Master Code

impl W<u32, Reg<u32, _SCR>>[src]

pub fn ccomp(&mut self) -> CCOMP_W<'_>[src]

Bit 3 - Command Complete

pub fn anak(&mut self) -> ANAK_W<'_>[src]

Bit 8 - NAK in Address Phase Received

pub fn dnak(&mut self) -> DNAK_W<'_>[src]

Bit 9 - NAK in Data Phase Received

pub fn arblst(&mut self) -> ARBLST_W<'_>[src]

Bit 10 - Arbitration Lost

pub fn smbalert(&mut self) -> SMBALERT_W<'_>[src]

Bit 11 - SMBus Alert

pub fn tout(&mut self) -> TOUT_W<'_>[src]

Bit 12 - Timeout

pub fn pecerr(&mut self) -> PECERR_W<'_>[src]

Bit 13 - PEC Error

pub fn stop(&mut self) -> STOP_W<'_>[src]

Bit 14 - Stop Request Accepted

pub fn hsmcack(&mut self) -> HSMCACK_W<'_>[src]

Bit 17 - ACK in HS-mode Master Code Phase Received

impl W<u32, Reg<u32, _SMBTR>>[src]

pub fn tlows(&mut self) -> TLOWS_W<'_>[src]

Bits 0:7 - Slave Clock stretch maximum cycles

pub fn tlowm(&mut self) -> TLOWM_W<'_>[src]

Bits 8:15 - Master Clock stretch maximum cycles

pub fn thmax(&mut self) -> THMAX_W<'_>[src]

Bits 16:23 - Clock High maximum cycles

pub fn exp(&mut self) -> EXP_W<'_>[src]

Bits 28:31 - SMBus Timeout Clock prescaler

impl W<u32, Reg<u32, _SRR>>[src]

pub fn dadrivel(&mut self) -> DADRIVEL_W<'_>[src]

Bits 0:2 - Data Drive Strength LOW

pub fn daslew(&mut self) -> DASLEW_W<'_>[src]

Bits 8:9 - Data Slew Limit

pub fn cldrivel(&mut self) -> CLDRIVEL_W<'_>[src]

Bits 16:18 - Clock Drive Strength LOW

pub fn clslew(&mut self) -> CLSLEW_W<'_>[src]

Bits 24:25 - Clock Slew Limit

pub fn filter(&mut self) -> FILTER_W<'_>[src]

Bits 28:29 - Input Spike Filter Control

impl W<u32, Reg<u32, _THR>>[src]

pub fn txdata(&mut self) -> TXDATA_W<'_>[src]

Bits 0:7 - Data to Transmit

impl W<u32, Reg<u32, _CR>>[src]

pub fn sen(&mut self) -> SEN_W<'_>[src]

Bit 0 - Slave Enable

pub fn smen(&mut self) -> SMEN_W<'_>[src]

Bit 1 - SMBus Mode Enable

pub fn smatch(&mut self) -> SMATCH_W<'_>[src]

Bit 2 - Slave Address Match

pub fn gcmatch(&mut self) -> GCMATCH_W<'_>[src]

Bit 3 - General Call Address Match

pub fn stren(&mut self) -> STREN_W<'_>[src]

Bit 4 - Clock Stretch Enable

pub fn swrst(&mut self) -> SWRST_W<'_>[src]

Bit 7 - Software Reset

pub fn smbalert(&mut self) -> SMBALERT_W<'_>[src]

Bit 8 - SMBus Alert

pub fn smda(&mut self) -> SMDA_W<'_>[src]

Bit 9 - SMBus Default Address

pub fn smhh(&mut self) -> SMHH_W<'_>[src]

Bit 10 - SMBus Host Header

pub fn pecen(&mut self) -> PECEN_W<'_>[src]

Bit 11 - Packet Error Checking Enable

pub fn ack(&mut self) -> ACK_W<'_>[src]

Bit 12 - Slave Receiver Data Phase ACK Value

pub fn cup(&mut self) -> CUP_W<'_>[src]

Bit 13 - NBYTES Count Up

pub fn soam(&mut self) -> SOAM_W<'_>[src]

Bit 14 - Stretch Clock on Address Match

pub fn sodr(&mut self) -> SODR_W<'_>[src]

Bit 15 - Stretch Clock on Data Byte Reception

pub fn adr(&mut self) -> ADR_W<'_>[src]

Bits 16:25 - Slave Address

pub fn tenbit(&mut self) -> TENBIT_W<'_>[src]

Bit 26 - Ten Bit Address Match

pub fn bridge(&mut self) -> BRIDGE_W<'_>[src]

Bit 27 - Bridge Control Enable

impl W<u32, Reg<u32, _HSSRR>>[src]

pub fn dadrivel(&mut self) -> DADRIVEL_W<'_>[src]

Bits 0:2 - Data Drive Strength LOW

pub fn daslew(&mut self) -> DASLEW_W<'_>[src]

Bits 8:9 - Data Slew Limit

pub fn filter(&mut self) -> FILTER_W<'_>[src]

Bits 28:29 - Input Spike Filter Control

impl W<u32, Reg<u32, _HSTR>>[src]

pub fn hddat(&mut self) -> HDDAT_W<'_>[src]

Bits 16:23 - Data Hold Cycles

impl W<u32, Reg<u32, _IDR>>[src]

pub fn rxrdy(&mut self) -> RXRDY_W<'_>[src]

Bit 0 - RX Buffer Ready

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 1 - TX Buffer Ready

pub fn tcomp(&mut self) -> TCOMP_W<'_>[src]

Bit 3 - Transmission Complete

pub fn urun(&mut self) -> URUN_W<'_>[src]

Bit 6 - Underrun

pub fn orun(&mut self) -> ORUN_W<'_>[src]

Bit 7 - Overrun

pub fn nak(&mut self) -> NAK_W<'_>[src]

Bit 8 - NAK Received

pub fn smbtout(&mut self) -> SMBTOUT_W<'_>[src]

Bit 12 - SMBus Timeout

pub fn smbpecerr(&mut self) -> SMBPECERR_W<'_>[src]

Bit 13 - SMBus PEC Error

pub fn buserr(&mut self) -> BUSERR_W<'_>[src]

Bit 14 - Bus Error

pub fn sam(&mut self) -> SAM_W<'_>[src]

Bit 16 - Slave Address Match

pub fn gcm(&mut self) -> GCM_W<'_>[src]

Bit 17 - General Call Match

pub fn smbalertm(&mut self) -> SMBALERTM_W<'_>[src]

Bit 18 - SMBus Alert Response Address Match

pub fn smbhhm(&mut self) -> SMBHHM_W<'_>[src]

Bit 19 - SMBus Host Header Address Match

pub fn smbdam(&mut self) -> SMBDAM_W<'_>[src]

Bit 20 - SMBus Default Address Match

pub fn sto(&mut self) -> STO_W<'_>[src]

Bit 21 - Stop Received

pub fn rep(&mut self) -> REP_W<'_>[src]

Bit 22 - Repeated Start Received

pub fn btf(&mut self) -> BTF_W<'_>[src]

Bit 23 - Byte Transfer Finished

impl W<u32, Reg<u32, _IER>>[src]

pub fn rxrdy(&mut self) -> RXRDY_W<'_>[src]

Bit 0 - RX Buffer Ready

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 1 - TX Buffer Ready

pub fn tcomp(&mut self) -> TCOMP_W<'_>[src]

Bit 3 - Transmission Complete

pub fn urun(&mut self) -> URUN_W<'_>[src]

Bit 6 - Underrun

pub fn orun(&mut self) -> ORUN_W<'_>[src]

Bit 7 - Overrun

pub fn nak(&mut self) -> NAK_W<'_>[src]

Bit 8 - NAK Received

pub fn smbtout(&mut self) -> SMBTOUT_W<'_>[src]

Bit 12 - SMBus Timeout

pub fn smbpecerr(&mut self) -> SMBPECERR_W<'_>[src]

Bit 13 - SMBus PEC Error

pub fn buserr(&mut self) -> BUSERR_W<'_>[src]

Bit 14 - Bus Error

pub fn sam(&mut self) -> SAM_W<'_>[src]

Bit 16 - Slave Address Match

pub fn gcm(&mut self) -> GCM_W<'_>[src]

Bit 17 - General Call Match

pub fn smbalertm(&mut self) -> SMBALERTM_W<'_>[src]

Bit 18 - SMBus Alert Response Address Match

pub fn smbhhm(&mut self) -> SMBHHM_W<'_>[src]

Bit 19 - SMBus Host Header Address Match

pub fn smbdam(&mut self) -> SMBDAM_W<'_>[src]

Bit 20 - SMBus Default Address Match

pub fn sto(&mut self) -> STO_W<'_>[src]

Bit 21 - Stop Received

pub fn rep(&mut self) -> REP_W<'_>[src]

Bit 22 - Repeated Start Received

pub fn btf(&mut self) -> BTF_W<'_>[src]

Bit 23 - Byte Transfer Finished

impl W<u32, Reg<u32, _NBYTES>>[src]

pub fn nbytes(&mut self) -> NBYTES_W<'_>[src]

Bits 0:7 - Number of Bytes to Transfer

impl W<u32, Reg<u32, _SCR>>[src]

pub fn tcomp(&mut self) -> TCOMP_W<'_>[src]

Bit 3 - Transmission Complete

pub fn urun(&mut self) -> URUN_W<'_>[src]

Bit 6 - Underrun

pub fn orun(&mut self) -> ORUN_W<'_>[src]

Bit 7 - Overrun

pub fn nak(&mut self) -> NAK_W<'_>[src]

Bit 8 - NAK Received

pub fn smbtout(&mut self) -> SMBTOUT_W<'_>[src]

Bit 12 - SMBus Timeout

pub fn smbpecerr(&mut self) -> SMBPECERR_W<'_>[src]

Bit 13 - SMBus PEC Error

pub fn buserr(&mut self) -> BUSERR_W<'_>[src]

Bit 14 - Bus Error

pub fn sam(&mut self) -> SAM_W<'_>[src]

Bit 16 - Slave Address Match

pub fn gcm(&mut self) -> GCM_W<'_>[src]

Bit 17 - General Call Match

pub fn smbalertm(&mut self) -> SMBALERTM_W<'_>[src]

Bit 18 - SMBus Alert Response Address Match

pub fn smbhhm(&mut self) -> SMBHHM_W<'_>[src]

Bit 19 - SMBus Host Header Address Match

pub fn smbdam(&mut self) -> SMBDAM_W<'_>[src]

Bit 20 - SMBus Default Address Match

pub fn sto(&mut self) -> STO_W<'_>[src]

Bit 21 - Stop Received

pub fn rep(&mut self) -> REP_W<'_>[src]

Bit 22 - Repeated Start Received

pub fn btf(&mut self) -> BTF_W<'_>[src]

Bit 23 - Byte Transfer Finished

impl W<u32, Reg<u32, _SRR>>[src]

pub fn dadrivel(&mut self) -> DADRIVEL_W<'_>[src]

Bits 0:2 - Data Drive Strength LOW

pub fn daslew(&mut self) -> DASLEW_W<'_>[src]

Bits 8:9 - Data Slew Limit

pub fn filter(&mut self) -> FILTER_W<'_>[src]

Bits 28:29 - Input Spike Filter Control

impl W<u32, Reg<u32, _THR>>[src]

pub fn txdata(&mut self) -> TXDATA_W<'_>[src]

Bits 0:7 - Data Byte to Transmit

impl W<u32, Reg<u32, _TR>>[src]

pub fn tlows(&mut self) -> TLOWS_W<'_>[src]

Bits 0:7 - SMBus Tlow:sext Cycles

pub fn ttout(&mut self) -> TTOUT_W<'_>[src]

Bits 8:15 - SMBus Ttimeout Cycles

pub fn sudat(&mut self) -> SUDAT_W<'_>[src]

Bits 16:23 - Data Setup Cycles

pub fn exp(&mut self) -> EXP_W<'_>[src]

Bits 28:31 - Clock Prescaler

impl W<u32, Reg<u32, _BRGR>>[src]

pub fn cd(&mut self) -> CD_W<'_>[src]

Bits 0:15 - Clock Divisor

pub fn fp(&mut self) -> FP_W<'_>[src]

Bits 16:18 - Fractional Part

impl W<u32, Reg<u32, _CR_LIN>>[src]

pub fn rstrx(&mut self) -> RSTRX_W<'_>[src]

Bit 2 - Reset Receiver

pub fn rsttx(&mut self) -> RSTTX_W<'_>[src]

Bit 3 - Reset Transmitter

pub fn rxen(&mut self) -> RXEN_W<'_>[src]

Bit 4 - Receiver Enable

pub fn rxdis(&mut self) -> RXDIS_W<'_>[src]

Bit 5 - Receiver Disable

pub fn txen(&mut self) -> TXEN_W<'_>[src]

Bit 6 - Transmitter Enable

pub fn txdis(&mut self) -> TXDIS_W<'_>[src]

Bit 7 - Transmitter Disable

pub fn rststa(&mut self) -> RSTSTA_W<'_>[src]

Bit 8 - Reset Status Bits

pub fn sttbrk(&mut self) -> STTBRK_W<'_>[src]

Bit 9 - Start Break

pub fn stpbrk(&mut self) -> STPBRK_W<'_>[src]

Bit 10 - Stop Break

pub fn sttto(&mut self) -> STTTO_W<'_>[src]

Bit 11 - Start Time-out

pub fn senda(&mut self) -> SENDA_W<'_>[src]

Bit 12 - Send Address

pub fn rstit(&mut self) -> RSTIT_W<'_>[src]

Bit 13 - Reset Iterations

pub fn rstnack(&mut self) -> RSTNACK_W<'_>[src]

Bit 14 - Reset Non Acknowledge

pub fn retto(&mut self) -> RETTO_W<'_>[src]

Bit 15 - Rearm Time-out

pub fn dtren(&mut self) -> DTREN_W<'_>[src]

Bit 16 - Data Terminal Ready Enable

pub fn dtrdis(&mut self) -> DTRDIS_W<'_>[src]

Bit 17 - Data Terminal Ready Disable

pub fn rtsen(&mut self) -> RTSEN_W<'_>[src]

Bit 18 - Request to Send Enable

pub fn rtsdis(&mut self) -> RTSDIS_W<'_>[src]

Bit 19 - Request to Send Disable

pub fn linabt(&mut self) -> LINABT_W<'_>[src]

Bit 20 - Abort the current LIN transmission

pub fn linwkup(&mut self) -> LINWKUP_W<'_>[src]

Bit 21 - Sends a wakeup signal on the LIN bus

impl W<u32, Reg<u32, _CR_SPI>>[src]

pub fn rstrx(&mut self) -> RSTRX_W<'_>[src]

Bit 2 - Reset Receiver

pub fn rsttx(&mut self) -> RSTTX_W<'_>[src]

Bit 3 - Reset Transmitter

pub fn rxen(&mut self) -> RXEN_W<'_>[src]

Bit 4 - Receiver Enable

pub fn rxdis(&mut self) -> RXDIS_W<'_>[src]

Bit 5 - Receiver Disable

pub fn txen(&mut self) -> TXEN_W<'_>[src]

Bit 6 - Transmitter Enable

pub fn txdis(&mut self) -> TXDIS_W<'_>[src]

Bit 7 - Transmitter Disable

pub fn rststa(&mut self) -> RSTSTA_W<'_>[src]

Bit 8 - Reset Status Bits

pub fn sttbrk(&mut self) -> STTBRK_W<'_>[src]

Bit 9 - Start Break

pub fn stpbrk(&mut self) -> STPBRK_W<'_>[src]

Bit 10 - Stop Break

pub fn sttto(&mut self) -> STTTO_W<'_>[src]

Bit 11 - Start Time-out

pub fn senda(&mut self) -> SENDA_W<'_>[src]

Bit 12 - Send Address

pub fn rstit(&mut self) -> RSTIT_W<'_>[src]

Bit 13 - Reset Iterations

pub fn rstnack(&mut self) -> RSTNACK_W<'_>[src]

Bit 14 - Reset Non Acknowledge

pub fn retto(&mut self) -> RETTO_W<'_>[src]

Bit 15 - Rearm Time-out

pub fn dtren(&mut self) -> DTREN_W<'_>[src]

Bit 16 - Data Terminal Ready Enable

pub fn dtrdis(&mut self) -> DTRDIS_W<'_>[src]

Bit 17 - Data Terminal Ready Disable

pub fn fcs(&mut self) -> FCS_W<'_>[src]

Bit 18 - Force SPI Chip Select

pub fn rcs(&mut self) -> RCS_W<'_>[src]

Bit 19 - Release SPI Chip Select

impl W<u32, Reg<u32, _CR_USART>>[src]

pub fn rstrx(&mut self) -> RSTRX_W<'_>[src]

Bit 2 - Reset Receiver

pub fn rsttx(&mut self) -> RSTTX_W<'_>[src]

Bit 3 - Reset Transmitter

pub fn rxen(&mut self) -> RXEN_W<'_>[src]

Bit 4 - Receiver Enable

pub fn rxdis(&mut self) -> RXDIS_W<'_>[src]

Bit 5 - Receiver Disable

pub fn txen(&mut self) -> TXEN_W<'_>[src]

Bit 6 - Transmitter Enable

pub fn txdis(&mut self) -> TXDIS_W<'_>[src]

Bit 7 - Transmitter Disable

pub fn rststa(&mut self) -> RSTSTA_W<'_>[src]

Bit 8 - Reset Status Bits

pub fn sttbrk(&mut self) -> STTBRK_W<'_>[src]

Bit 9 - Start Break

pub fn stpbrk(&mut self) -> STPBRK_W<'_>[src]

Bit 10 - Stop Break

pub fn sttto(&mut self) -> STTTO_W<'_>[src]

Bit 11 - Start Time-out

pub fn senda(&mut self) -> SENDA_W<'_>[src]

Bit 12 - Send Address

pub fn rstit(&mut self) -> RSTIT_W<'_>[src]

Bit 13 - Reset Iterations

pub fn rstnack(&mut self) -> RSTNACK_W<'_>[src]

Bit 14 - Reset Non Acknowledge

pub fn retto(&mut self) -> RETTO_W<'_>[src]

Bit 15 - Rearm Time-out

pub fn dtren(&mut self) -> DTREN_W<'_>[src]

Bit 16 - Data Terminal Ready Enable

pub fn dtrdis(&mut self) -> DTRDIS_W<'_>[src]

Bit 17 - Data Terminal Ready Disable

pub fn rtsen(&mut self) -> RTSEN_W<'_>[src]

Bit 18 - Request to Send Enable

pub fn rtsdis(&mut self) -> RTSDIS_W<'_>[src]

Bit 19 - Request to Send Disable

impl W<u32, Reg<u32, _FIDI>>[src]

pub fn fi_di_ratio(&mut self) -> FI_DI_RATIO_W<'_>[src]

Bits 0:10 - FI Over DI Ratio Value

impl W<u32, Reg<u32, _IDR_LIN>>[src]

pub fn rxrdy(&mut self) -> RXRDY_W<'_>[src]

Bit 0 - Receiver Ready Interrupt Disable

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 1 - Transmitter Ready Interrupt Disable

pub fn rxbrk(&mut self) -> RXBRK_W<'_>[src]

Bit 2 - Receiver Break Interrupt Disable

pub fn ovre(&mut self) -> OVRE_W<'_>[src]

Bit 5 - Overrun Error Interrupt Disable

pub fn frame(&mut self) -> FRAME_W<'_>[src]

Bit 6 - Framing Error Interrupt Disable

pub fn pare(&mut self) -> PARE_W<'_>[src]

Bit 7 - Parity Error Interrupt Disable

pub fn timeout(&mut self) -> TIMEOUT_W<'_>[src]

Bit 8 - Time-out Interrupt Disable

pub fn txempty(&mut self) -> TXEMPTY_W<'_>[src]

Bit 9 - Transmitter Empty Interrupt Disable

pub fn iter(&mut self) -> ITER_W<'_>[src]

Bit 10 - Iteration Interrupt Disable

pub fn txbufe(&mut self) -> TXBUFE_W<'_>[src]

Bit 11 - Buffer Empty Interrupt Disable

pub fn rxbuff(&mut self) -> RXBUFF_W<'_>[src]

Bit 12 - Buffer Full Interrupt Disable

pub fn nack(&mut self) -> NACK_W<'_>[src]

Bit 13 - Non Acknowledge or LIN Break Sent or LIN Break Received Interrupt Disable

pub fn linid(&mut self) -> LINID_W<'_>[src]

Bit 14 - LIN Identifier Sent or LIN Identifier Received Interrupt Disable

pub fn lintc(&mut self) -> LINTC_W<'_>[src]

Bit 15 - LIN Transfer Conpleted Interrupt Disable

pub fn riic(&mut self) -> RIIC_W<'_>[src]

Bit 16 - Ring Indicator Input Change Disable

pub fn dsric(&mut self) -> DSRIC_W<'_>[src]

Bit 17 - Data Set Ready Input Change Disable

pub fn dcdic(&mut self) -> DCDIC_W<'_>[src]

Bit 18 - Data Carrier Detect Input Change Interrupt Disable

pub fn ctsic(&mut self) -> CTSIC_W<'_>[src]

Bit 19 - Clear to Send Input Change Interrupt Disable

pub fn linbe(&mut self) -> LINBE_W<'_>[src]

Bit 25 - LIN Bus Error Interrupt Disable

pub fn linisfe(&mut self) -> LINISFE_W<'_>[src]

Bit 26 - LIN Inconsistent Synch Field Error Interrupt Disable

pub fn linipe(&mut self) -> LINIPE_W<'_>[src]

Bit 27 - LIN Identifier Parity Interrupt Disable

pub fn lince(&mut self) -> LINCE_W<'_>[src]

Bit 28 - LIN Checksum Error Interrupt Disable

pub fn linsnre(&mut self) -> LINSNRE_W<'_>[src]

Bit 29 - LIN Slave Not Responding Error Interrupt Disable

pub fn linste(&mut self) -> LINSTE_W<'_>[src]

Bit 30 - LIN Synch Tolerance Error Interrupt Disable

pub fn linhte(&mut self) -> LINHTE_W<'_>[src]

Bit 31 - LIN Header Timeout Error Interrupt Disable

impl W<u32, Reg<u32, _IDR_SPI>>[src]

pub fn rxrdy(&mut self) -> RXRDY_W<'_>[src]

Bit 0 - Receiver Ready Interrupt Disable

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 1 - Transmitter Ready Interrupt Disable

pub fn rxbrk(&mut self) -> RXBRK_W<'_>[src]

Bit 2 - Receiver Break Interrupt Disable

pub fn ovre(&mut self) -> OVRE_W<'_>[src]

Bit 5 - Overrun Error Interrupt Disable

pub fn frame(&mut self) -> FRAME_W<'_>[src]

Bit 6 - Framing Error Interrupt Disable

pub fn pare(&mut self) -> PARE_W<'_>[src]

Bit 7 - Parity Error Interrupt Disable

pub fn timeout(&mut self) -> TIMEOUT_W<'_>[src]

Bit 8 - Time-out Interrupt Disable

pub fn txempty(&mut self) -> TXEMPTY_W<'_>[src]

Bit 9 - Transmitter Empty Interrupt Disable

pub fn unre(&mut self) -> UNRE_W<'_>[src]

Bit 10 - SPI Underrun Error Interrupt Disable

pub fn txbufe(&mut self) -> TXBUFE_W<'_>[src]

Bit 11 - Buffer Empty Interrupt Disable

pub fn rxbuff(&mut self) -> RXBUFF_W<'_>[src]

Bit 12 - Buffer Full Interrupt Disable

pub fn nack(&mut self) -> NACK_W<'_>[src]

Bit 13 - Non Acknowledge Interrupt Disable

pub fn riic(&mut self) -> RIIC_W<'_>[src]

Bit 16 - Ring Indicator Input Change Disable

pub fn dsric(&mut self) -> DSRIC_W<'_>[src]

Bit 17 - Data Set Ready Input Change Disable

pub fn dcdic(&mut self) -> DCDIC_W<'_>[src]

Bit 18 - Data Carrier Detect Input Change Interrupt Disable

pub fn ctsic(&mut self) -> CTSIC_W<'_>[src]

Bit 19 - Clear to Send Input Change Interrupt Disable

impl W<u32, Reg<u32, _IDR_USART>>[src]

pub fn rxrdy(&mut self) -> RXRDY_W<'_>[src]

Bit 0 - Receiver Ready Interrupt Disable

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 1 - Transmitter Ready Interrupt Disable

pub fn rxbrk(&mut self) -> RXBRK_W<'_>[src]

Bit 2 - Receiver Break Interrupt Disable

pub fn ovre(&mut self) -> OVRE_W<'_>[src]

Bit 5 - Overrun Error Interrupt Disable

pub fn frame(&mut self) -> FRAME_W<'_>[src]

Bit 6 - Framing Error Interrupt Disable

pub fn pare(&mut self) -> PARE_W<'_>[src]

Bit 7 - Parity Error Interrupt Disable

pub fn timeout(&mut self) -> TIMEOUT_W<'_>[src]

Bit 8 - Time-out Interrupt Disable

pub fn txempty(&mut self) -> TXEMPTY_W<'_>[src]

Bit 9 - Transmitter Empty Interrupt Disable

pub fn iter(&mut self) -> ITER_W<'_>[src]

Bit 10 - Iteration Interrupt Disable

pub fn txbufe(&mut self) -> TXBUFE_W<'_>[src]

Bit 11 - Buffer Empty Interrupt Disable

pub fn rxbuff(&mut self) -> RXBUFF_W<'_>[src]

Bit 12 - Buffer Full Interrupt Disable

pub fn nack(&mut self) -> NACK_W<'_>[src]

Bit 13 - Non Acknowledge Interrupt Disable

pub fn riic(&mut self) -> RIIC_W<'_>[src]

Bit 16 - Ring Indicator Input Change Disable

pub fn dsric(&mut self) -> DSRIC_W<'_>[src]

Bit 17 - Data Set Ready Input Change Disable

pub fn dcdic(&mut self) -> DCDIC_W<'_>[src]

Bit 18 - Data Carrier Detect Input Change Interrupt Disable

pub fn ctsic(&mut self) -> CTSIC_W<'_>[src]

Bit 19 - Clear to Send Input Change Interrupt Disable

pub fn mane(&mut self) -> MANE_W<'_>[src]

Bit 20 - Manchester Error Interrupt Disable

pub fn manea(&mut self) -> MANEA_W<'_>[src]

Bit 24 - Manchester Error Interrupt Disable

impl W<u32, Reg<u32, _IER_LIN>>[src]

pub fn rxrdy(&mut self) -> RXRDY_W<'_>[src]

Bit 0 - Receiver Ready Interrupt Enable

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 1 - Transmitter Ready Interrupt Enable

pub fn rxbrk(&mut self) -> RXBRK_W<'_>[src]

Bit 2 - Receiver Break Interrupt Enable

pub fn ovre(&mut self) -> OVRE_W<'_>[src]

Bit 5 - Overrun Error Interrupt Enable

pub fn frame(&mut self) -> FRAME_W<'_>[src]

Bit 6 - Framing Error Interrupt Enable

pub fn pare(&mut self) -> PARE_W<'_>[src]

Bit 7 - Parity Error Interrupt Enable

pub fn timeout(&mut self) -> TIMEOUT_W<'_>[src]

Bit 8 - Time-out Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W<'_>[src]

Bit 9 - Transmitter Empty Interrupt Enable

pub fn iter(&mut self) -> ITER_W<'_>[src]

Bit 10 - Iteration Interrupt Enable

pub fn txbufe(&mut self) -> TXBUFE_W<'_>[src]

Bit 11 - Buffer Empty Interrupt Enable

pub fn rxbuff(&mut self) -> RXBUFF_W<'_>[src]

Bit 12 - Buffer Full Interrupt Enable

pub fn nack(&mut self) -> NACK_W<'_>[src]

Bit 13 - Non Acknowledge or LIN Break Sent or LIN Break Received Interrupt Enable

pub fn linid(&mut self) -> LINID_W<'_>[src]

Bit 14 - LIN Identifier Sent or LIN Identifier Received Interrupt Enable

pub fn lintc(&mut self) -> LINTC_W<'_>[src]

Bit 15 - LIN Transfer Conpleted Interrupt Enable

pub fn riic(&mut self) -> RIIC_W<'_>[src]

Bit 16 - Ring Indicator Input Change Enable

pub fn dsric(&mut self) -> DSRIC_W<'_>[src]

Bit 17 - Data Set Ready Input Change Enable

pub fn dcdic(&mut self) -> DCDIC_W<'_>[src]

Bit 18 - Data Carrier Detect Input Change Interrupt Enable

pub fn ctsic(&mut self) -> CTSIC_W<'_>[src]

Bit 19 - Clear to Send Input Change Interrupt Enable

pub fn linbe(&mut self) -> LINBE_W<'_>[src]

Bit 25 - LIN Bus Error Interrupt Enable

pub fn linisfe(&mut self) -> LINISFE_W<'_>[src]

Bit 26 - LIN Inconsistent Synch Field Error Interrupt Enable

pub fn linipe(&mut self) -> LINIPE_W<'_>[src]

Bit 27 - LIN Identifier Parity Interrupt Enable

pub fn lince(&mut self) -> LINCE_W<'_>[src]

Bit 28 - LIN Checksum Error Interrupt Enable

pub fn linsnre(&mut self) -> LINSNRE_W<'_>[src]

Bit 29 - LIN Slave Not Responding Error Interrupt Enable

pub fn linste(&mut self) -> LINSTE_W<'_>[src]

Bit 30 - LIN Synch Tolerance Error Interrupt Enable

pub fn linhte(&mut self) -> LINHTE_W<'_>[src]

Bit 31 - LIN Header Timeout Error Interrupt Enable

impl W<u32, Reg<u32, _IER_SPI>>[src]

pub fn rxrdy(&mut self) -> RXRDY_W<'_>[src]

Bit 0 - Receiver Ready Interrupt Enable

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 1 - Transmitter Ready Interrupt Enable

pub fn rxbrk(&mut self) -> RXBRK_W<'_>[src]

Bit 2 - Receiver Break Interrupt Enable

pub fn ovre(&mut self) -> OVRE_W<'_>[src]

Bit 5 - Overrun Error Interrupt Enable

pub fn frame(&mut self) -> FRAME_W<'_>[src]

Bit 6 - Framing Error Interrupt Enable

pub fn pare(&mut self) -> PARE_W<'_>[src]

Bit 7 - Parity Error Interrupt Enable

pub fn timeout(&mut self) -> TIMEOUT_W<'_>[src]

Bit 8 - Time-out Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W<'_>[src]

Bit 9 - Transmitter Empty Interrupt Enable

pub fn unre(&mut self) -> UNRE_W<'_>[src]

Bit 10 - SPI Underrun Error Interrupt Enable

pub fn txbufe(&mut self) -> TXBUFE_W<'_>[src]

Bit 11 - Buffer Empty Interrupt Enable

pub fn rxbuff(&mut self) -> RXBUFF_W<'_>[src]

Bit 12 - Buffer Full Interrupt Enable

pub fn nack(&mut self) -> NACK_W<'_>[src]

Bit 13 - Non Acknowledge Interrupt Enable

pub fn riic(&mut self) -> RIIC_W<'_>[src]

Bit 16 - Ring Indicator Input Change Enable

pub fn dsric(&mut self) -> DSRIC_W<'_>[src]

Bit 17 - Data Set Ready Input Change Enable

pub fn dcdic(&mut self) -> DCDIC_W<'_>[src]

Bit 18 - Data Carrier Detect Input Change Interrupt Enable

pub fn ctsic(&mut self) -> CTSIC_W<'_>[src]

Bit 19 - Clear to Send Input Change Interrupt Enable

impl W<u32, Reg<u32, _IER_USART>>[src]

pub fn rxrdy(&mut self) -> RXRDY_W<'_>[src]

Bit 0 - Receiver Ready Interrupt Enable

pub fn txrdy(&mut self) -> TXRDY_W<'_>[src]

Bit 1 - Transmitter Ready Interrupt Enable

pub fn rxbrk(&mut self) -> RXBRK_W<'_>[src]

Bit 2 - Receiver Break Interrupt Enable

pub fn ovre(&mut self) -> OVRE_W<'_>[src]

Bit 5 - Overrun Error Interrupt Enable

pub fn frame(&mut self) -> FRAME_W<'_>[src]

Bit 6 - Framing Error Interrupt Enable

pub fn pare(&mut self) -> PARE_W<'_>[src]

Bit 7 - Parity Error Interrupt Enable

pub fn timeout(&mut self) -> TIMEOUT_W<'_>[src]

Bit 8 - Time-out Interrupt Enable

pub fn txempty(&mut self) -> TXEMPTY_W<'_>[src]

Bit 9 - Transmitter Empty Interrupt Enable

pub fn iter(&mut self) -> ITER_W<'_>[src]

Bit 10 - Iteration Interrupt Enable

pub fn txbufe(&mut self) -> TXBUFE_W<'_>[src]

Bit 11 - Buffer Empty Interrupt Enable

pub fn rxbuff(&mut self) -> RXBUFF_W<'_>[src]

Bit 12 - Buffer Full Interrupt Enable

pub fn nack(&mut self) -> NACK_W<'_>[src]

Bit 13 - Non Acknowledge Interrupt Enable

pub fn riic(&mut self) -> RIIC_W<'_>[src]

Bit 16 - Ring Indicator Input Change Enable

pub fn dsric(&mut self) -> DSRIC_W<'_>[src]

Bit 17 - Data Set Ready Input Change Enable

pub fn dcdic(&mut self) -> DCDIC_W<'_>[src]

Bit 18 - Data Carrier Detect Input Change Interrupt Enable

pub fn ctsic(&mut self) -> CTSIC_W<'_>[src]

Bit 19 - Clear to Send Input Change Interrupt Enable

pub fn mane(&mut self) -> MANE_W<'_>[src]

Bit 20 - Manchester Error Interrupt Enable

pub fn manea(&mut self) -> MANEA_W<'_>[src]

Bit 24 - Manchester Error Interrupt Enable

impl W<u32, Reg<u32, _IFR>>[src]

pub fn irda_filter(&mut self) -> IRDA_FILTER_W<'_>[src]

Bits 0:7 - Irda filter

impl W<u32, Reg<u32, _LINIR>>[src]

pub fn idchr(&mut self) -> IDCHR_W<'_>[src]

Bits 0:7 - Identifier Character

impl W<u32, Reg<u32, _LINMR>>[src]

pub fn nact(&mut self) -> NACT_W<'_>[src]

Bits 0:1 - LIN Node Action

pub fn pardis(&mut self) -> PARDIS_W<'_>[src]

Bit 2 - Parity Disable

pub fn chkdis(&mut self) -> CHKDIS_W<'_>[src]

Bit 3 - Checksum Disable

pub fn chktyp(&mut self) -> CHKTYP_W<'_>[src]

Bit 4 - Checksum Type

pub fn dlm(&mut self) -> DLM_W<'_>[src]

Bit 5 - Data Length Mode

pub fn fsdis(&mut self) -> FSDIS_W<'_>[src]

Bit 6 - Frame Slot Mode Disable

pub fn wkuptyp(&mut self) -> WKUPTYP_W<'_>[src]

Bit 7 - Wakeup Signal Type

pub fn dlc(&mut self) -> DLC_W<'_>[src]

Bits 8:15 - Data Length Control

pub fn pdcm(&mut self) -> PDCM_W<'_>[src]

Bit 16 - PDC Mode

pub fn syncdis(&mut self) -> SYNCDIS_W<'_>[src]

Bit 17 - Synchronization Disable

impl W<u32, Reg<u32, _MAN>>[src]

pub fn tx_pl(&mut self) -> TX_PL_W<'_>[src]

Bits 0:3 - Transmitter Preamble Length

pub fn tx_pp(&mut self) -> TX_PP_W<'_>[src]

Bits 8:9 - Transmitter Preamble Pattern

pub fn tx_mpol(&mut self) -> TX_MPOL_W<'_>[src]

Bit 12 - Transmitter Manchester Polarity

pub fn rx_pl(&mut self) -> RX_PL_W<'_>[src]

Bits 16:19 - Receiver Preamble Length

pub fn rx_pp(&mut self) -> RX_PP_W<'_>[src]

Bits 24:25 - Receiver Preamble Pattern detected

pub fn rx_mpol(&mut self) -> RX_MPOL_W<'_>[src]

Bit 28 - Receiver Manchester Polarity

pub fn drift(&mut self) -> DRIFT_W<'_>[src]

Bit 30 - Drift compensation

impl W<u32, Reg<u32, _MR_SPI>>[src]

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bits 0:3 - Usart Mode

pub fn usclks(&mut self) -> USCLKS_W<'_>[src]

Bits 4:5 - Clock Selection

pub fn chrl(&mut self) -> CHRL_W<'_>[src]

Bits 6:7 - Character Length.

pub fn cpha(&mut self) -> CPHA_W<'_>[src]

Bit 8 - SPI CLock Phase

pub fn par(&mut self) -> PAR_W<'_>[src]

Bits 9:11 - Parity Type

pub fn nbstop(&mut self) -> NBSTOP_W<'_>[src]

Bits 12:13 - Number of Stop Bits

pub fn chmode(&mut self) -> CHMODE_W<'_>[src]

Bits 14:15 - Channel Mode

pub fn cpol(&mut self) -> CPOL_W<'_>[src]

Bit 16 - SPI Clock Polarity

pub fn mode9(&mut self) -> MODE9_W<'_>[src]

Bit 17 - 9-bit Character Length

pub fn clko(&mut self) -> CLKO_W<'_>[src]

Bit 18 - Clock Output Select

pub fn over(&mut self) -> OVER_W<'_>[src]

Bit 19 - Oversampling Mode

pub fn inack(&mut self) -> INACK_W<'_>[src]

Bit 20 - Inhibit Non Acknowledge

pub fn dsnack(&mut self) -> DSNACK_W<'_>[src]

Bit 21 - Disable Successive NACK

pub fn invdata(&mut self) -> INVDATA_W<'_>[src]

Bit 23 - Inverted data

pub fn max_iteration(&mut self) -> MAX_ITERATION_W<'_>[src]

Bits 24:26 - Max interation

pub fn filter(&mut self) -> FILTER_W<'_>[src]

Bit 28 - Infrared Receive Line Filter

impl W<u32, Reg<u32, _MR>>[src]

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bits 0:3 - Usart Mode

pub fn usclks(&mut self) -> USCLKS_W<'_>[src]

Bits 4:5 - Clock Selection

pub fn chrl(&mut self) -> CHRL_W<'_>[src]

Bits 6:7 - Character Length.

pub fn sync(&mut self) -> SYNC_W<'_>[src]

Bit 8 - Synchronous Mode Select

pub fn par(&mut self) -> PAR_W<'_>[src]

Bits 9:11 - Parity Type

pub fn nbstop(&mut self) -> NBSTOP_W<'_>[src]

Bits 12:13 - Number of Stop Bits

pub fn chmode(&mut self) -> CHMODE_W<'_>[src]

Bits 14:15 - Channel Mode

pub fn msbf(&mut self) -> MSBF_W<'_>[src]

Bit 16 - Bit Order

pub fn mode9(&mut self) -> MODE9_W<'_>[src]

Bit 17 - 9-bit Character Length

pub fn clko(&mut self) -> CLKO_W<'_>[src]

Bit 18 - Clock Output Select

pub fn over(&mut self) -> OVER_W<'_>[src]

Bit 19 - Oversampling Mode

pub fn inack(&mut self) -> INACK_W<'_>[src]

Bit 20 - Inhibit Non Acknowledge

pub fn dsnack(&mut self) -> DSNACK_W<'_>[src]

Bit 21 - Disable Successive NACK

pub fn var_sync(&mut self) -> VAR_SYNC_W<'_>[src]

Bit 22 - Variable synchronization of command/data sync Start Frame Delimiter

pub fn invdata(&mut self) -> INVDATA_W<'_>[src]

Bit 23 - Inverted data

pub fn max_iteration(&mut self) -> MAX_ITERATION_W<'_>[src]

Bits 24:26 - Max interation

pub fn filter(&mut self) -> FILTER_W<'_>[src]

Bit 28 - Infrared Receive Line Filter

pub fn man(&mut self) -> MAN_W<'_>[src]

Bit 29 - Manchester Encoder/Decoder Enable

pub fn modsync(&mut self) -> MODSYNC_W<'_>[src]

Bit 30 - Manchester Synchronization Mode

pub fn onebit(&mut self) -> ONEBIT_W<'_>[src]

Bit 31 - Start Frame Delimiter selector

impl W<u32, Reg<u32, _RTOR>>[src]

pub fn to(&mut self) -> TO_W<'_>[src]

Bits 0:16 - Time-out Value

impl W<u32, Reg<u32, _THR>>[src]

pub fn txchr(&mut self) -> TXCHR_W<'_>[src]

Bits 0:8 - Character to be Transmitted

pub fn txsynh(&mut self) -> TXSYNH_W<'_>[src]

Bit 15 - Sync Field to be transmitted

impl W<u32, Reg<u32, _TTGR>>[src]

pub fn tg(&mut self) -> TG_W<'_>[src]

Bits 0:7 - Timeguard Value

impl W<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&mut self) -> WPEN_W<'_>[src]

Bit 0 - Write Protect Enable

pub fn wpkey(&mut self) -> WPKEY_W<'_>[src]

Bits 8:31 - Write Protect Key

impl W<u32, Reg<u32, _UDCON>>[src]

pub fn uadd(&mut self) -> UADD_W<'_>[src]

Bits 0:6 - USB Address

pub fn adden(&mut self) -> ADDEN_W<'_>[src]

Bit 7 - Address Enable

pub fn detach(&mut self) -> DETACH_W<'_>[src]

Bit 8 - Detach

pub fn rmwkup(&mut self) -> RMWKUP_W<'_>[src]

Bit 9 - Remote Wake-Up

pub fn spdconf(&mut self) -> SPDCONF_W<'_>[src]

Bits 10:11 - Speed configuration

pub fn ls(&mut self) -> LS_W<'_>[src]

Bit 12 - Low Speed Mode Force

pub fn tstj(&mut self) -> TSTJ_W<'_>[src]

Bit 13 - Test mode J

pub fn tstk(&mut self) -> TSTK_W<'_>[src]

Bit 14 - Test mode K

pub fn tstpckt(&mut self) -> TSTPCKT_W<'_>[src]

Bit 15 - Test Packet mode

pub fn opmode2(&mut self) -> OPMODE2_W<'_>[src]

Bit 16 - Specific Operational mode

pub fn gnak(&mut self) -> GNAK_W<'_>[src]

Bit 17 - Global NAK

impl W<u32, Reg<u32, _UDESC>>[src]

pub fn udesca(&mut self) -> UDESCA_W<'_>[src]

Bits 0:31 - USB Descriptor Address

impl W<u32, Reg<u32, _UDINTCLR>>[src]

pub fn suspc(&mut self) -> SUSPC_W<'_>[src]

Bit 0 - SUSP Interrupt Clear

pub fn msofc(&mut self) -> MSOFC_W<'_>[src]

Bit 1 - MSOF Interrupt Clear

pub fn sofc(&mut self) -> SOFC_W<'_>[src]

Bit 2 - SOF Interrupt Clear

pub fn eorstc(&mut self) -> EORSTC_W<'_>[src]

Bit 3 - EORST Interrupt Clear

pub fn wakeupc(&mut self) -> WAKEUPC_W<'_>[src]

Bit 4 - WAKEUP Interrupt Clear

pub fn eorsmc(&mut self) -> EORSMC_W<'_>[src]

Bit 5 - EORSM Interrupt Clear

pub fn uprsmc(&mut self) -> UPRSMC_W<'_>[src]

Bit 6 - UPRSM Interrupt Clear

impl W<u32, Reg<u32, _UDINTECLR>>[src]

pub fn suspec(&mut self) -> SUSPEC_W<'_>[src]

Bit 0 - SUSP Interrupt Enable Clear

pub fn msofec(&mut self) -> MSOFEC_W<'_>[src]

Bit 1 - MSOF Interrupt Enable Clear

pub fn sofec(&mut self) -> SOFEC_W<'_>[src]

Bit 2 - SOF Interrupt Enable Clear

pub fn eorstec(&mut self) -> EORSTEC_W<'_>[src]

Bit 3 - EORST Interrupt Enable Clear

pub fn wakeupec(&mut self) -> WAKEUPEC_W<'_>[src]

Bit 4 - WAKEUP Interrupt Enable Clear

pub fn eorsmec(&mut self) -> EORSMEC_W<'_>[src]

Bit 5 - EORSM Interrupt Enable Clear

pub fn uprsmec(&mut self) -> UPRSMEC_W<'_>[src]

Bit 6 - UPRSM Interrupt Enable Clear

pub fn ep0intec(&mut self) -> EP0INTEC_W<'_>[src]

Bit 12 - EP0INT Interrupt Enable Clear

pub fn ep1intec(&mut self) -> EP1INTEC_W<'_>[src]

Bit 13 - EP1INT Interrupt Enable Clear

pub fn ep2intec(&mut self) -> EP2INTEC_W<'_>[src]

Bit 14 - EP2INT Interrupt Enable Clear

pub fn ep3intec(&mut self) -> EP3INTEC_W<'_>[src]

Bit 15 - EP3INT Interrupt Enable Clear

pub fn ep4intec(&mut self) -> EP4INTEC_W<'_>[src]

Bit 16 - EP4INT Interrupt Enable Clear

pub fn ep5intec(&mut self) -> EP5INTEC_W<'_>[src]

Bit 17 - EP5INT Interrupt Enable Clear

pub fn ep6intec(&mut self) -> EP6INTEC_W<'_>[src]

Bit 18 - EP6INT Interrupt Enable Clear

pub fn ep7intec(&mut self) -> EP7INTEC_W<'_>[src]

Bit 19 - EP7INT Interrupt Enable Clear

impl W<u32, Reg<u32, _UDINTESET>>[src]

pub fn suspes(&mut self) -> SUSPES_W<'_>[src]

Bit 0 - SUSP Interrupt Enable Set

pub fn msofes(&mut self) -> MSOFES_W<'_>[src]

Bit 1 - MSOF Interrupt Enable Set

pub fn sofes(&mut self) -> SOFES_W<'_>[src]

Bit 2 - SOF Interrupt Enable Set

pub fn eorstes(&mut self) -> EORSTES_W<'_>[src]

Bit 3 - EORST Interrupt Enable Set

pub fn wakeupes(&mut self) -> WAKEUPES_W<'_>[src]

Bit 4 - WAKEUP Interrupt Enable Set

pub fn eorsmes(&mut self) -> EORSMES_W<'_>[src]

Bit 5 - EORSM Interrupt Enable Set

pub fn uprsmes(&mut self) -> UPRSMES_W<'_>[src]

Bit 6 - UPRSM Interrupt Enable Set

pub fn ep0intes(&mut self) -> EP0INTES_W<'_>[src]

Bit 12 - EP0INT Interrupt Enable Set

pub fn ep1intes(&mut self) -> EP1INTES_W<'_>[src]

Bit 13 - EP1INT Interrupt Enable Set

pub fn ep2intes(&mut self) -> EP2INTES_W<'_>[src]

Bit 14 - EP2INT Interrupt Enable Set

pub fn ep3intes(&mut self) -> EP3INTES_W<'_>[src]

Bit 15 - EP3INT Interrupt Enable Set

pub fn ep4intes(&mut self) -> EP4INTES_W<'_>[src]

Bit 16 - EP4INT Interrupt Enable Set

pub fn ep5intes(&mut self) -> EP5INTES_W<'_>[src]

Bit 17 - EP5INT Interrupt Enable Set

pub fn ep6intes(&mut self) -> EP6INTES_W<'_>[src]

Bit 18 - EP6INT Interrupt Enable Set

pub fn ep7intes(&mut self) -> EP7INTES_W<'_>[src]

Bit 19 - EP7INT Interrupt Enable Set

impl W<u32, Reg<u32, _UDINTSET>>[src]

pub fn susps(&mut self) -> SUSPS_W<'_>[src]

Bit 0 - SUSP Interrupt Set

pub fn msofs(&mut self) -> MSOFS_W<'_>[src]

Bit 1 - MSOF Interrupt Set

pub fn sofs(&mut self) -> SOFS_W<'_>[src]

Bit 2 - SOF Interrupt Set

pub fn eorsts(&mut self) -> EORSTS_W<'_>[src]

Bit 3 - EORST Interrupt Set

pub fn wakeups(&mut self) -> WAKEUPS_W<'_>[src]

Bit 4 - WAKEUP Interrupt Set

pub fn eorsms(&mut self) -> EORSMS_W<'_>[src]

Bit 5 - EORSM Interrupt Set

pub fn uprsms(&mut self) -> UPRSMS_W<'_>[src]

Bit 6 - UPRSM Interrupt Set

impl W<u32, Reg<u32, _UECFG0>>[src]

pub fn epbk(&mut self) -> EPBK_W<'_>[src]

Bit 2 - Endpoint Bank

pub fn epsize(&mut self) -> EPSIZE_W<'_>[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&mut self) -> EPDIR_W<'_>[src]

Bit 8 - Endpoint Direction

pub fn eptype(&mut self) -> EPTYPE_W<'_>[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&mut self) -> REPNB_W<'_>[src]

Bits 16:19 - Redirected Endpoint Number

impl W<u32, Reg<u32, _UECFG1>>[src]

pub fn epbk(&mut self) -> EPBK_W<'_>[src]

Bit 2 - Endpoint Bank

pub fn epsize(&mut self) -> EPSIZE_W<'_>[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&mut self) -> EPDIR_W<'_>[src]

Bit 8 - Endpoint Direction

pub fn eptype(&mut self) -> EPTYPE_W<'_>[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&mut self) -> REPNB_W<'_>[src]

Bits 16:19 - Redirected Endpoint Number

impl W<u32, Reg<u32, _UECFG2>>[src]

pub fn epbk(&mut self) -> EPBK_W<'_>[src]

Bit 2 - Endpoint Bank

pub fn epsize(&mut self) -> EPSIZE_W<'_>[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&mut self) -> EPDIR_W<'_>[src]

Bit 8 - Endpoint Direction

pub fn eptype(&mut self) -> EPTYPE_W<'_>[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&mut self) -> REPNB_W<'_>[src]

Bits 16:19 - Redirected Endpoint Number

impl W<u32, Reg<u32, _UECFG3>>[src]

pub fn epbk(&mut self) -> EPBK_W<'_>[src]

Bit 2 - Endpoint Bank

pub fn epsize(&mut self) -> EPSIZE_W<'_>[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&mut self) -> EPDIR_W<'_>[src]

Bit 8 - Endpoint Direction

pub fn eptype(&mut self) -> EPTYPE_W<'_>[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&mut self) -> REPNB_W<'_>[src]

Bits 16:19 - Redirected Endpoint Number

impl W<u32, Reg<u32, _UECFG4>>[src]

pub fn epbk(&mut self) -> EPBK_W<'_>[src]

Bit 2 - Endpoint Bank

pub fn epsize(&mut self) -> EPSIZE_W<'_>[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&mut self) -> EPDIR_W<'_>[src]

Bit 8 - Endpoint Direction

pub fn eptype(&mut self) -> EPTYPE_W<'_>[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&mut self) -> REPNB_W<'_>[src]

Bits 16:19 - Redirected Endpoint Number

impl W<u32, Reg<u32, _UECFG5>>[src]

pub fn epbk(&mut self) -> EPBK_W<'_>[src]

Bit 2 - Endpoint Bank

pub fn epsize(&mut self) -> EPSIZE_W<'_>[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&mut self) -> EPDIR_W<'_>[src]

Bit 8 - Endpoint Direction

pub fn eptype(&mut self) -> EPTYPE_W<'_>[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&mut self) -> REPNB_W<'_>[src]

Bits 16:19 - Redirected Endpoint Number

impl W<u32, Reg<u32, _UECFG6>>[src]

pub fn epbk(&mut self) -> EPBK_W<'_>[src]

Bit 2 - Endpoint Bank

pub fn epsize(&mut self) -> EPSIZE_W<'_>[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&mut self) -> EPDIR_W<'_>[src]

Bit 8 - Endpoint Direction

pub fn eptype(&mut self) -> EPTYPE_W<'_>[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&mut self) -> REPNB_W<'_>[src]

Bits 16:19 - Redirected Endpoint Number

impl W<u32, Reg<u32, _UECFG7>>[src]

pub fn epbk(&mut self) -> EPBK_W<'_>[src]

Bit 2 - Endpoint Bank

pub fn epsize(&mut self) -> EPSIZE_W<'_>[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&mut self) -> EPDIR_W<'_>[src]

Bit 8 - Endpoint Direction

pub fn eptype(&mut self) -> EPTYPE_W<'_>[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&mut self) -> REPNB_W<'_>[src]

Bits 16:19 - Redirected Endpoint Number

impl W<u32, Reg<u32, _UECON0CLR>>[src]

pub fn txinec(&mut self) -> TXINEC_W<'_>[src]

Bit 0 - TXINE Clear

pub fn rxoutec(&mut self) -> RXOUTEC_W<'_>[src]

Bit 1 - RXOUTE Clear

pub fn rxstpec(&mut self) -> RXSTPEC_W<'_>[src]

Bit 2 - RXSTPE Clear

pub fn nakoutec(&mut self) -> NAKOUTEC_W<'_>[src]

Bit 3 - NAKOUTE Clear

pub fn nakinec(&mut self) -> NAKINEC_W<'_>[src]

Bit 4 - NAKINE Clear

pub fn stalledec(&mut self) -> STALLEDEC_W<'_>[src]

Bit 6 - STALLEDE Clear

pub fn nreplyc(&mut self) -> NREPLYC_W<'_>[src]

Bit 8 - NREPLY Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 11 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn nyetdisc(&mut self) -> NYETDISC_W<'_>[src]

Bit 17 - NYETDIS Clear

pub fn stallrqc(&mut self) -> STALLRQC_W<'_>[src]

Bit 19 - STALLRQ Clear

pub fn busy0c(&mut self) -> BUSY0C_W<'_>[src]

Bit 24 - BUSY0 Clear

pub fn busy1c(&mut self) -> BUSY1C_W<'_>[src]

Bit 25 - BUSY1 Clear

impl W<u32, Reg<u32, _UECON0SET>>[src]

pub fn txines(&mut self) -> TXINES_W<'_>[src]

Bit 0 - TXINE Set

pub fn rxoutes(&mut self) -> RXOUTES_W<'_>[src]

Bit 1 - RXOUTE Set

pub fn rxstpes(&mut self) -> RXSTPES_W<'_>[src]

Bit 2 - RXSTPE Set

pub fn nakoutes(&mut self) -> NAKOUTES_W<'_>[src]

Bit 3 - NAKOUTE Set

pub fn nakines(&mut self) -> NAKINES_W<'_>[src]

Bit 4 - NAKINE Set

pub fn stalledes(&mut self) -> STALLEDES_W<'_>[src]

Bit 6 - STALLEDE Set

pub fn nreplys(&mut self) -> NREPLYS_W<'_>[src]

Bit 8 - NREPLY Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 11 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn killbks(&mut self) -> KILLBKS_W<'_>[src]

Bit 13 - KILLBK Set

pub fn nyetdiss(&mut self) -> NYETDISS_W<'_>[src]

Bit 17 - NYETDIS Set

pub fn rstdts(&mut self) -> RSTDTS_W<'_>[src]

Bit 18 - RSTDT Set

pub fn stallrqs(&mut self) -> STALLRQS_W<'_>[src]

Bit 19 - STALLRQ Set

pub fn busy0s(&mut self) -> BUSY0S_W<'_>[src]

Bit 24 - BUSY0 Set

pub fn busy1s(&mut self) -> BUSY1S_W<'_>[src]

Bit 25 - BUSY1 Set

impl W<u32, Reg<u32, _UECON1CLR>>[src]

pub fn txinec(&mut self) -> TXINEC_W<'_>[src]

Bit 0 - TXINE Clear

pub fn rxoutec(&mut self) -> RXOUTEC_W<'_>[src]

Bit 1 - RXOUTE Clear

pub fn rxstpec(&mut self) -> RXSTPEC_W<'_>[src]

Bit 2 - RXOUTE Clear

pub fn nakoutec(&mut self) -> NAKOUTEC_W<'_>[src]

Bit 3 - NAKOUTE Clear

pub fn nakinec(&mut self) -> NAKINEC_W<'_>[src]

Bit 4 - NAKINE Clear

pub fn stalledec(&mut self) -> STALLEDEC_W<'_>[src]

Bit 6 - RXSTPE Clear

pub fn nreplyc(&mut self) -> NREPLYC_W<'_>[src]

Bit 8 - NREPLY Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 11 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn nyetdisc(&mut self) -> NYETDISC_W<'_>[src]

Bit 17 - NYETDIS Clear

pub fn stallrqc(&mut self) -> STALLRQC_W<'_>[src]

Bit 19 - STALLEDE Clear

pub fn busy0c(&mut self) -> BUSY0C_W<'_>[src]

Bit 24 - BUSY0 Clear

pub fn busy1c(&mut self) -> BUSY1C_W<'_>[src]

Bit 25 - BUSY1 Clear

impl W<u32, Reg<u32, _UECON1SET>>[src]

pub fn txines(&mut self) -> TXINES_W<'_>[src]

Bit 0 - TXINE Set

pub fn rxoutes(&mut self) -> RXOUTES_W<'_>[src]

Bit 1 - RXOUTE Set

pub fn rxstpes(&mut self) -> RXSTPES_W<'_>[src]

Bit 2 - RXSTPE Set

pub fn nakoutes(&mut self) -> NAKOUTES_W<'_>[src]

Bit 3 - NAKOUTE Set

pub fn nakines(&mut self) -> NAKINES_W<'_>[src]

Bit 4 - NAKINE Set

pub fn stalledes(&mut self) -> STALLEDES_W<'_>[src]

Bit 6 - STALLEDE Set

pub fn nreplys(&mut self) -> NREPLYS_W<'_>[src]

Bit 8 - NREPLY Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 11 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn killbks(&mut self) -> KILLBKS_W<'_>[src]

Bit 13 - KILLBK Set

pub fn nyetdiss(&mut self) -> NYETDISS_W<'_>[src]

Bit 17 - NYETDIS Set

pub fn rstdts(&mut self) -> RSTDTS_W<'_>[src]

Bit 18 - RSTDT Set

pub fn stallrqs(&mut self) -> STALLRQS_W<'_>[src]

Bit 19 - STALLRQ Set

pub fn busy0s(&mut self) -> BUSY0S_W<'_>[src]

Bit 24 - BUSY0 Set

pub fn busy1s(&mut self) -> BUSY1S_W<'_>[src]

Bit 25 - BUSY1 Set

impl W<u32, Reg<u32, _UECON2CLR>>[src]

pub fn txinec(&mut self) -> TXINEC_W<'_>[src]

Bit 0 - TXINE Clear

pub fn rxoutec(&mut self) -> RXOUTEC_W<'_>[src]

Bit 1 - RXOUTE Clear

pub fn rxstpec(&mut self) -> RXSTPEC_W<'_>[src]

Bit 2 - RXOUTE Clear

pub fn nakoutec(&mut self) -> NAKOUTEC_W<'_>[src]

Bit 3 - NAKOUTE Clear

pub fn nakinec(&mut self) -> NAKINEC_W<'_>[src]

Bit 4 - NAKINE Clear

pub fn stalledec(&mut self) -> STALLEDEC_W<'_>[src]

Bit 6 - RXSTPE Clear

pub fn nreplyc(&mut self) -> NREPLYC_W<'_>[src]

Bit 8 - NREPLY Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 11 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn nyetdisc(&mut self) -> NYETDISC_W<'_>[src]

Bit 17 - NYETDIS Clear

pub fn stallrqc(&mut self) -> STALLRQC_W<'_>[src]

Bit 19 - STALLEDE Clear

pub fn busy0c(&mut self) -> BUSY0C_W<'_>[src]

Bit 24 - BUSY0 Clear

pub fn busy1c(&mut self) -> BUSY1C_W<'_>[src]

Bit 25 - BUSY1 Clear

impl W<u32, Reg<u32, _UECON2SET>>[src]

pub fn txines(&mut self) -> TXINES_W<'_>[src]

Bit 0 - TXINE Set

pub fn rxoutes(&mut self) -> RXOUTES_W<'_>[src]

Bit 1 - RXOUTE Set

pub fn rxstpes(&mut self) -> RXSTPES_W<'_>[src]

Bit 2 - RXSTPE Set

pub fn nakoutes(&mut self) -> NAKOUTES_W<'_>[src]

Bit 3 - NAKOUTE Set

pub fn nakines(&mut self) -> NAKINES_W<'_>[src]

Bit 4 - NAKINE Set

pub fn stalledes(&mut self) -> STALLEDES_W<'_>[src]

Bit 6 - STALLEDE Set

pub fn nreplys(&mut self) -> NREPLYS_W<'_>[src]

Bit 8 - NREPLY Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 11 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn killbks(&mut self) -> KILLBKS_W<'_>[src]

Bit 13 - KILLBK Set

pub fn nyetdiss(&mut self) -> NYETDISS_W<'_>[src]

Bit 17 - NYETDIS Set

pub fn rstdts(&mut self) -> RSTDTS_W<'_>[src]

Bit 18 - RSTDT Set

pub fn stallrqs(&mut self) -> STALLRQS_W<'_>[src]

Bit 19 - STALLRQ Set

pub fn busy0s(&mut self) -> BUSY0S_W<'_>[src]

Bit 24 - BUSY0 Set

pub fn busy1s(&mut self) -> BUSY1S_W<'_>[src]

Bit 25 - BUSY1 Set

impl W<u32, Reg<u32, _UECON3CLR>>[src]

pub fn txinec(&mut self) -> TXINEC_W<'_>[src]

Bit 0 - TXINE Clear

pub fn rxoutec(&mut self) -> RXOUTEC_W<'_>[src]

Bit 1 - RXOUTE Clear

pub fn rxstpec(&mut self) -> RXSTPEC_W<'_>[src]

Bit 2 - RXOUTE Clear

pub fn nakoutec(&mut self) -> NAKOUTEC_W<'_>[src]

Bit 3 - NAKOUTE Clear

pub fn nakinec(&mut self) -> NAKINEC_W<'_>[src]

Bit 4 - NAKINE Clear

pub fn stalledec(&mut self) -> STALLEDEC_W<'_>[src]

Bit 6 - RXSTPE Clear

pub fn nreplyc(&mut self) -> NREPLYC_W<'_>[src]

Bit 8 - NREPLY Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 11 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn nyetdisc(&mut self) -> NYETDISC_W<'_>[src]

Bit 17 - NYETDIS Clear

pub fn stallrqc(&mut self) -> STALLRQC_W<'_>[src]

Bit 19 - STALLEDE Clear

pub fn busy0c(&mut self) -> BUSY0C_W<'_>[src]

Bit 24 - BUSY0 Clear

pub fn busy1c(&mut self) -> BUSY1C_W<'_>[src]

Bit 25 - BUSY1 Clear

impl W<u32, Reg<u32, _UECON3SET>>[src]

pub fn txines(&mut self) -> TXINES_W<'_>[src]

Bit 0 - TXINE Set

pub fn rxoutes(&mut self) -> RXOUTES_W<'_>[src]

Bit 1 - RXOUTE Set

pub fn rxstpes(&mut self) -> RXSTPES_W<'_>[src]

Bit 2 - RXSTPE Set

pub fn nakoutes(&mut self) -> NAKOUTES_W<'_>[src]

Bit 3 - NAKOUTE Set

pub fn nakines(&mut self) -> NAKINES_W<'_>[src]

Bit 4 - NAKINE Set

pub fn stalledes(&mut self) -> STALLEDES_W<'_>[src]

Bit 6 - STALLEDE Set

pub fn nreplys(&mut self) -> NREPLYS_W<'_>[src]

Bit 8 - NREPLY Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 11 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn killbks(&mut self) -> KILLBKS_W<'_>[src]

Bit 13 - KILLBK Set

pub fn nyetdiss(&mut self) -> NYETDISS_W<'_>[src]

Bit 17 - NYETDIS Set

pub fn rstdts(&mut self) -> RSTDTS_W<'_>[src]

Bit 18 - RSTDT Set

pub fn stallrqs(&mut self) -> STALLRQS_W<'_>[src]

Bit 19 - STALLRQ Set

pub fn busy0s(&mut self) -> BUSY0S_W<'_>[src]

Bit 24 - BUSY0 Set

pub fn busy1s(&mut self) -> BUSY1S_W<'_>[src]

Bit 25 - BUSY1 Set

impl W<u32, Reg<u32, _UECON4CLR>>[src]

pub fn txinec(&mut self) -> TXINEC_W<'_>[src]

Bit 0 - TXINE Clear

pub fn rxoutec(&mut self) -> RXOUTEC_W<'_>[src]

Bit 1 - RXOUTE Clear

pub fn rxstpec(&mut self) -> RXSTPEC_W<'_>[src]

Bit 2 - RXOUTE Clear

pub fn nakoutec(&mut self) -> NAKOUTEC_W<'_>[src]

Bit 3 - NAKOUTE Clear

pub fn nakinec(&mut self) -> NAKINEC_W<'_>[src]

Bit 4 - NAKINE Clear

pub fn stalledec(&mut self) -> STALLEDEC_W<'_>[src]

Bit 6 - RXSTPE Clear

pub fn nreplyc(&mut self) -> NREPLYC_W<'_>[src]

Bit 8 - NREPLY Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 11 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn nyetdisc(&mut self) -> NYETDISC_W<'_>[src]

Bit 17 - NYETDIS Clear

pub fn stallrqc(&mut self) -> STALLRQC_W<'_>[src]

Bit 19 - STALLEDE Clear

pub fn busy0c(&mut self) -> BUSY0C_W<'_>[src]

Bit 24 - BUSY0 Clear

pub fn busy1c(&mut self) -> BUSY1C_W<'_>[src]

Bit 25 - BUSY1 Clear

impl W<u32, Reg<u32, _UECON4SET>>[src]

pub fn txines(&mut self) -> TXINES_W<'_>[src]

Bit 0 - TXINE Set

pub fn rxoutes(&mut self) -> RXOUTES_W<'_>[src]

Bit 1 - RXOUTE Set

pub fn rxstpes(&mut self) -> RXSTPES_W<'_>[src]

Bit 2 - RXSTPE Set

pub fn nakoutes(&mut self) -> NAKOUTES_W<'_>[src]

Bit 3 - NAKOUTE Set

pub fn nakines(&mut self) -> NAKINES_W<'_>[src]

Bit 4 - NAKINE Set

pub fn stalledes(&mut self) -> STALLEDES_W<'_>[src]

Bit 6 - STALLEDE Set

pub fn nreplys(&mut self) -> NREPLYS_W<'_>[src]

Bit 8 - NREPLY Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 11 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn killbks(&mut self) -> KILLBKS_W<'_>[src]

Bit 13 - KILLBK Set

pub fn nyetdiss(&mut self) -> NYETDISS_W<'_>[src]

Bit 17 - NYETDIS Set

pub fn rstdts(&mut self) -> RSTDTS_W<'_>[src]

Bit 18 - RSTDT Set

pub fn stallrqs(&mut self) -> STALLRQS_W<'_>[src]

Bit 19 - STALLRQ Set

pub fn busy0s(&mut self) -> BUSY0S_W<'_>[src]

Bit 24 - BUSY0 Set

pub fn busy1s(&mut self) -> BUSY1S_W<'_>[src]

Bit 25 - BUSY1 Set

impl W<u32, Reg<u32, _UECON5CLR>>[src]

pub fn txinec(&mut self) -> TXINEC_W<'_>[src]

Bit 0 - TXINE Clear

pub fn rxoutec(&mut self) -> RXOUTEC_W<'_>[src]

Bit 1 - RXOUTE Clear

pub fn rxstpec(&mut self) -> RXSTPEC_W<'_>[src]

Bit 2 - RXOUTE Clear

pub fn nakoutec(&mut self) -> NAKOUTEC_W<'_>[src]

Bit 3 - NAKOUTE Clear

pub fn nakinec(&mut self) -> NAKINEC_W<'_>[src]

Bit 4 - NAKINE Clear

pub fn stalledec(&mut self) -> STALLEDEC_W<'_>[src]

Bit 6 - RXSTPE Clear

pub fn nreplyc(&mut self) -> NREPLYC_W<'_>[src]

Bit 8 - NREPLY Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 11 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn nyetdisc(&mut self) -> NYETDISC_W<'_>[src]

Bit 17 - NYETDIS Clear

pub fn stallrqc(&mut self) -> STALLRQC_W<'_>[src]

Bit 19 - STALLEDE Clear

pub fn busy0c(&mut self) -> BUSY0C_W<'_>[src]

Bit 24 - BUSY0 Clear

pub fn busy1c(&mut self) -> BUSY1C_W<'_>[src]

Bit 25 - BUSY1 Clear

impl W<u32, Reg<u32, _UECON5SET>>[src]

pub fn txines(&mut self) -> TXINES_W<'_>[src]

Bit 0 - TXINE Set

pub fn rxoutes(&mut self) -> RXOUTES_W<'_>[src]

Bit 1 - RXOUTE Set

pub fn rxstpes(&mut self) -> RXSTPES_W<'_>[src]

Bit 2 - RXSTPE Set

pub fn nakoutes(&mut self) -> NAKOUTES_W<'_>[src]

Bit 3 - NAKOUTE Set

pub fn nakines(&mut self) -> NAKINES_W<'_>[src]

Bit 4 - NAKINE Set

pub fn stalledes(&mut self) -> STALLEDES_W<'_>[src]

Bit 6 - STALLEDE Set

pub fn nreplys(&mut self) -> NREPLYS_W<'_>[src]

Bit 8 - NREPLY Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 11 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn killbks(&mut self) -> KILLBKS_W<'_>[src]

Bit 13 - KILLBK Set

pub fn nyetdiss(&mut self) -> NYETDISS_W<'_>[src]

Bit 17 - NYETDIS Set

pub fn rstdts(&mut self) -> RSTDTS_W<'_>[src]

Bit 18 - RSTDT Set

pub fn stallrqs(&mut self) -> STALLRQS_W<'_>[src]

Bit 19 - STALLRQ Set

pub fn busy0s(&mut self) -> BUSY0S_W<'_>[src]

Bit 24 - BUSY0 Set

pub fn busy1s(&mut self) -> BUSY1S_W<'_>[src]

Bit 25 - BUSY1 Set

impl W<u32, Reg<u32, _UECON6CLR>>[src]

pub fn txinec(&mut self) -> TXINEC_W<'_>[src]

Bit 0 - TXINE Clear

pub fn rxoutec(&mut self) -> RXOUTEC_W<'_>[src]

Bit 1 - RXOUTE Clear

pub fn rxstpec(&mut self) -> RXSTPEC_W<'_>[src]

Bit 2 - RXOUTE Clear

pub fn nakoutec(&mut self) -> NAKOUTEC_W<'_>[src]

Bit 3 - NAKOUTE Clear

pub fn nakinec(&mut self) -> NAKINEC_W<'_>[src]

Bit 4 - NAKINE Clear

pub fn stalledec(&mut self) -> STALLEDEC_W<'_>[src]

Bit 6 - RXSTPE Clear

pub fn nreplyc(&mut self) -> NREPLYC_W<'_>[src]

Bit 8 - NREPLY Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 11 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn nyetdisc(&mut self) -> NYETDISC_W<'_>[src]

Bit 17 - NYETDIS Clear

pub fn stallrqc(&mut self) -> STALLRQC_W<'_>[src]

Bit 19 - STALLEDE Clear

pub fn busy0c(&mut self) -> BUSY0C_W<'_>[src]

Bit 24 - BUSY0 Clear

pub fn busy1c(&mut self) -> BUSY1C_W<'_>[src]

Bit 25 - BUSY1 Clear

impl W<u32, Reg<u32, _UECON6SET>>[src]

pub fn txines(&mut self) -> TXINES_W<'_>[src]

Bit 0 - TXINE Set

pub fn rxoutes(&mut self) -> RXOUTES_W<'_>[src]

Bit 1 - RXOUTE Set

pub fn rxstpes(&mut self) -> RXSTPES_W<'_>[src]

Bit 2 - RXSTPE Set

pub fn nakoutes(&mut self) -> NAKOUTES_W<'_>[src]

Bit 3 - NAKOUTE Set

pub fn nakines(&mut self) -> NAKINES_W<'_>[src]

Bit 4 - NAKINE Set

pub fn stalledes(&mut self) -> STALLEDES_W<'_>[src]

Bit 6 - STALLEDE Set

pub fn nreplys(&mut self) -> NREPLYS_W<'_>[src]

Bit 8 - NREPLY Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 11 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn killbks(&mut self) -> KILLBKS_W<'_>[src]

Bit 13 - KILLBK Set

pub fn nyetdiss(&mut self) -> NYETDISS_W<'_>[src]

Bit 17 - NYETDIS Set

pub fn rstdts(&mut self) -> RSTDTS_W<'_>[src]

Bit 18 - RSTDT Set

pub fn stallrqs(&mut self) -> STALLRQS_W<'_>[src]

Bit 19 - STALLRQ Set

pub fn busy0s(&mut self) -> BUSY0S_W<'_>[src]

Bit 24 - BUSY0 Set

pub fn busy1s(&mut self) -> BUSY1S_W<'_>[src]

Bit 25 - BUSY1 Set

impl W<u32, Reg<u32, _UECON7CLR>>[src]

pub fn txinec(&mut self) -> TXINEC_W<'_>[src]

Bit 0 - TXINE Clear

pub fn rxoutec(&mut self) -> RXOUTEC_W<'_>[src]

Bit 1 - RXOUTE Clear

pub fn rxstpec(&mut self) -> RXSTPEC_W<'_>[src]

Bit 2 - RXOUTE Clear

pub fn nakoutec(&mut self) -> NAKOUTEC_W<'_>[src]

Bit 3 - NAKOUTE Clear

pub fn nakinec(&mut self) -> NAKINEC_W<'_>[src]

Bit 4 - NAKINE Clear

pub fn stalledec(&mut self) -> STALLEDEC_W<'_>[src]

Bit 6 - RXSTPE Clear

pub fn nreplyc(&mut self) -> NREPLYC_W<'_>[src]

Bit 8 - NREPLY Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 11 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn nyetdisc(&mut self) -> NYETDISC_W<'_>[src]

Bit 17 - NYETDIS Clear

pub fn stallrqc(&mut self) -> STALLRQC_W<'_>[src]

Bit 19 - STALLEDE Clear

pub fn busy0c(&mut self) -> BUSY0C_W<'_>[src]

Bit 24 - BUSY0 Clear

pub fn busy1c(&mut self) -> BUSY1C_W<'_>[src]

Bit 25 - BUSY1 Clear

impl W<u32, Reg<u32, _UECON7SET>>[src]

pub fn txines(&mut self) -> TXINES_W<'_>[src]

Bit 0 - TXINE Set

pub fn rxoutes(&mut self) -> RXOUTES_W<'_>[src]

Bit 1 - RXOUTE Set

pub fn rxstpes(&mut self) -> RXSTPES_W<'_>[src]

Bit 2 - RXSTPE Set

pub fn nakoutes(&mut self) -> NAKOUTES_W<'_>[src]

Bit 3 - NAKOUTE Set

pub fn nakines(&mut self) -> NAKINES_W<'_>[src]

Bit 4 - NAKINE Set

pub fn stalledes(&mut self) -> STALLEDES_W<'_>[src]

Bit 6 - STALLEDE Set

pub fn nreplys(&mut self) -> NREPLYS_W<'_>[src]

Bit 8 - NREPLY Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 11 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn killbks(&mut self) -> KILLBKS_W<'_>[src]

Bit 13 - KILLBK Set

pub fn nyetdiss(&mut self) -> NYETDISS_W<'_>[src]

Bit 17 - NYETDIS Set

pub fn rstdts(&mut self) -> RSTDTS_W<'_>[src]

Bit 18 - RSTDT Set

pub fn stallrqs(&mut self) -> STALLRQS_W<'_>[src]

Bit 19 - STALLRQ Set

pub fn busy0s(&mut self) -> BUSY0S_W<'_>[src]

Bit 24 - BUSY0 Set

pub fn busy1s(&mut self) -> BUSY1S_W<'_>[src]

Bit 25 - BUSY1 Set

impl W<u32, Reg<u32, _UERST>>[src]

pub fn epen0(&mut self) -> EPEN0_W<'_>[src]

Bit 0 - Endpoint0 Enable

pub fn epen1(&mut self) -> EPEN1_W<'_>[src]

Bit 1 - Endpoint1 Enable

pub fn epen2(&mut self) -> EPEN2_W<'_>[src]

Bit 2 - Endpoint2 Enable

pub fn epen3(&mut self) -> EPEN3_W<'_>[src]

Bit 3 - Endpoint3 Enable

pub fn epen4(&mut self) -> EPEN4_W<'_>[src]

Bit 4 - Endpoint4 Enable

pub fn epen5(&mut self) -> EPEN5_W<'_>[src]

Bit 5 - Endpoint5 Enable

pub fn epen6(&mut self) -> EPEN6_W<'_>[src]

Bit 6 - Endpoint6 Enable

pub fn epen7(&mut self) -> EPEN7_W<'_>[src]

Bit 7 - Endpoint7 Enable

impl W<u32, Reg<u32, _UESTA0CLR>>[src]

pub fn txinic(&mut self) -> TXINIC_W<'_>[src]

Bit 0 - TXINI Clear

pub fn rxoutic(&mut self) -> RXOUTIC_W<'_>[src]

Bit 1 - RXOUTI Clear

pub fn rxstpic(&mut self) -> RXSTPIC_W<'_>[src]

Bit 2 - RXSTPI Clear

pub fn nakoutic(&mut self) -> NAKOUTIC_W<'_>[src]

Bit 3 - NAKOUTI Clear

pub fn nakinic(&mut self) -> NAKINIC_W<'_>[src]

Bit 4 - NAKINI Clear

pub fn stalledic(&mut self) -> STALLEDIC_W<'_>[src]

Bit 6 - STALLEDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 11 - RAMACERI Clear

impl W<u32, Reg<u32, _UESTA0SET>>[src]

pub fn txinis(&mut self) -> TXINIS_W<'_>[src]

Bit 0 - TXINI Set

pub fn rxoutis(&mut self) -> RXOUTIS_W<'_>[src]

Bit 1 - RXOUTI Set

pub fn rxstpis(&mut self) -> RXSTPIS_W<'_>[src]

Bit 2 - RXSTPI Set

pub fn nakoutis(&mut self) -> NAKOUTIS_W<'_>[src]

Bit 3 - NAKOUTI Set

pub fn nakinis(&mut self) -> NAKINIS_W<'_>[src]

Bit 4 - NAKINI Set

pub fn stalledis(&mut self) -> STALLEDIS_W<'_>[src]

Bit 6 - STALLEDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 11 - RAMACERI Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W<'_>[src]

Bit 12 - NBUSYBK Set

impl W<u32, Reg<u32, _UESTA1CLR>>[src]

pub fn txinic(&mut self) -> TXINIC_W<'_>[src]

Bit 0 - TXINI Clear

pub fn rxoutic(&mut self) -> RXOUTIC_W<'_>[src]

Bit 1 - RXOUTI Clear

pub fn rxstpic(&mut self) -> RXSTPIC_W<'_>[src]

Bit 2 - RXSTPI Clear

pub fn nakoutic(&mut self) -> NAKOUTIC_W<'_>[src]

Bit 3 - NAKOUTI Clear

pub fn nakinic(&mut self) -> NAKINIC_W<'_>[src]

Bit 4 - NAKINI Clear

pub fn stalledic(&mut self) -> STALLEDIC_W<'_>[src]

Bit 6 - STALLEDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 11 - RAMACERI Clear

impl W<u32, Reg<u32, _UESTA1SET>>[src]

pub fn txinis(&mut self) -> TXINIS_W<'_>[src]

Bit 0 - TXINI Set

pub fn rxoutis(&mut self) -> RXOUTIS_W<'_>[src]

Bit 1 - RXOUTI Set

pub fn rxstpis(&mut self) -> RXSTPIS_W<'_>[src]

Bit 2 - RXSTPI Set

pub fn nakoutis(&mut self) -> NAKOUTIS_W<'_>[src]

Bit 3 - NAKOUTI Set

pub fn nakinis(&mut self) -> NAKINIS_W<'_>[src]

Bit 4 - NAKINI Set

pub fn stalledis(&mut self) -> STALLEDIS_W<'_>[src]

Bit 6 - STALLEDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 11 - RAMACERI Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W<'_>[src]

Bit 12 - NBUSYBK Set

impl W<u32, Reg<u32, _UESTA2CLR>>[src]

pub fn txinic(&mut self) -> TXINIC_W<'_>[src]

Bit 0 - TXINI Clear

pub fn rxoutic(&mut self) -> RXOUTIC_W<'_>[src]

Bit 1 - RXOUTI Clear

pub fn rxstpic(&mut self) -> RXSTPIC_W<'_>[src]

Bit 2 - RXSTPI Clear

pub fn nakoutic(&mut self) -> NAKOUTIC_W<'_>[src]

Bit 3 - NAKOUTI Clear

pub fn nakinic(&mut self) -> NAKINIC_W<'_>[src]

Bit 4 - NAKINI Clear

pub fn stalledic(&mut self) -> STALLEDIC_W<'_>[src]

Bit 6 - STALLEDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 11 - RAMACERI Clear

impl W<u32, Reg<u32, _UESTA2SET>>[src]

pub fn txinis(&mut self) -> TXINIS_W<'_>[src]

Bit 0 - TXINI Set

pub fn rxoutis(&mut self) -> RXOUTIS_W<'_>[src]

Bit 1 - RXOUTI Set

pub fn rxstpis(&mut self) -> RXSTPIS_W<'_>[src]

Bit 2 - RXSTPI Set

pub fn nakoutis(&mut self) -> NAKOUTIS_W<'_>[src]

Bit 3 - NAKOUTI Set

pub fn nakinis(&mut self) -> NAKINIS_W<'_>[src]

Bit 4 - NAKINI Set

pub fn stalledis(&mut self) -> STALLEDIS_W<'_>[src]

Bit 6 - STALLEDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 11 - RAMACERI Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W<'_>[src]

Bit 12 - NBUSYBK Set

impl W<u32, Reg<u32, _UESTA3CLR>>[src]

pub fn txinic(&mut self) -> TXINIC_W<'_>[src]

Bit 0 - TXINI Clear

pub fn rxoutic(&mut self) -> RXOUTIC_W<'_>[src]

Bit 1 - RXOUTI Clear

pub fn rxstpic(&mut self) -> RXSTPIC_W<'_>[src]

Bit 2 - RXSTPI Clear

pub fn nakoutic(&mut self) -> NAKOUTIC_W<'_>[src]

Bit 3 - NAKOUTI Clear

pub fn nakinic(&mut self) -> NAKINIC_W<'_>[src]

Bit 4 - NAKINI Clear

pub fn stalledic(&mut self) -> STALLEDIC_W<'_>[src]

Bit 6 - STALLEDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 11 - RAMACERI Clear

impl W<u32, Reg<u32, _UESTA3SET>>[src]

pub fn txinis(&mut self) -> TXINIS_W<'_>[src]

Bit 0 - TXINI Set

pub fn rxoutis(&mut self) -> RXOUTIS_W<'_>[src]

Bit 1 - RXOUTI Set

pub fn rxstpis(&mut self) -> RXSTPIS_W<'_>[src]

Bit 2 - RXSTPI Set

pub fn nakoutis(&mut self) -> NAKOUTIS_W<'_>[src]

Bit 3 - NAKOUTI Set

pub fn nakinis(&mut self) -> NAKINIS_W<'_>[src]

Bit 4 - NAKINI Set

pub fn stalledis(&mut self) -> STALLEDIS_W<'_>[src]

Bit 6 - STALLEDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 11 - RAMACERI Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W<'_>[src]

Bit 12 - NBUSYBK Set

impl W<u32, Reg<u32, _UESTA4CLR>>[src]

pub fn txinic(&mut self) -> TXINIC_W<'_>[src]

Bit 0 - TXINI Clear

pub fn rxoutic(&mut self) -> RXOUTIC_W<'_>[src]

Bit 1 - RXOUTI Clear

pub fn rxstpic(&mut self) -> RXSTPIC_W<'_>[src]

Bit 2 - RXSTPI Clear

pub fn nakoutic(&mut self) -> NAKOUTIC_W<'_>[src]

Bit 3 - NAKOUTI Clear

pub fn nakinic(&mut self) -> NAKINIC_W<'_>[src]

Bit 4 - NAKINI Clear

pub fn stalledic(&mut self) -> STALLEDIC_W<'_>[src]

Bit 6 - STALLEDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 11 - RAMACERI Clear

impl W<u32, Reg<u32, _UESTA4SET>>[src]

pub fn txinis(&mut self) -> TXINIS_W<'_>[src]

Bit 0 - TXINI Set

pub fn rxoutis(&mut self) -> RXOUTIS_W<'_>[src]

Bit 1 - RXOUTI Set

pub fn rxstpis(&mut self) -> RXSTPIS_W<'_>[src]

Bit 2 - RXSTPI Set

pub fn nakoutis(&mut self) -> NAKOUTIS_W<'_>[src]

Bit 3 - NAKOUTI Set

pub fn nakinis(&mut self) -> NAKINIS_W<'_>[src]

Bit 4 - NAKINI Set

pub fn stalledis(&mut self) -> STALLEDIS_W<'_>[src]

Bit 6 - STALLEDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 11 - RAMACERI Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W<'_>[src]

Bit 12 - NBUSYBK Set

impl W<u32, Reg<u32, _UESTA5CLR>>[src]

pub fn txinic(&mut self) -> TXINIC_W<'_>[src]

Bit 0 - TXINI Clear

pub fn rxoutic(&mut self) -> RXOUTIC_W<'_>[src]

Bit 1 - RXOUTI Clear

pub fn rxstpic(&mut self) -> RXSTPIC_W<'_>[src]

Bit 2 - RXSTPI Clear

pub fn nakoutic(&mut self) -> NAKOUTIC_W<'_>[src]

Bit 3 - NAKOUTI Clear

pub fn nakinic(&mut self) -> NAKINIC_W<'_>[src]

Bit 4 - NAKINI Clear

pub fn stalledic(&mut self) -> STALLEDIC_W<'_>[src]

Bit 6 - STALLEDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 11 - RAMACERI Clear

impl W<u32, Reg<u32, _UESTA5SET>>[src]

pub fn txinis(&mut self) -> TXINIS_W<'_>[src]

Bit 0 - TXINI Set

pub fn rxoutis(&mut self) -> RXOUTIS_W<'_>[src]

Bit 1 - RXOUTI Set

pub fn rxstpis(&mut self) -> RXSTPIS_W<'_>[src]

Bit 2 - RXSTPI Set

pub fn nakoutis(&mut self) -> NAKOUTIS_W<'_>[src]

Bit 3 - NAKOUTI Set

pub fn nakinis(&mut self) -> NAKINIS_W<'_>[src]

Bit 4 - NAKINI Set

pub fn stalledis(&mut self) -> STALLEDIS_W<'_>[src]

Bit 6 - STALLEDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 11 - RAMACERI Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W<'_>[src]

Bit 12 - NBUSYBK Set

impl W<u32, Reg<u32, _UESTA6CLR>>[src]

pub fn txinic(&mut self) -> TXINIC_W<'_>[src]

Bit 0 - TXINI Clear

pub fn rxoutic(&mut self) -> RXOUTIC_W<'_>[src]

Bit 1 - RXOUTI Clear

pub fn rxstpic(&mut self) -> RXSTPIC_W<'_>[src]

Bit 2 - RXSTPI Clear

pub fn nakoutic(&mut self) -> NAKOUTIC_W<'_>[src]

Bit 3 - NAKOUTI Clear

pub fn nakinic(&mut self) -> NAKINIC_W<'_>[src]

Bit 4 - NAKINI Clear

pub fn stalledic(&mut self) -> STALLEDIC_W<'_>[src]

Bit 6 - STALLEDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 11 - RAMACERI Clear

impl W<u32, Reg<u32, _UESTA6SET>>[src]

pub fn txinis(&mut self) -> TXINIS_W<'_>[src]

Bit 0 - TXINI Set

pub fn rxoutis(&mut self) -> RXOUTIS_W<'_>[src]

Bit 1 - RXOUTI Set

pub fn rxstpis(&mut self) -> RXSTPIS_W<'_>[src]

Bit 2 - RXSTPI Set

pub fn nakoutis(&mut self) -> NAKOUTIS_W<'_>[src]

Bit 3 - NAKOUTI Set

pub fn nakinis(&mut self) -> NAKINIS_W<'_>[src]

Bit 4 - NAKINI Set

pub fn stalledis(&mut self) -> STALLEDIS_W<'_>[src]

Bit 6 - STALLEDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 11 - RAMACERI Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W<'_>[src]

Bit 12 - NBUSYBK Set

impl W<u32, Reg<u32, _UESTA7CLR>>[src]

pub fn txinic(&mut self) -> TXINIC_W<'_>[src]

Bit 0 - TXINI Clear

pub fn rxoutic(&mut self) -> RXOUTIC_W<'_>[src]

Bit 1 - RXOUTI Clear

pub fn rxstpic(&mut self) -> RXSTPIC_W<'_>[src]

Bit 2 - RXSTPI Clear

pub fn nakoutic(&mut self) -> NAKOUTIC_W<'_>[src]

Bit 3 - NAKOUTI Clear

pub fn nakinic(&mut self) -> NAKINIC_W<'_>[src]

Bit 4 - NAKINI Clear

pub fn stalledic(&mut self) -> STALLEDIC_W<'_>[src]

Bit 6 - STALLEDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 11 - RAMACERI Clear

impl W<u32, Reg<u32, _UESTA7SET>>[src]

pub fn txinis(&mut self) -> TXINIS_W<'_>[src]

Bit 0 - TXINI Set

pub fn rxoutis(&mut self) -> RXOUTIS_W<'_>[src]

Bit 1 - RXOUTI Set

pub fn rxstpis(&mut self) -> RXSTPIS_W<'_>[src]

Bit 2 - RXSTPI Set

pub fn nakoutis(&mut self) -> NAKOUTIS_W<'_>[src]

Bit 3 - NAKOUTI Set

pub fn nakinis(&mut self) -> NAKINIS_W<'_>[src]

Bit 4 - NAKINI Set

pub fn stalledis(&mut self) -> STALLEDIS_W<'_>[src]

Bit 6 - STALLEDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 11 - RAMACERI Set

pub fn nbusybks(&mut self) -> NBUSYBKS_W<'_>[src]

Bit 12 - NBUSYBK Set

impl W<u32, Reg<u32, _UHCON>>[src]

pub fn sofe(&mut self) -> SOFE_W<'_>[src]

Bit 8 - SOF Enable

pub fn reset(&mut self) -> RESET_W<'_>[src]

Bit 9 - Send USB Reset

pub fn resume(&mut self) -> RESUME_W<'_>[src]

Bit 10 - Send USB Resume

pub fn spdconf(&mut self) -> SPDCONF_W<'_>[src]

Bits 12:13 - Speed Configuration

pub fn tstj(&mut self) -> TSTJ_W<'_>[src]

Bit 16 - Test J

pub fn tstk(&mut self) -> TSTK_W<'_>[src]

Bit 17 - Test K

impl W<u32, Reg<u32, _UHFNUM>>[src]

pub fn fnum(&mut self) -> FNUM_W<'_>[src]

Bits 3:13 - Frame Number

impl W<u32, Reg<u32, _UHINTCLR>>[src]

pub fn dconnic(&mut self) -> DCONNIC_W<'_>[src]

Bit 0 - DCONNI Clear

pub fn ddiscic(&mut self) -> DDISCIC_W<'_>[src]

Bit 1 - DDISCI Clear

pub fn rstic(&mut self) -> RSTIC_W<'_>[src]

Bit 2 - RSTI Clear

pub fn rsmedic(&mut self) -> RSMEDIC_W<'_>[src]

Bit 3 - RSMEDI Clear

pub fn rxrsmic(&mut self) -> RXRSMIC_W<'_>[src]

Bit 4 - RXRSMI Clear

pub fn hsofic(&mut self) -> HSOFIC_W<'_>[src]

Bit 5 - HSOFI Clear

pub fn hwupic(&mut self) -> HWUPIC_W<'_>[src]

Bit 6 - HWUPI Clear

impl W<u32, Reg<u32, _UHINTECLR>>[src]

pub fn dconniec(&mut self) -> DCONNIEC_W<'_>[src]

Bit 0 - DCONNIE Clear

pub fn ddisciec(&mut self) -> DDISCIEC_W<'_>[src]

Bit 1 - DDISCIE Clear

pub fn rstiec(&mut self) -> RSTIEC_W<'_>[src]

Bit 2 - RSTIE Clear

pub fn rsmediec(&mut self) -> RSMEDIEC_W<'_>[src]

Bit 3 - RSMEDIE Clear

pub fn rxrsmiec(&mut self) -> RXRSMIEC_W<'_>[src]

Bit 4 - RXRSMIE Clear

pub fn hsofiec(&mut self) -> HSOFIEC_W<'_>[src]

Bit 5 - HSOFIE Clear

pub fn hwupiec(&mut self) -> HWUPIEC_W<'_>[src]

Bit 6 - HWUPIE Clear

pub fn p0intec(&mut self) -> P0INTEC_W<'_>[src]

Bit 8 - P0INTE Clear

pub fn p1intec(&mut self) -> P1INTEC_W<'_>[src]

Bit 9 - P1INTE Clear

pub fn p2intec(&mut self) -> P2INTEC_W<'_>[src]

Bit 10 - P2INTE Clear

pub fn p3intec(&mut self) -> P3INTEC_W<'_>[src]

Bit 11 - P3INTE Clear

pub fn p4intec(&mut self) -> P4INTEC_W<'_>[src]

Bit 12 - P4INTE Clear

pub fn p5intec(&mut self) -> P5INTEC_W<'_>[src]

Bit 13 - P5INTE Clear

pub fn p6intec(&mut self) -> P6INTEC_W<'_>[src]

Bit 14 - P6INTE Clear

pub fn p7intec(&mut self) -> P7INTEC_W<'_>[src]

Bit 15 - P7INTE Clear

impl W<u32, Reg<u32, _UHINTESET>>[src]

pub fn dconnies(&mut self) -> DCONNIES_W<'_>[src]

Bit 0 - DCONNIE Set

pub fn ddiscies(&mut self) -> DDISCIES_W<'_>[src]

Bit 1 - DDISCIE Set

pub fn rsties(&mut self) -> RSTIES_W<'_>[src]

Bit 2 - RSTIE Set

pub fn rsmedies(&mut self) -> RSMEDIES_W<'_>[src]

Bit 3 - RSMEDIE Set

pub fn rxrsmies(&mut self) -> RXRSMIES_W<'_>[src]

Bit 4 - RXRSMIE Set

pub fn hsofies(&mut self) -> HSOFIES_W<'_>[src]

Bit 5 - HSOFIE Set

pub fn hwupies(&mut self) -> HWUPIES_W<'_>[src]

Bit 6 - HWUPIE Set

pub fn p0intes(&mut self) -> P0INTES_W<'_>[src]

Bit 8 - P0INTE Set

pub fn p1intes(&mut self) -> P1INTES_W<'_>[src]

Bit 9 - P1INTE Set

pub fn p2intes(&mut self) -> P2INTES_W<'_>[src]

Bit 10 - P2INTE Set

pub fn p3intes(&mut self) -> P3INTES_W<'_>[src]

Bit 11 - P3INTE Set

pub fn p4intes(&mut self) -> P4INTES_W<'_>[src]

Bit 12 - P4INTE Set

pub fn p5intes(&mut self) -> P5INTES_W<'_>[src]

Bit 13 - P5INTE Set

pub fn p6intes(&mut self) -> P6INTES_W<'_>[src]

Bit 14 - P6INTE Set

pub fn p7intes(&mut self) -> P7INTES_W<'_>[src]

Bit 15 - P7INTE Set

impl W<u32, Reg<u32, _UHINTSET>>[src]

pub fn dconnis(&mut self) -> DCONNIS_W<'_>[src]

Bit 0 - DCONNI Set

pub fn ddiscis(&mut self) -> DDISCIS_W<'_>[src]

Bit 1 - DDISCI Set

pub fn rstis(&mut self) -> RSTIS_W<'_>[src]

Bit 2 - RSTI Set

pub fn rsmedis(&mut self) -> RSMEDIS_W<'_>[src]

Bit 3 - RSMEDI Set

pub fn rxrsmis(&mut self) -> RXRSMIS_W<'_>[src]

Bit 4 - RXRSMI Set

pub fn hsofis(&mut self) -> HSOFIS_W<'_>[src]

Bit 5 - HSOFI Set

pub fn hwupis(&mut self) -> HWUPIS_W<'_>[src]

Bit 6 - HWUPI Set

impl W<u32, Reg<u32, _UHSOFC>>[src]

pub fn flenc(&mut self) -> FLENC_W<'_>[src]

Bits 0:13 - Frame Length Control

pub fn flence(&mut self) -> FLENCE_W<'_>[src]

Bit 16 - Frame Length Control Enable

impl W<u32, Reg<u32, _UPCFG0>>[src]

pub fn pbk(&mut self) -> PBK_W<'_>[src]

Bit 2 - Pipe Banks

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&mut self) -> PTOKEN_W<'_>[src]

Bits 8:9 - Pipe Token

pub fn ptype(&mut self) -> PTYPE_W<'_>[src]

Bits 12:13 - Pipe Type

pub fn pingen(&mut self) -> PINGEN_W<'_>[src]

Bit 20 - Ping Enable

pub fn binterval(&mut self) -> BINTERVAL_W<'_>[src]

Bits 24:31 - binterval parameter

impl W<u32, Reg<u32, _UPCFG1>>[src]

pub fn pbk(&mut self) -> PBK_W<'_>[src]

Bit 2 - Pipe Banks

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&mut self) -> PTOKEN_W<'_>[src]

Bits 8:9 - Pipe Token

pub fn ptype(&mut self) -> PTYPE_W<'_>[src]

Bits 12:13 - Pipe Type

pub fn pingen(&mut self) -> PINGEN_W<'_>[src]

Bit 20 - Ping Enable

pub fn binterval(&mut self) -> BINTERVAL_W<'_>[src]

Bits 24:31 - binterval parameter

impl W<u32, Reg<u32, _UPCFG2>>[src]

pub fn pbk(&mut self) -> PBK_W<'_>[src]

Bit 2 - Pipe Banks

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&mut self) -> PTOKEN_W<'_>[src]

Bits 8:9 - Pipe Token

pub fn ptype(&mut self) -> PTYPE_W<'_>[src]

Bits 12:13 - Pipe Type

pub fn pingen(&mut self) -> PINGEN_W<'_>[src]

Bit 20 - Ping Enable

pub fn binterval(&mut self) -> BINTERVAL_W<'_>[src]

Bits 24:31 - binterval parameter

impl W<u32, Reg<u32, _UPCFG3>>[src]

pub fn pbk(&mut self) -> PBK_W<'_>[src]

Bit 2 - Pipe Banks

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&mut self) -> PTOKEN_W<'_>[src]

Bits 8:9 - Pipe Token

pub fn ptype(&mut self) -> PTYPE_W<'_>[src]

Bits 12:13 - Pipe Type

pub fn pingen(&mut self) -> PINGEN_W<'_>[src]

Bit 20 - Ping Enable

pub fn binterval(&mut self) -> BINTERVAL_W<'_>[src]

Bits 24:31 - binterval parameter

impl W<u32, Reg<u32, _UPCFG4>>[src]

pub fn pbk(&mut self) -> PBK_W<'_>[src]

Bit 2 - Pipe Banks

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&mut self) -> PTOKEN_W<'_>[src]

Bits 8:9 - Pipe Token

pub fn ptype(&mut self) -> PTYPE_W<'_>[src]

Bits 12:13 - Pipe Type

pub fn pingen(&mut self) -> PINGEN_W<'_>[src]

Bit 20 - Ping Enable

pub fn binterval(&mut self) -> BINTERVAL_W<'_>[src]

Bits 24:31 - binterval parameter

impl W<u32, Reg<u32, _UPCFG5>>[src]

pub fn pbk(&mut self) -> PBK_W<'_>[src]

Bit 2 - Pipe Banks

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&mut self) -> PTOKEN_W<'_>[src]

Bits 8:9 - Pipe Token

pub fn ptype(&mut self) -> PTYPE_W<'_>[src]

Bits 12:13 - Pipe Type

pub fn pingen(&mut self) -> PINGEN_W<'_>[src]

Bit 20 - Ping Enable

pub fn binterval(&mut self) -> BINTERVAL_W<'_>[src]

Bits 24:31 - binterval parameter

impl W<u32, Reg<u32, _UPCFG6>>[src]

pub fn pbk(&mut self) -> PBK_W<'_>[src]

Bit 2 - Pipe Banks

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&mut self) -> PTOKEN_W<'_>[src]

Bits 8:9 - Pipe Token

pub fn ptype(&mut self) -> PTYPE_W<'_>[src]

Bits 12:13 - Pipe Type

pub fn pingen(&mut self) -> PINGEN_W<'_>[src]

Bit 20 - Ping Enable

pub fn binterval(&mut self) -> BINTERVAL_W<'_>[src]

Bits 24:31 - binterval parameter

impl W<u32, Reg<u32, _UPCFG7>>[src]

pub fn pbk(&mut self) -> PBK_W<'_>[src]

Bit 2 - Pipe Banks

pub fn psize(&mut self) -> PSIZE_W<'_>[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&mut self) -> PTOKEN_W<'_>[src]

Bits 8:9 - Pipe Token

pub fn ptype(&mut self) -> PTYPE_W<'_>[src]

Bits 12:13 - Pipe Type

pub fn pingen(&mut self) -> PINGEN_W<'_>[src]

Bit 20 - Ping Enable

pub fn binterval(&mut self) -> BINTERVAL_W<'_>[src]

Bits 24:31 - binterval parameter

impl W<u32, Reg<u32, _UPCON0CLR>>[src]

pub fn rxinec(&mut self) -> RXINEC_W<'_>[src]

Bit 0 - RXINE Clear

pub fn txoutec(&mut self) -> TXOUTEC_W<'_>[src]

Bit 1 - TXOUTE Clear

pub fn txstpec(&mut self) -> TXSTPEC_W<'_>[src]

Bit 2 - TXSTPE Clear

pub fn perrec(&mut self) -> PERREC_W<'_>[src]

Bit 3 - PERRE Clear

pub fn nakedec(&mut self) -> NAKEDEC_W<'_>[src]

Bit 4 - NAKEDE Clear

pub fn errorfiec(&mut self) -> ERRORFIEC_W<'_>[src]

Bit 5 - ERRORFIE Clear

pub fn rxstalldec(&mut self) -> RXSTALLDEC_W<'_>[src]

Bit 6 - RXTALLDE Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 10 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn pfreezec(&mut self) -> PFREEZEC_W<'_>[src]

Bit 17 - PFREEZE Clear

pub fn initbkc(&mut self) -> INITBKC_W<'_>[src]

Bit 19 - INITBK Clear

impl W<u32, Reg<u32, _UPCON0SET>>[src]

pub fn rxines(&mut self) -> RXINES_W<'_>[src]

Bit 0 - RXINE Set

pub fn txoutes(&mut self) -> TXOUTES_W<'_>[src]

Bit 1 - TXOUTE Set

pub fn txstpes(&mut self) -> TXSTPES_W<'_>[src]

Bit 2 - TXSTPE Set

pub fn perres(&mut self) -> PERRES_W<'_>[src]

Bit 3 - PERRE Set

pub fn nakedes(&mut self) -> NAKEDES_W<'_>[src]

Bit 4 - NAKEDE Set

pub fn errorfies(&mut self) -> ERRORFIES_W<'_>[src]

Bit 5 - ERRORFIE Set

pub fn rxstalldes(&mut self) -> RXSTALLDES_W<'_>[src]

Bit 6 - RXSTALLDE Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 10 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn fifocons(&mut self) -> FIFOCONS_W<'_>[src]

Bit 14 - FIFOCON Set

pub fn pfreezes(&mut self) -> PFREEZES_W<'_>[src]

Bit 17 - PFREEZE Set

pub fn initdtgls(&mut self) -> INITDTGLS_W<'_>[src]

Bit 18 - INITDTGL Set

pub fn initbks(&mut self) -> INITBKS_W<'_>[src]

Bit 19 - INITBK Set

impl W<u32, Reg<u32, _UPCON1CLR>>[src]

pub fn rxinec(&mut self) -> RXINEC_W<'_>[src]

Bit 0 - RXINE Clear

pub fn txoutec(&mut self) -> TXOUTEC_W<'_>[src]

Bit 1 - TXOUTE Clear

pub fn txstpec(&mut self) -> TXSTPEC_W<'_>[src]

Bit 2 - TXSTPE Clear

pub fn perrec(&mut self) -> PERREC_W<'_>[src]

Bit 3 - PERRE Clear

pub fn nakedec(&mut self) -> NAKEDEC_W<'_>[src]

Bit 4 - NAKEDE Clear

pub fn errorfiec(&mut self) -> ERRORFIEC_W<'_>[src]

Bit 5 - ERRORFIE Clear

pub fn rxstalldec(&mut self) -> RXSTALLDEC_W<'_>[src]

Bit 6 - RXTALLDE Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 10 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn pfreezec(&mut self) -> PFREEZEC_W<'_>[src]

Bit 17 - PFREEZE Clear

pub fn initbkc(&mut self) -> INITBKC_W<'_>[src]

Bit 19 - INITBK Clear

impl W<u32, Reg<u32, _UPCON1SET>>[src]

pub fn rxines(&mut self) -> RXINES_W<'_>[src]

Bit 0 - RXINE Set

pub fn txoutes(&mut self) -> TXOUTES_W<'_>[src]

Bit 1 - TXOUTE Set

pub fn txstpes(&mut self) -> TXSTPES_W<'_>[src]

Bit 2 - TXSTPE Set

pub fn perres(&mut self) -> PERRES_W<'_>[src]

Bit 3 - PERRE Set

pub fn nakedes(&mut self) -> NAKEDES_W<'_>[src]

Bit 4 - NAKEDE Set

pub fn errorfies(&mut self) -> ERRORFIES_W<'_>[src]

Bit 5 - ERRORFIE Set

pub fn rxstalldes(&mut self) -> RXSTALLDES_W<'_>[src]

Bit 6 - RXSTALLDE Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 10 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn fifocons(&mut self) -> FIFOCONS_W<'_>[src]

Bit 14 - FIFOCON Set

pub fn pfreezes(&mut self) -> PFREEZES_W<'_>[src]

Bit 17 - PFREEZE Set

pub fn initdtgls(&mut self) -> INITDTGLS_W<'_>[src]

Bit 18 - INITDTGL Set

pub fn initbks(&mut self) -> INITBKS_W<'_>[src]

Bit 19 - INITBK Set

impl W<u32, Reg<u32, _UPCON2CLR>>[src]

pub fn rxinec(&mut self) -> RXINEC_W<'_>[src]

Bit 0 - RXINE Clear

pub fn txoutec(&mut self) -> TXOUTEC_W<'_>[src]

Bit 1 - TXOUTE Clear

pub fn txstpec(&mut self) -> TXSTPEC_W<'_>[src]

Bit 2 - TXSTPE Clear

pub fn perrec(&mut self) -> PERREC_W<'_>[src]

Bit 3 - PERRE Clear

pub fn nakedec(&mut self) -> NAKEDEC_W<'_>[src]

Bit 4 - NAKEDE Clear

pub fn errorfiec(&mut self) -> ERRORFIEC_W<'_>[src]

Bit 5 - ERRORFIE Clear

pub fn rxstalldec(&mut self) -> RXSTALLDEC_W<'_>[src]

Bit 6 - RXTALLDE Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 10 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn pfreezec(&mut self) -> PFREEZEC_W<'_>[src]

Bit 17 - PFREEZE Clear

pub fn initbkc(&mut self) -> INITBKC_W<'_>[src]

Bit 19 - INITBK Clear

impl W<u32, Reg<u32, _UPCON2SET>>[src]

pub fn rxines(&mut self) -> RXINES_W<'_>[src]

Bit 0 - RXINE Set

pub fn txoutes(&mut self) -> TXOUTES_W<'_>[src]

Bit 1 - TXOUTE Set

pub fn txstpes(&mut self) -> TXSTPES_W<'_>[src]

Bit 2 - TXSTPE Set

pub fn perres(&mut self) -> PERRES_W<'_>[src]

Bit 3 - PERRE Set

pub fn nakedes(&mut self) -> NAKEDES_W<'_>[src]

Bit 4 - NAKEDE Set

pub fn errorfies(&mut self) -> ERRORFIES_W<'_>[src]

Bit 5 - ERRORFIE Set

pub fn rxstalldes(&mut self) -> RXSTALLDES_W<'_>[src]

Bit 6 - RXSTALLDE Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 10 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn fifocons(&mut self) -> FIFOCONS_W<'_>[src]

Bit 14 - FIFOCON Set

pub fn pfreezes(&mut self) -> PFREEZES_W<'_>[src]

Bit 17 - PFREEZE Set

pub fn initdtgls(&mut self) -> INITDTGLS_W<'_>[src]

Bit 18 - INITDTGL Set

pub fn initbks(&mut self) -> INITBKS_W<'_>[src]

Bit 19 - INITBK Set

impl W<u32, Reg<u32, _UPCON3CLR>>[src]

pub fn rxinec(&mut self) -> RXINEC_W<'_>[src]

Bit 0 - RXINE Clear

pub fn txoutec(&mut self) -> TXOUTEC_W<'_>[src]

Bit 1 - TXOUTE Clear

pub fn txstpec(&mut self) -> TXSTPEC_W<'_>[src]

Bit 2 - TXSTPE Clear

pub fn perrec(&mut self) -> PERREC_W<'_>[src]

Bit 3 - PERRE Clear

pub fn nakedec(&mut self) -> NAKEDEC_W<'_>[src]

Bit 4 - NAKEDE Clear

pub fn errorfiec(&mut self) -> ERRORFIEC_W<'_>[src]

Bit 5 - ERRORFIE Clear

pub fn rxstalldec(&mut self) -> RXSTALLDEC_W<'_>[src]

Bit 6 - RXTALLDE Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 10 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn pfreezec(&mut self) -> PFREEZEC_W<'_>[src]

Bit 17 - PFREEZE Clear

pub fn initbkc(&mut self) -> INITBKC_W<'_>[src]

Bit 19 - INITBK Clear

impl W<u32, Reg<u32, _UPCON3SET>>[src]

pub fn rxines(&mut self) -> RXINES_W<'_>[src]

Bit 0 - RXINE Set

pub fn txoutes(&mut self) -> TXOUTES_W<'_>[src]

Bit 1 - TXOUTE Set

pub fn txstpes(&mut self) -> TXSTPES_W<'_>[src]

Bit 2 - TXSTPE Set

pub fn perres(&mut self) -> PERRES_W<'_>[src]

Bit 3 - PERRE Set

pub fn nakedes(&mut self) -> NAKEDES_W<'_>[src]

Bit 4 - NAKEDE Set

pub fn errorfies(&mut self) -> ERRORFIES_W<'_>[src]

Bit 5 - ERRORFIE Set

pub fn rxstalldes(&mut self) -> RXSTALLDES_W<'_>[src]

Bit 6 - RXSTALLDE Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 10 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn fifocons(&mut self) -> FIFOCONS_W<'_>[src]

Bit 14 - FIFOCON Set

pub fn pfreezes(&mut self) -> PFREEZES_W<'_>[src]

Bit 17 - PFREEZE Set

pub fn initdtgls(&mut self) -> INITDTGLS_W<'_>[src]

Bit 18 - INITDTGL Set

pub fn initbks(&mut self) -> INITBKS_W<'_>[src]

Bit 19 - INITBK Set

impl W<u32, Reg<u32, _UPCON4CLR>>[src]

pub fn rxinec(&mut self) -> RXINEC_W<'_>[src]

Bit 0 - RXINE Clear

pub fn txoutec(&mut self) -> TXOUTEC_W<'_>[src]

Bit 1 - TXOUTE Clear

pub fn txstpec(&mut self) -> TXSTPEC_W<'_>[src]

Bit 2 - TXSTPE Clear

pub fn perrec(&mut self) -> PERREC_W<'_>[src]

Bit 3 - PERRE Clear

pub fn nakedec(&mut self) -> NAKEDEC_W<'_>[src]

Bit 4 - NAKEDE Clear

pub fn errorfiec(&mut self) -> ERRORFIEC_W<'_>[src]

Bit 5 - ERRORFIE Clear

pub fn rxstalldec(&mut self) -> RXSTALLDEC_W<'_>[src]

Bit 6 - RXTALLDE Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 10 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn pfreezec(&mut self) -> PFREEZEC_W<'_>[src]

Bit 17 - PFREEZE Clear

pub fn initbkc(&mut self) -> INITBKC_W<'_>[src]

Bit 19 - INITBK Clear

impl W<u32, Reg<u32, _UPCON4SET>>[src]

pub fn rxines(&mut self) -> RXINES_W<'_>[src]

Bit 0 - RXINE Set

pub fn txoutes(&mut self) -> TXOUTES_W<'_>[src]

Bit 1 - TXOUTE Set

pub fn txstpes(&mut self) -> TXSTPES_W<'_>[src]

Bit 2 - TXSTPE Set

pub fn perres(&mut self) -> PERRES_W<'_>[src]

Bit 3 - PERRE Set

pub fn nakedes(&mut self) -> NAKEDES_W<'_>[src]

Bit 4 - NAKEDE Set

pub fn errorfies(&mut self) -> ERRORFIES_W<'_>[src]

Bit 5 - ERRORFIE Set

pub fn rxstalldes(&mut self) -> RXSTALLDES_W<'_>[src]

Bit 6 - RXSTALLDE Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 10 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn fifocons(&mut self) -> FIFOCONS_W<'_>[src]

Bit 14 - FIFOCON Set

pub fn pfreezes(&mut self) -> PFREEZES_W<'_>[src]

Bit 17 - PFREEZE Set

pub fn initdtgls(&mut self) -> INITDTGLS_W<'_>[src]

Bit 18 - INITDTGL Set

pub fn initbks(&mut self) -> INITBKS_W<'_>[src]

Bit 19 - INITBK Set

impl W<u32, Reg<u32, _UPCON5CLR>>[src]

pub fn rxinec(&mut self) -> RXINEC_W<'_>[src]

Bit 0 - RXINE Clear

pub fn txoutec(&mut self) -> TXOUTEC_W<'_>[src]

Bit 1 - TXOUTE Clear

pub fn txstpec(&mut self) -> TXSTPEC_W<'_>[src]

Bit 2 - TXSTPE Clear

pub fn perrec(&mut self) -> PERREC_W<'_>[src]

Bit 3 - PERRE Clear

pub fn nakedec(&mut self) -> NAKEDEC_W<'_>[src]

Bit 4 - NAKEDE Clear

pub fn errorfiec(&mut self) -> ERRORFIEC_W<'_>[src]

Bit 5 - ERRORFIE Clear

pub fn rxstalldec(&mut self) -> RXSTALLDEC_W<'_>[src]

Bit 6 - RXTALLDE Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 10 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn pfreezec(&mut self) -> PFREEZEC_W<'_>[src]

Bit 17 - PFREEZE Clear

pub fn initbkc(&mut self) -> INITBKC_W<'_>[src]

Bit 19 - INITBK Clear

impl W<u32, Reg<u32, _UPCON5SET>>[src]

pub fn rxines(&mut self) -> RXINES_W<'_>[src]

Bit 0 - RXINE Set

pub fn txoutes(&mut self) -> TXOUTES_W<'_>[src]

Bit 1 - TXOUTE Set

pub fn txstpes(&mut self) -> TXSTPES_W<'_>[src]

Bit 2 - TXSTPE Set

pub fn perres(&mut self) -> PERRES_W<'_>[src]

Bit 3 - PERRE Set

pub fn nakedes(&mut self) -> NAKEDES_W<'_>[src]

Bit 4 - NAKEDE Set

pub fn errorfies(&mut self) -> ERRORFIES_W<'_>[src]

Bit 5 - ERRORFIE Set

pub fn rxstalldes(&mut self) -> RXSTALLDES_W<'_>[src]

Bit 6 - RXSTALLDE Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 10 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn fifocons(&mut self) -> FIFOCONS_W<'_>[src]

Bit 14 - FIFOCON Set

pub fn pfreezes(&mut self) -> PFREEZES_W<'_>[src]

Bit 17 - PFREEZE Set

pub fn initdtgls(&mut self) -> INITDTGLS_W<'_>[src]

Bit 18 - INITDTGL Set

pub fn initbks(&mut self) -> INITBKS_W<'_>[src]

Bit 19 - INITBK Set

impl W<u32, Reg<u32, _UPCON6CLR>>[src]

pub fn rxinec(&mut self) -> RXINEC_W<'_>[src]

Bit 0 - RXINE Clear

pub fn txoutec(&mut self) -> TXOUTEC_W<'_>[src]

Bit 1 - TXOUTE Clear

pub fn txstpec(&mut self) -> TXSTPEC_W<'_>[src]

Bit 2 - TXSTPE Clear

pub fn perrec(&mut self) -> PERREC_W<'_>[src]

Bit 3 - PERRE Clear

pub fn nakedec(&mut self) -> NAKEDEC_W<'_>[src]

Bit 4 - NAKEDE Clear

pub fn errorfiec(&mut self) -> ERRORFIEC_W<'_>[src]

Bit 5 - ERRORFIE Clear

pub fn rxstalldec(&mut self) -> RXSTALLDEC_W<'_>[src]

Bit 6 - RXTALLDE Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 10 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn pfreezec(&mut self) -> PFREEZEC_W<'_>[src]

Bit 17 - PFREEZE Clear

pub fn initbkc(&mut self) -> INITBKC_W<'_>[src]

Bit 19 - INITBK Clear

impl W<u32, Reg<u32, _UPCON6SET>>[src]

pub fn rxines(&mut self) -> RXINES_W<'_>[src]

Bit 0 - RXINE Set

pub fn txoutes(&mut self) -> TXOUTES_W<'_>[src]

Bit 1 - TXOUTE Set

pub fn txstpes(&mut self) -> TXSTPES_W<'_>[src]

Bit 2 - TXSTPE Set

pub fn perres(&mut self) -> PERRES_W<'_>[src]

Bit 3 - PERRE Set

pub fn nakedes(&mut self) -> NAKEDES_W<'_>[src]

Bit 4 - NAKEDE Set

pub fn errorfies(&mut self) -> ERRORFIES_W<'_>[src]

Bit 5 - ERRORFIE Set

pub fn rxstalldes(&mut self) -> RXSTALLDES_W<'_>[src]

Bit 6 - RXSTALLDE Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 10 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn fifocons(&mut self) -> FIFOCONS_W<'_>[src]

Bit 14 - FIFOCON Set

pub fn pfreezes(&mut self) -> PFREEZES_W<'_>[src]

Bit 17 - PFREEZE Set

pub fn initdtgls(&mut self) -> INITDTGLS_W<'_>[src]

Bit 18 - INITDTGL Set

pub fn initbks(&mut self) -> INITBKS_W<'_>[src]

Bit 19 - INITBK Set

impl W<u32, Reg<u32, _UPCON7CLR>>[src]

pub fn rxinec(&mut self) -> RXINEC_W<'_>[src]

Bit 0 - RXINE Clear

pub fn txoutec(&mut self) -> TXOUTEC_W<'_>[src]

Bit 1 - TXOUTE Clear

pub fn txstpec(&mut self) -> TXSTPEC_W<'_>[src]

Bit 2 - TXSTPE Clear

pub fn perrec(&mut self) -> PERREC_W<'_>[src]

Bit 3 - PERRE Clear

pub fn nakedec(&mut self) -> NAKEDEC_W<'_>[src]

Bit 4 - NAKEDE Clear

pub fn errorfiec(&mut self) -> ERRORFIEC_W<'_>[src]

Bit 5 - ERRORFIE Clear

pub fn rxstalldec(&mut self) -> RXSTALLDEC_W<'_>[src]

Bit 6 - RXTALLDE Clear

pub fn ramacerec(&mut self) -> RAMACEREC_W<'_>[src]

Bit 10 - RAMACERE Clear

pub fn nbusybkec(&mut self) -> NBUSYBKEC_W<'_>[src]

Bit 12 - NBUSYBKE Clear

pub fn fifoconc(&mut self) -> FIFOCONC_W<'_>[src]

Bit 14 - FIFOCON Clear

pub fn pfreezec(&mut self) -> PFREEZEC_W<'_>[src]

Bit 17 - PFREEZE Clear

pub fn initbkc(&mut self) -> INITBKC_W<'_>[src]

Bit 19 - INITBK Clear

impl W<u32, Reg<u32, _UPCON7SET>>[src]

pub fn rxines(&mut self) -> RXINES_W<'_>[src]

Bit 0 - RXINE Set

pub fn txoutes(&mut self) -> TXOUTES_W<'_>[src]

Bit 1 - TXOUTE Set

pub fn txstpes(&mut self) -> TXSTPES_W<'_>[src]

Bit 2 - TXSTPE Set

pub fn perres(&mut self) -> PERRES_W<'_>[src]

Bit 3 - PERRE Set

pub fn nakedes(&mut self) -> NAKEDES_W<'_>[src]

Bit 4 - NAKEDE Set

pub fn errorfies(&mut self) -> ERRORFIES_W<'_>[src]

Bit 5 - ERRORFIE Set

pub fn rxstalldes(&mut self) -> RXSTALLDES_W<'_>[src]

Bit 6 - RXSTALLDE Set

pub fn ramaceres(&mut self) -> RAMACERES_W<'_>[src]

Bit 10 - RAMACERE Set

pub fn nbusybkes(&mut self) -> NBUSYBKES_W<'_>[src]

Bit 12 - NBUSYBKE Set

pub fn fifocons(&mut self) -> FIFOCONS_W<'_>[src]

Bit 14 - FIFOCON Set

pub fn pfreezes(&mut self) -> PFREEZES_W<'_>[src]

Bit 17 - PFREEZE Set

pub fn initdtgls(&mut self) -> INITDTGLS_W<'_>[src]

Bit 18 - INITDTGL Set

pub fn initbks(&mut self) -> INITBKS_W<'_>[src]

Bit 19 - INITBK Set

impl W<u32, Reg<u32, _UPINRQ0>>[src]

pub fn inrq(&mut self) -> INRQ_W<'_>[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&mut self) -> INMODE_W<'_>[src]

Bit 8 - IN Request Mode

impl W<u32, Reg<u32, _UPINRQ1>>[src]

pub fn inrq(&mut self) -> INRQ_W<'_>[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&mut self) -> INMODE_W<'_>[src]

Bit 8 - IN Request Mode

impl W<u32, Reg<u32, _UPINRQ2>>[src]

pub fn inrq(&mut self) -> INRQ_W<'_>[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&mut self) -> INMODE_W<'_>[src]

Bit 8 - IN Request Mode

impl W<u32, Reg<u32, _UPINRQ3>>[src]

pub fn inrq(&mut self) -> INRQ_W<'_>[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&mut self) -> INMODE_W<'_>[src]

Bit 8 - IN Request Mode

impl W<u32, Reg<u32, _UPINRQ4>>[src]

pub fn inrq(&mut self) -> INRQ_W<'_>[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&mut self) -> INMODE_W<'_>[src]

Bit 8 - IN Request Mode

impl W<u32, Reg<u32, _UPINRQ5>>[src]

pub fn inrq(&mut self) -> INRQ_W<'_>[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&mut self) -> INMODE_W<'_>[src]

Bit 8 - IN Request Mode

impl W<u32, Reg<u32, _UPINRQ6>>[src]

pub fn inrq(&mut self) -> INRQ_W<'_>[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&mut self) -> INMODE_W<'_>[src]

Bit 8 - IN Request Mode

impl W<u32, Reg<u32, _UPINRQ7>>[src]

pub fn inrq(&mut self) -> INRQ_W<'_>[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&mut self) -> INMODE_W<'_>[src]

Bit 8 - IN Request Mode

impl W<u32, Reg<u32, _UPRST>>[src]

pub fn pen0(&mut self) -> PEN0_W<'_>[src]

Bit 0 - Pipe0 Enable

pub fn pen1(&mut self) -> PEN1_W<'_>[src]

Bit 1 - Pipe1 Enable

pub fn pen2(&mut self) -> PEN2_W<'_>[src]

Bit 2 - Pipe2 Enable

pub fn pen3(&mut self) -> PEN3_W<'_>[src]

Bit 3 - Pipe3 Enable

pub fn pen4(&mut self) -> PEN4_W<'_>[src]

Bit 4 - Pipe4 Enable

pub fn pen5(&mut self) -> PEN5_W<'_>[src]

Bit 5 - Pipe5 Enable

pub fn pen6(&mut self) -> PEN6_W<'_>[src]

Bit 6 - Pipe6 Enable

pub fn pen7(&mut self) -> PEN7_W<'_>[src]

Bit 7 - Pipe7 Enable

impl W<u32, Reg<u32, _UPSTA0CLR>>[src]

pub fn rxinic(&mut self) -> RXINIC_W<'_>[src]

Bit 0 - RXINI Clear

pub fn txoutic(&mut self) -> TXOUTIC_W<'_>[src]

Bit 1 - TXOUTI Clear

pub fn txstpic(&mut self) -> TXSTPIC_W<'_>[src]

Bit 2 - TXSTPI Clear

pub fn perric(&mut self) -> PERRIC_W<'_>[src]

Bit 3 - PERRI Clear

pub fn nakedic(&mut self) -> NAKEDIC_W<'_>[src]

Bit 4 - NAKEDI Clear

pub fn errorfic(&mut self) -> ERRORFIC_W<'_>[src]

Bit 5 - ERRORFI Clear

pub fn rxstalldic(&mut self) -> RXSTALLDIC_W<'_>[src]

Bit 6 - RXSTALLDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 10 - RAMACERI Clear

impl W<u32, Reg<u32, _UPSTA0SET>>[src]

pub fn rxinis(&mut self) -> RXINIS_W<'_>[src]

Bit 0 - RXINI Set

pub fn txoutis(&mut self) -> TXOUTIS_W<'_>[src]

Bit 1 - TXOUTI Set

pub fn txstpis(&mut self) -> TXSTPIS_W<'_>[src]

Bit 2 - TXSTPI Set

pub fn perris(&mut self) -> PERRIS_W<'_>[src]

Bit 3 - PERRI Set

pub fn nakedis(&mut self) -> NAKEDIS_W<'_>[src]

Bit 4 - NAKEDI Set

pub fn errorfis(&mut self) -> ERRORFIS_W<'_>[src]

Bit 5 - ERRORFI Set

pub fn rxstalldis(&mut self) -> RXSTALLDIS_W<'_>[src]

Bit 6 - RXSTALLDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 10 - RAMACERI Set

impl W<u32, Reg<u32, _UPSTA1CLR>>[src]

pub fn rxinic(&mut self) -> RXINIC_W<'_>[src]

Bit 0 - RXINI Clear

pub fn txoutic(&mut self) -> TXOUTIC_W<'_>[src]

Bit 1 - TXOUTI Clear

pub fn txstpic(&mut self) -> TXSTPIC_W<'_>[src]

Bit 2 - TXSTPI Clear

pub fn perric(&mut self) -> PERRIC_W<'_>[src]

Bit 3 - PERRI Clear

pub fn nakedic(&mut self) -> NAKEDIC_W<'_>[src]

Bit 4 - NAKEDI Clear

pub fn errorfic(&mut self) -> ERRORFIC_W<'_>[src]

Bit 5 - ERRORFI Clear

pub fn rxstalldic(&mut self) -> RXSTALLDIC_W<'_>[src]

Bit 6 - RXSTALLDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 10 - RAMACERI Clear

impl W<u32, Reg<u32, _UPSTA1SET>>[src]

pub fn rxinis(&mut self) -> RXINIS_W<'_>[src]

Bit 0 - RXINI Set

pub fn txoutis(&mut self) -> TXOUTIS_W<'_>[src]

Bit 1 - TXOUTI Set

pub fn txstpis(&mut self) -> TXSTPIS_W<'_>[src]

Bit 2 - TXSTPI Set

pub fn perris(&mut self) -> PERRIS_W<'_>[src]

Bit 3 - PERRI Set

pub fn nakedis(&mut self) -> NAKEDIS_W<'_>[src]

Bit 4 - NAKEDI Set

pub fn errorfis(&mut self) -> ERRORFIS_W<'_>[src]

Bit 5 - ERRORFI Set

pub fn rxstalldis(&mut self) -> RXSTALLDIS_W<'_>[src]

Bit 6 - RXSTALLDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 10 - RAMACERI Set

impl W<u32, Reg<u32, _UPSTA2CLR>>[src]

pub fn rxinic(&mut self) -> RXINIC_W<'_>[src]

Bit 0 - RXINI Clear

pub fn txoutic(&mut self) -> TXOUTIC_W<'_>[src]

Bit 1 - TXOUTI Clear

pub fn txstpic(&mut self) -> TXSTPIC_W<'_>[src]

Bit 2 - TXSTPI Clear

pub fn perric(&mut self) -> PERRIC_W<'_>[src]

Bit 3 - PERRI Clear

pub fn nakedic(&mut self) -> NAKEDIC_W<'_>[src]

Bit 4 - NAKEDI Clear

pub fn errorfic(&mut self) -> ERRORFIC_W<'_>[src]

Bit 5 - ERRORFI Clear

pub fn rxstalldic(&mut self) -> RXSTALLDIC_W<'_>[src]

Bit 6 - RXSTALLDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 10 - RAMACERI Clear

impl W<u32, Reg<u32, _UPSTA2SET>>[src]

pub fn rxinis(&mut self) -> RXINIS_W<'_>[src]

Bit 0 - RXINI Set

pub fn txoutis(&mut self) -> TXOUTIS_W<'_>[src]

Bit 1 - TXOUTI Set

pub fn txstpis(&mut self) -> TXSTPIS_W<'_>[src]

Bit 2 - TXSTPI Set

pub fn perris(&mut self) -> PERRIS_W<'_>[src]

Bit 3 - PERRI Set

pub fn nakedis(&mut self) -> NAKEDIS_W<'_>[src]

Bit 4 - NAKEDI Set

pub fn errorfis(&mut self) -> ERRORFIS_W<'_>[src]

Bit 5 - ERRORFI Set

pub fn rxstalldis(&mut self) -> RXSTALLDIS_W<'_>[src]

Bit 6 - RXSTALLDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 10 - RAMACERI Set

impl W<u32, Reg<u32, _UPSTA3CLR>>[src]

pub fn rxinic(&mut self) -> RXINIC_W<'_>[src]

Bit 0 - RXINI Clear

pub fn txoutic(&mut self) -> TXOUTIC_W<'_>[src]

Bit 1 - TXOUTI Clear

pub fn txstpic(&mut self) -> TXSTPIC_W<'_>[src]

Bit 2 - TXSTPI Clear

pub fn perric(&mut self) -> PERRIC_W<'_>[src]

Bit 3 - PERRI Clear

pub fn nakedic(&mut self) -> NAKEDIC_W<'_>[src]

Bit 4 - NAKEDI Clear

pub fn errorfic(&mut self) -> ERRORFIC_W<'_>[src]

Bit 5 - ERRORFI Clear

pub fn rxstalldic(&mut self) -> RXSTALLDIC_W<'_>[src]

Bit 6 - RXSTALLDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 10 - RAMACERI Clear

impl W<u32, Reg<u32, _UPSTA3SET>>[src]

pub fn rxinis(&mut self) -> RXINIS_W<'_>[src]

Bit 0 - RXINI Set

pub fn txoutis(&mut self) -> TXOUTIS_W<'_>[src]

Bit 1 - TXOUTI Set

pub fn txstpis(&mut self) -> TXSTPIS_W<'_>[src]

Bit 2 - TXSTPI Set

pub fn perris(&mut self) -> PERRIS_W<'_>[src]

Bit 3 - PERRI Set

pub fn nakedis(&mut self) -> NAKEDIS_W<'_>[src]

Bit 4 - NAKEDI Set

pub fn errorfis(&mut self) -> ERRORFIS_W<'_>[src]

Bit 5 - ERRORFI Set

pub fn rxstalldis(&mut self) -> RXSTALLDIS_W<'_>[src]

Bit 6 - RXSTALLDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 10 - RAMACERI Set

impl W<u32, Reg<u32, _UPSTA4CLR>>[src]

pub fn rxinic(&mut self) -> RXINIC_W<'_>[src]

Bit 0 - RXINI Clear

pub fn txoutic(&mut self) -> TXOUTIC_W<'_>[src]

Bit 1 - TXOUTI Clear

pub fn txstpic(&mut self) -> TXSTPIC_W<'_>[src]

Bit 2 - TXSTPI Clear

pub fn perric(&mut self) -> PERRIC_W<'_>[src]

Bit 3 - PERRI Clear

pub fn nakedic(&mut self) -> NAKEDIC_W<'_>[src]

Bit 4 - NAKEDI Clear

pub fn errorfic(&mut self) -> ERRORFIC_W<'_>[src]

Bit 5 - ERRORFI Clear

pub fn rxstalldic(&mut self) -> RXSTALLDIC_W<'_>[src]

Bit 6 - RXSTALLDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 10 - RAMACERI Clear

impl W<u32, Reg<u32, _UPSTA4SET>>[src]

pub fn rxinis(&mut self) -> RXINIS_W<'_>[src]

Bit 0 - RXINI Set

pub fn txoutis(&mut self) -> TXOUTIS_W<'_>[src]

Bit 1 - TXOUTI Set

pub fn txstpis(&mut self) -> TXSTPIS_W<'_>[src]

Bit 2 - TXSTPI Set

pub fn perris(&mut self) -> PERRIS_W<'_>[src]

Bit 3 - PERRI Set

pub fn nakedis(&mut self) -> NAKEDIS_W<'_>[src]

Bit 4 - NAKEDI Set

pub fn errorfis(&mut self) -> ERRORFIS_W<'_>[src]

Bit 5 - ERRORFI Set

pub fn rxstalldis(&mut self) -> RXSTALLDIS_W<'_>[src]

Bit 6 - RXSTALLDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 10 - RAMACERI Set

impl W<u32, Reg<u32, _UPSTA5CLR>>[src]

pub fn rxinic(&mut self) -> RXINIC_W<'_>[src]

Bit 0 - RXINI Clear

pub fn txoutic(&mut self) -> TXOUTIC_W<'_>[src]

Bit 1 - TXOUTI Clear

pub fn txstpic(&mut self) -> TXSTPIC_W<'_>[src]

Bit 2 - TXSTPI Clear

pub fn perric(&mut self) -> PERRIC_W<'_>[src]

Bit 3 - PERRI Clear

pub fn nakedic(&mut self) -> NAKEDIC_W<'_>[src]

Bit 4 - NAKEDI Clear

pub fn errorfic(&mut self) -> ERRORFIC_W<'_>[src]

Bit 5 - ERRORFI Clear

pub fn rxstalldic(&mut self) -> RXSTALLDIC_W<'_>[src]

Bit 6 - RXSTALLDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 10 - RAMACERI Clear

impl W<u32, Reg<u32, _UPSTA5SET>>[src]

pub fn rxinis(&mut self) -> RXINIS_W<'_>[src]

Bit 0 - RXINI Set

pub fn txoutis(&mut self) -> TXOUTIS_W<'_>[src]

Bit 1 - TXOUTI Set

pub fn txstpis(&mut self) -> TXSTPIS_W<'_>[src]

Bit 2 - TXSTPI Set

pub fn perris(&mut self) -> PERRIS_W<'_>[src]

Bit 3 - PERRI Set

pub fn nakedis(&mut self) -> NAKEDIS_W<'_>[src]

Bit 4 - NAKEDI Set

pub fn errorfis(&mut self) -> ERRORFIS_W<'_>[src]

Bit 5 - ERRORFI Set

pub fn rxstalldis(&mut self) -> RXSTALLDIS_W<'_>[src]

Bit 6 - RXSTALLDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 10 - RAMACERI Set

impl W<u32, Reg<u32, _UPSTA6CLR>>[src]

pub fn rxinic(&mut self) -> RXINIC_W<'_>[src]

Bit 0 - RXINI Clear

pub fn txoutic(&mut self) -> TXOUTIC_W<'_>[src]

Bit 1 - TXOUTI Clear

pub fn txstpic(&mut self) -> TXSTPIC_W<'_>[src]

Bit 2 - TXSTPI Clear

pub fn perric(&mut self) -> PERRIC_W<'_>[src]

Bit 3 - PERRI Clear

pub fn nakedic(&mut self) -> NAKEDIC_W<'_>[src]

Bit 4 - NAKEDI Clear

pub fn errorfic(&mut self) -> ERRORFIC_W<'_>[src]

Bit 5 - ERRORFI Clear

pub fn rxstalldic(&mut self) -> RXSTALLDIC_W<'_>[src]

Bit 6 - RXSTALLDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 10 - RAMACERI Clear

impl W<u32, Reg<u32, _UPSTA6SET>>[src]

pub fn rxinis(&mut self) -> RXINIS_W<'_>[src]

Bit 0 - RXINI Set

pub fn txoutis(&mut self) -> TXOUTIS_W<'_>[src]

Bit 1 - TXOUTI Set

pub fn txstpis(&mut self) -> TXSTPIS_W<'_>[src]

Bit 2 - TXSTPI Set

pub fn perris(&mut self) -> PERRIS_W<'_>[src]

Bit 3 - PERRI Set

pub fn nakedis(&mut self) -> NAKEDIS_W<'_>[src]

Bit 4 - NAKEDI Set

pub fn errorfis(&mut self) -> ERRORFIS_W<'_>[src]

Bit 5 - ERRORFI Set

pub fn rxstalldis(&mut self) -> RXSTALLDIS_W<'_>[src]

Bit 6 - RXSTALLDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 10 - RAMACERI Set

impl W<u32, Reg<u32, _UPSTA7CLR>>[src]

pub fn rxinic(&mut self) -> RXINIC_W<'_>[src]

Bit 0 - RXINI Clear

pub fn txoutic(&mut self) -> TXOUTIC_W<'_>[src]

Bit 1 - TXOUTI Clear

pub fn txstpic(&mut self) -> TXSTPIC_W<'_>[src]

Bit 2 - TXSTPI Clear

pub fn perric(&mut self) -> PERRIC_W<'_>[src]

Bit 3 - PERRI Clear

pub fn nakedic(&mut self) -> NAKEDIC_W<'_>[src]

Bit 4 - NAKEDI Clear

pub fn errorfic(&mut self) -> ERRORFIC_W<'_>[src]

Bit 5 - ERRORFI Clear

pub fn rxstalldic(&mut self) -> RXSTALLDIC_W<'_>[src]

Bit 6 - RXSTALLDI Clear

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 10 - RAMACERI Clear

impl W<u32, Reg<u32, _UPSTA7SET>>[src]

pub fn rxinis(&mut self) -> RXINIS_W<'_>[src]

Bit 0 - RXINI Set

pub fn txoutis(&mut self) -> TXOUTIS_W<'_>[src]

Bit 1 - TXOUTI Set

pub fn txstpis(&mut self) -> TXSTPIS_W<'_>[src]

Bit 2 - TXSTPI Set

pub fn perris(&mut self) -> PERRIS_W<'_>[src]

Bit 3 - PERRI Set

pub fn nakedis(&mut self) -> NAKEDIS_W<'_>[src]

Bit 4 - NAKEDI Set

pub fn errorfis(&mut self) -> ERRORFIS_W<'_>[src]

Bit 5 - ERRORFI Set

pub fn rxstalldis(&mut self) -> RXSTALLDIS_W<'_>[src]

Bit 6 - RXSTALLDI Set

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 10 - RAMACERI Set

impl W<u32, Reg<u32, _USBCON>>[src]

pub fn frzclk(&mut self) -> FRZCLK_W<'_>[src]

Bit 14 - Freeze USB Clock

pub fn usbe(&mut self) -> USBE_W<'_>[src]

Bit 15 - USBC Enable

pub fn uimod(&mut self) -> UIMOD_W<'_>[src]

Bit 24 - USBC Mode

impl W<u32, Reg<u32, _USBSTACLR>>[src]

pub fn ramaceric(&mut self) -> RAMACERIC_W<'_>[src]

Bit 8 - RAMACERI Clear

pub fn vbusrqc(&mut self) -> VBUSRQC_W<'_>[src]

Bit 9 - VBUSRQ Clear

impl W<u32, Reg<u32, _USBSTASET>>[src]

pub fn ramaceris(&mut self) -> RAMACERIS_W<'_>[src]

Bit 8 - RAMACERI Set

pub fn vbusrqs(&mut self) -> VBUSRQS_W<'_>[src]

Bit 9 - VBUSRQ Set

impl W<u32, Reg<u32, _CLR>>[src]

pub fn wdtclr(&mut self) -> WDTCLR_W<'_>[src]

Bit 0 - Clear WDT counter

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 24:31 - Key

impl W<u32, Reg<u32, _CTRL>>[src]

pub fn en(&mut self) -> EN_W<'_>[src]

Bit 0 - WDT Enable

pub fn dar(&mut self) -> DAR_W<'_>[src]

Bit 1 - WDT Disable After Reset

pub fn mode(&mut self) -> MODE_W<'_>[src]

Bit 2 - WDT Mode

pub fn sfv(&mut self) -> SFV_W<'_>[src]

Bit 3 - WDT Store Final Value

pub fn im(&mut self) -> IM_W<'_>[src]

Bit 4 - WDT Interruput Mode

pub fn fcd(&mut self) -> FCD_W<'_>[src]

Bit 7 - WDT Fuse Calibration Done

pub fn psel(&mut self) -> PSEL_W<'_>[src]

Bits 8:12 - Timeout Prescale Select

pub fn cssel1(&mut self) -> CSSEL1_W<'_>[src]

Bit 14 - Clock Source Selection1

pub fn cen(&mut self) -> CEN_W<'_>[src]

Bit 16 - Clock Enable

pub fn cssel(&mut self) -> CSSEL_W<'_>[src]

Bit 17 - Clock Source Selection0

pub fn tban(&mut self) -> TBAN_W<'_>[src]

Bits 18:22 - TBAN Prescale Select

pub fn key(&mut self) -> KEY_W<'_>[src]

Bits 24:31 - Key

impl W<u32, Reg<u32, _ICR>>[src]

pub fn wint(&mut self) -> WINT_W<'_>[src]

Bit 2 - Watchdog Interrupt

impl W<u32, Reg<u32, _IDR>>[src]

pub fn wint(&mut self) -> WINT_W<'_>[src]

Bit 2 - Watchdog Interrupt

impl W<u32, Reg<u32, _IER>>[src]

pub fn wint(&mut self) -> WINT_W<'_>[src]

Bit 2 - Watchdog Interrupt

Auto Trait Implementations

impl<U, REG> Send for W<U, REG> where
    REG: Send,
    U: Send

impl<U, REG> Sync for W<U, REG> where
    REG: Sync,
    U: Sync

impl<U, REG> Unpin for W<U, REG> where
    REG: Unpin,
    U: Unpin

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.