Struct atsam4ls4b_pac::generic::R[][src]

pub struct R<U, T> { /* fields omitted */ }

Register/field reader.

Result of the read methods of registers. Also used as a closure argument in the modify method.

Implementations

impl<U, T> R<U, T> where
    U: Copy
[src]

pub fn bits(&self) -> U[src]

Reads raw bits from register/field.

impl<FI> R<bool, FI>[src]

pub fn bit(&self) -> bool[src]

Value of the field as raw bits.

pub fn bit_is_clear(&self) -> bool[src]

Returns true if the bit is clear (0).

pub fn bit_is_set(&self) -> bool[src]

Returns true if the bit is set (1).

impl R<bool, EN_A>[src]

pub fn variant(&self) -> EN_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, SWAP_A>[src]

pub fn variant(&self) -> SWAP_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _CR>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Enable

pub fn swap(&self) -> SWAP_R[src]

Bit 1 - Swap Channels

pub fn altupr(&self) -> ALTUPR_R[src]

Bit 3 - Alternative up-sampling ratio

pub fn cmoc(&self) -> CMOC_R[src]

Bit 4 - Common mode offset control

pub fn mono(&self) -> MONO_R[src]

Bit 5 - Mono mode

pub fn swrst(&self) -> SWRST_R[src]

Bit 7 - Software reset

pub fn dataformat(&self) -> DATAFORMAT_R[src]

Bits 16:18 - Data word format

pub fn fs(&self) -> FS_R[src]

Bits 24:27 - Sampling frequency

impl R<bool, TXRDY_A>[src]

pub fn variant(&self) -> TXRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXUR_A>[src]

pub fn variant(&self) -> TXUR_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _IMR>>[src]

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmit Ready Interrupt Mask

pub fn txur(&self) -> TXUR_R[src]

Bit 2 - Transmit Underrun Interrupt Mask

impl R<u32, Reg<u32, _SDR0>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Sample Data

impl R<u32, Reg<u32, _SDR1>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Sample Data

impl R<bool, TXRDY_A>[src]

pub fn variant(&self) -> TXRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXUR_A>[src]

pub fn variant(&self) -> TXUR_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _SR>>[src]

pub fn busy(&self) -> BUSY_R[src]

Bit 0 - ABDACB Busy

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmit Ready

pub fn txur(&self) -> TXUR_R[src]

Bit 2 - Transmit Underrun

impl R<u32, Reg<u32, _VCR0>>[src]

pub fn volume(&self) -> VOLUME_R[src]

Bits 0:14 - Volume Control

pub fn mute(&self) -> MUTE_R[src]

Bit 31 - Mute

impl R<u32, Reg<u32, _VCR1>>[src]

pub fn volume(&self) -> VOLUME_R[src]

Bits 0:14 - Volume Control

pub fn mute(&self) -> MUTE_R[src]

Bit 31 - Mute

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u32, Reg<u32, _CONF>>[src]

pub fn is(&self) -> IS_R[src]

Bits 0:1 - Interupt Settings

pub fn mode(&self) -> MODE_R[src]

Bits 4:5 - Analog Comparator Mode

pub fn inseln(&self) -> INSELN_R[src]

Bits 8:9 - Negative Input Select

pub fn evenn(&self) -> EVENN_R[src]

Bit 16 - Peripheral Event Enable Negative

pub fn evenp(&self) -> EVENP_R[src]

Bit 17 - Peripheral Event Enable Positive

pub fn hys(&self) -> HYS_R[src]

Bits 24:25 - Hysteresis Voltage Value

pub fn fast(&self) -> FAST_R[src]

Bit 26 - Fast Mode Enable

pub fn alwayson(&self) -> ALWAYSON_R[src]

Bit 27 - Always On

impl R<u32, Reg<u32, _CONFW>>[src]

pub fn wis(&self) -> WIS_R[src]

Bits 0:2 - Window Mode Interrupt Settings

pub fn wevsrc(&self) -> WEVSRC_R[src]

Bits 8:10 - Peripheral Event Sourse Selection for Window Mode

pub fn weven(&self) -> WEVEN_R[src]

Bit 11 - Window Peripheral Event Enable

pub fn wfen(&self) -> WFEN_R[src]

Bit 16 - Window Mode Enable

impl R<u32, Reg<u32, _CTRL>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - ACIFC Enable

pub fn eventen(&self) -> EVENTEN_R[src]

Bit 1 - Peripheral Event Trigger Enable

pub fn ustart(&self) -> USTART_R[src]

Bit 4 - User Start Single Comparison

pub fn estart(&self) -> ESTART_R[src]

Bit 5 - Peripheral Event Start Single Comparison

pub fn actest(&self) -> ACTEST_R[src]

Bit 7 - Analog Comparator Test Mode

impl R<u32, Reg<u32, _IMR>>[src]

pub fn acint0(&self) -> ACINT0_R[src]

Bit 0 - AC0 Interrupt Mask

pub fn sutint0(&self) -> SUTINT0_R[src]

Bit 1 - AC0 Startup Time Interrupt Mask

pub fn acint1(&self) -> ACINT1_R[src]

Bit 2 - AC1 Interrupt Mask

pub fn sutint1(&self) -> SUTINT1_R[src]

Bit 3 - AC1 Startup Time Interrupt Mask

pub fn acint2(&self) -> ACINT2_R[src]

Bit 4 - AC2 Interrupt Mask

pub fn sutint2(&self) -> SUTINT2_R[src]

Bit 5 - AC2 Startup Time Interrupt Mask

pub fn acint3(&self) -> ACINT3_R[src]

Bit 6 - AC3 Interrupt Mask

pub fn sutint3(&self) -> SUTINT3_R[src]

Bit 7 - AC3 Startup Time Interrupt Mask

pub fn acint4(&self) -> ACINT4_R[src]

Bit 8 - AC4 Interrupt Mask

pub fn sutint4(&self) -> SUTINT4_R[src]

Bit 9 - AC4 Startup Time Interrupt Mask

pub fn acint5(&self) -> ACINT5_R[src]

Bit 10 - AC5 Interrupt Mask

pub fn sutint5(&self) -> SUTINT5_R[src]

Bit 11 - AC5 Startup Time Interrupt Mask

pub fn acint6(&self) -> ACINT6_R[src]

Bit 12 - AC6 Interrupt Mask

pub fn sutint6(&self) -> SUTINT6_R[src]

Bit 13 - AC6 Startup Time Interrupt Mask

pub fn acint7(&self) -> ACINT7_R[src]

Bit 14 - AC7 Interrupt Mask

pub fn sutint7(&self) -> SUTINT7_R[src]

Bit 15 - AC7 Startup Time Interrupt Mask

pub fn wfint0(&self) -> WFINT0_R[src]

Bit 24 - Window0 Mode Interrupt Mask

pub fn wfint1(&self) -> WFINT1_R[src]

Bit 25 - Window1 Mode Interrupt Mask

pub fn wfint2(&self) -> WFINT2_R[src]

Bit 26 - Window2 Mode Interrupt Mask

pub fn wfint3(&self) -> WFINT3_R[src]

Bit 27 - Window3 Mode Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn acint0(&self) -> ACINT0_R[src]

Bit 0 - AC0 Interrupt Status

pub fn sutint0(&self) -> SUTINT0_R[src]

Bit 1 - AC0 Startup Time Interrupt Status

pub fn acint1(&self) -> ACINT1_R[src]

Bit 2 - AC1 Interrupt Status

pub fn sutint1(&self) -> SUTINT1_R[src]

Bit 3 - AC1 Startup Time Interrupt Status

pub fn acint2(&self) -> ACINT2_R[src]

Bit 4 - AC2 Interrupt Status

pub fn sutint2(&self) -> SUTINT2_R[src]

Bit 5 - AC2 Startup Time Interrupt Status

pub fn acint3(&self) -> ACINT3_R[src]

Bit 6 - AC3 Interrupt Status

pub fn sutint3(&self) -> SUTINT3_R[src]

Bit 7 - AC3 Startup Time Interrupt Status

pub fn acint4(&self) -> ACINT4_R[src]

Bit 8 - AC4 Interrupt Status

pub fn sutint4(&self) -> SUTINT4_R[src]

Bit 9 - AC4 Startup Time Interrupt Status

pub fn acint5(&self) -> ACINT5_R[src]

Bit 10 - AC5 Interrupt Status

pub fn sutint5(&self) -> SUTINT5_R[src]

Bit 11 - AC5 Startup Time Interrupt Status

pub fn acint6(&self) -> ACINT6_R[src]

Bit 12 - AC6 Interrupt Status

pub fn sutint6(&self) -> SUTINT6_R[src]

Bit 13 - AC6 Startup Time Interrupt Status

pub fn acint7(&self) -> ACINT7_R[src]

Bit 14 - AC7 Interrupt Status

pub fn sutint7(&self) -> SUTINT7_R[src]

Bit 15 - AC7 Startup Time Interrupt Status

pub fn wfint0(&self) -> WFINT0_R[src]

Bit 24 - Window0 Mode Interrupt Status

pub fn wfint1(&self) -> WFINT1_R[src]

Bit 25 - Window1 Mode Interrupt Status

pub fn wfint2(&self) -> WFINT2_R[src]

Bit 26 - Window2 Mode Interrupt Status

pub fn wfint3(&self) -> WFINT3_R[src]

Bit 27 - Window3 Mode Interrupt Status

impl R<u32, Reg<u32, _PARAMETER>>[src]

pub fn acimpl0(&self) -> ACIMPL0_R[src]

Bit 0 - Analog Comparator 0 Implemented

pub fn acimpl1(&self) -> ACIMPL1_R[src]

Bit 1 - Analog Comparator 1 Implemented

pub fn acimpl2(&self) -> ACIMPL2_R[src]

Bit 2 - Analog Comparator 2 Implemented

pub fn acimpl3(&self) -> ACIMPL3_R[src]

Bit 3 - Analog Comparator 3 Implemented

pub fn acimpl4(&self) -> ACIMPL4_R[src]

Bit 4 - Analog Comparator 4 Implemented

pub fn acimpl5(&self) -> ACIMPL5_R[src]

Bit 5 - Analog Comparator 5 Implemented

pub fn acimpl6(&self) -> ACIMPL6_R[src]

Bit 6 - Analog Comparator 6 Implemented

pub fn acimpl7(&self) -> ACIMPL7_R[src]

Bit 7 - Analog Comparator 7 Implemented

pub fn wimpl0(&self) -> WIMPL0_R[src]

Bit 16 - Window0 Mode Implemented

pub fn wimpl1(&self) -> WIMPL1_R[src]

Bit 17 - Window1 Mode Implemented

pub fn wimpl2(&self) -> WIMPL2_R[src]

Bit 18 - Window2 Mode Implemented

pub fn wimpl3(&self) -> WIMPL3_R[src]

Bit 19 - Window3 Mode Implemented

impl R<u32, Reg<u32, _SR>>[src]

pub fn accs0(&self) -> ACCS0_R[src]

Bit 0 - AC0 Current Comparison Status

pub fn acrdy0(&self) -> ACRDY0_R[src]

Bit 1 - AC0 Ready

pub fn accs1(&self) -> ACCS1_R[src]

Bit 2 - AC1 Current Comparison Status

pub fn acrdy1(&self) -> ACRDY1_R[src]

Bit 3 - AC1 Ready

pub fn accs2(&self) -> ACCS2_R[src]

Bit 4 - AC2 Current Comparison Status

pub fn acrdy2(&self) -> ACRDY2_R[src]

Bit 5 - AC2 Ready

pub fn accs3(&self) -> ACCS3_R[src]

Bit 6 - AC3 Current Comparison Status

pub fn acrdy3(&self) -> ACRDY3_R[src]

Bit 7 - AC3 Ready

pub fn accs4(&self) -> ACCS4_R[src]

Bit 8 - AC4 Current Comparison Status

pub fn acrdy4(&self) -> ACRDY4_R[src]

Bit 9 - AC4 Ready

pub fn accs5(&self) -> ACCS5_R[src]

Bit 10 - AC5 Current Comparison Status

pub fn acrdy5(&self) -> ACRDY5_R[src]

Bit 11 - AC5 Ready

pub fn accs6(&self) -> ACCS6_R[src]

Bit 12 - AC6 Current Comparison Status

pub fn acrdy6(&self) -> ACRDY6_R[src]

Bit 13 - AC6 Ready

pub fn accs7(&self) -> ACCS7_R[src]

Bit 14 - AC7 Current Comparison Status

pub fn acrdy7(&self) -> ACRDY7_R[src]

Bit 15 - AC7 Ready

pub fn wfcs0(&self) -> WFCS0_R[src]

Bit 24 - Window0 Mode Current Status

pub fn wfcs1(&self) -> WFCS1_R[src]

Bit 25 - Window1 Mode Current Status

pub fn wfcs2(&self) -> WFCS2_R[src]

Bit 26 - Window2 Mode Current Status

pub fn wfcs3(&self) -> WFCS3_R[src]

Bit 27 - Window3 Mode Current Status

impl R<u32, Reg<u32, _TR>>[src]

pub fn actest0(&self) -> ACTEST0_R[src]

Bit 0 - AC0 Output Override Value

pub fn actest1(&self) -> ACTEST1_R[src]

Bit 1 - AC1 Output Override Value

pub fn actest2(&self) -> ACTEST2_R[src]

Bit 2 - AC2 Output Override Value

pub fn actest3(&self) -> ACTEST3_R[src]

Bit 3 - AC3 Output Override Value

pub fn actest4(&self) -> ACTEST4_R[src]

Bit 4 - AC4 Output Override Value

pub fn actest5(&self) -> ACTEST5_R[src]

Bit 5 - AC5 Output Override Value

pub fn actest6(&self) -> ACTEST6_R[src]

Bit 6 - AC6 Output Override Value

pub fn actest7(&self) -> ACTEST7_R[src]

Bit 7 - AC7 Output Override Value

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u32, Reg<u32, _CALIB>>[src]

pub fn calib(&self) -> CALIB_R[src]

Bits 0:7 - Calibration Value

pub fn biassel(&self) -> BIASSEL_R[src]

Bit 8 - Select bias mode

pub fn biascal(&self) -> BIASCAL_R[src]

Bits 12:15 - Bias Calibration

pub fn fcd(&self) -> FCD_R[src]

Bit 16 - Flash Calibration Done

impl R<u32, Reg<u32, _CFG>>[src]

pub fn refsel(&self) -> REFSEL_R[src]

Bits 1:3 - ADC Reference Selection

pub fn speed(&self) -> SPEED_R[src]

Bits 4:5 - ADC current reduction

pub fn clksel(&self) -> CLKSEL_R[src]

Bit 6 - Clock Selection for sequencer/ADC cell

pub fn prescal(&self) -> PRESCAL_R[src]

Bits 8:10 - Prescaler Rate Selection

impl R<u32, Reg<u32, _IMR>>[src]

pub fn seoc(&self) -> SEOC_R[src]

Bit 0 - Sequencer end of conversion Interrupt Mask

pub fn lovr(&self) -> LOVR_R[src]

Bit 1 - Sequencer last converted value overrun Interrupt Mask

pub fn wm(&self) -> WM_R[src]

Bit 2 - Window monitor Interrupt Mask

pub fn smtrg(&self) -> SMTRG_R[src]

Bit 3 - Sequencer missed trigger event Interrupt Mask

pub fn tto(&self) -> TTO_R[src]

Bit 5 - Timer time-out Interrupt Mask

impl R<u32, Reg<u32, _ITIMER>>[src]

pub fn itmc(&self) -> ITMC_R[src]

Bits 0:15 - Internal timer max counter

impl R<u32, Reg<u32, _LCV>>[src]

pub fn lcv(&self) -> LCV_R[src]

Bits 0:15 - Last converted value

pub fn lcpc(&self) -> LCPC_R[src]

Bits 16:19 - Last converted positive channel

pub fn lcnc(&self) -> LCNC_R[src]

Bits 20:22 - Last converted negative channel

impl R<u32, Reg<u32, _PARAMETER>>[src]

pub fn n(&self) -> N_R[src]

Bits 0:7 - Number of channels

impl R<u32, Reg<u32, _SEQCFG>>[src]

pub fn hwla(&self) -> HWLA_R[src]

Bit 0 - Half word left adjust

pub fn bipolar(&self) -> BIPOLAR_R[src]

Bit 2 - Bipolar Mode

pub fn gain(&self) -> GAIN_R[src]

Bits 4:6 - Gain factor

pub fn gcomp(&self) -> GCOMP_R[src]

Bit 7 - Gain Compensation

pub fn trgsel(&self) -> TRGSEL_R[src]

Bits 8:10 - Trigger selection

pub fn res(&self) -> RES_R[src]

Bit 12 - Resolution

pub fn internal(&self) -> INTERNAL_R[src]

Bits 14:15 - Internal Voltage Source Selection

pub fn muxpos(&self) -> MUXPOS_R[src]

Bits 16:19 - MUX selection on Positive ADC input channel

pub fn muxneg(&self) -> MUXNEG_R[src]

Bits 20:22 - MUX selection on Negative ADC input channel

pub fn zoomrange(&self) -> ZOOMRANGE_R[src]

Bits 28:30 - Zoom shift/unipolar reference source selection

impl R<u32, Reg<u32, _SR>>[src]

pub fn seoc(&self) -> SEOC_R[src]

Bit 0 - Sequencer end of conversion

pub fn lovr(&self) -> LOVR_R[src]

Bit 1 - Sequencer last converted value overrun

pub fn wm(&self) -> WM_R[src]

Bit 2 - Window monitor

pub fn smtrg(&self) -> SMTRG_R[src]

Bit 3 - Sequencer missed trigger event

pub fn sutd(&self) -> SUTD_R[src]

Bit 4 - Start-up time done

pub fn tto(&self) -> TTO_R[src]

Bit 5 - Timer time-out

pub fn en(&self) -> EN_R[src]

Bit 24 - Enable Status

pub fn tbusy(&self) -> TBUSY_R[src]

Bit 25 - Timer busy

pub fn sbusy(&self) -> SBUSY_R[src]

Bit 26 - Sequencer busy

pub fn cbusy(&self) -> CBUSY_R[src]

Bit 27 - Conversion busy

pub fn refbuf(&self) -> REFBUF_R[src]

Bit 28 - Reference buffer status

impl R<u32, Reg<u32, _TIM>>[src]

pub fn startup(&self) -> STARTUP_R[src]

Bits 0:4 - Startup time

pub fn enstup(&self) -> ENSTUP_R[src]

Bit 8 - Enable Startup

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<u32, Reg<u32, _WCFG>>[src]

pub fn wm(&self) -> WM_R[src]

Bits 12:14 - Window Monitor Mode

impl R<u32, Reg<u32, _WTH>>[src]

pub fn lt(&self) -> LT_R[src]

Bits 0:11 - Low threshold

pub fn ht(&self) -> HT_R[src]

Bits 16:27 - High Threshold

impl R<u32, Reg<u32, _AR0>>[src]

pub fn value(&self) -> VALUE_R[src]

Bits 0:31 - Alarm Value

impl R<u32, Reg<u32, _AR1>>[src]

pub fn value(&self) -> VALUE_R[src]

Bits 0:31 - Alarm Value

impl R<u32, Reg<u32, _CALV>>[src]

pub fn sec(&self) -> SEC_R[src]

Bits 0:5 - Second

pub fn min(&self) -> MIN_R[src]

Bits 6:11 - Minute

pub fn hour(&self) -> HOUR_R[src]

Bits 12:16 - Hour

pub fn day(&self) -> DAY_R[src]

Bits 17:21 - Day

pub fn month(&self) -> MONTH_R[src]

Bits 22:25 - Month

pub fn year(&self) -> YEAR_R[src]

Bits 26:31 - Year

impl R<bool, CEN_A>[src]

pub fn variant(&self) -> CEN_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, CSSEL_A>[src]

pub fn variant(&self) -> Variant<u8, CSSEL_A>[src]

Get enumerated values variant

pub fn is_slowclock(&self) -> bool[src]

Checks if the value of the field is SLOWCLOCK

pub fn is_32khzclk(&self) -> bool[src]

Checks if the value of the field is _32KHZCLK

pub fn is_pbclock(&self) -> bool[src]

Checks if the value of the field is PBCLOCK

pub fn is_gclk(&self) -> bool[src]

Checks if the value of the field is GCLK

pub fn is_1khzclk(&self) -> bool[src]

Checks if the value of the field is _1KHZCLK

impl R<u32, Reg<u32, _CLOCK>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Clock Enable

pub fn cssel(&self) -> CSSEL_R[src]

Bits 8:10 - Clock Source Selection

impl R<bool, EN_A>[src]

pub fn variant(&self) -> EN_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _CR>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Enable

pub fn pclr(&self) -> PCLR_R[src]

Bit 1 - Prescaler Clear

pub fn cal(&self) -> CAL_R[src]

Bit 2 - Calendar mode

pub fn ca0(&self) -> CA0_R[src]

Bit 8 - Clear on Alarm 0

pub fn ca1(&self) -> CA1_R[src]

Bit 9 - Clear on Alarm 1

pub fn psel(&self) -> PSEL_R[src]

Bits 16:20 - Prescaler Select

impl R<u32, Reg<u32, _CV>>[src]

pub fn value(&self) -> VALUE_R[src]

Bits 0:31 - AST Value

impl R<u32, Reg<u32, _DTR>>[src]

pub fn exp(&self) -> EXP_R[src]

Bits 0:4 - EXP

pub fn add(&self) -> ADD_R[src]

Bit 5 - ADD

pub fn value(&self) -> VALUE_R[src]

Bits 8:15 - VALUE

impl R<u32, Reg<u32, _EVM>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - Overflow

pub fn alarm0(&self) -> ALARM0_R[src]

Bit 8 - Alarm 0

pub fn alarm1(&self) -> ALARM1_R[src]

Bit 9 - Alarm 1

pub fn per0(&self) -> PER0_R[src]

Bit 16 - Perioidc 0

pub fn per1(&self) -> PER1_R[src]

Bit 17 - Periodic 1

impl R<bool, OVF_A>[src]

pub fn variant(&self) -> OVF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ALARM0_A>[src]

pub fn variant(&self) -> ALARM0_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ALARM1_A>[src]

pub fn variant(&self) -> ALARM1_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, PER0_A>[src]

pub fn variant(&self) -> PER0_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, PER1_A>[src]

pub fn variant(&self) -> PER1_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, READY_A>[src]

pub fn variant(&self) -> READY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CLKRDY_A>[src]

pub fn variant(&self) -> CLKRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _IMR>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - Overflow

pub fn alarm0(&self) -> ALARM0_R[src]

Bit 8 - Alarm 0

pub fn alarm1(&self) -> ALARM1_R[src]

Bit 9 - Alarm 1

pub fn per0(&self) -> PER0_R[src]

Bit 16 - Periodic 0

pub fn per1(&self) -> PER1_R[src]

Bit 17 - Periodic 1

pub fn ready(&self) -> READY_R[src]

Bit 25 - AST Ready

pub fn clkrdy(&self) -> CLKRDY_R[src]

Bit 29 - Clock Ready

impl R<bool, DT_A>[src]

pub fn variant(&self) -> DT_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, DTEXPWA_A>[src]

pub fn variant(&self) -> DTEXPWA_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, NUMAR_A>[src]

pub fn variant(&self) -> Variant<u8, NUMAR_A>[src]

Get enumerated values variant

pub fn is_zero(&self) -> bool[src]

Checks if the value of the field is ZERO

pub fn is_one(&self) -> bool[src]

Checks if the value of the field is ONE

pub fn is_two(&self) -> bool[src]

Checks if the value of the field is TWO

impl R<bool, NUMPIR_A>[src]

pub fn variant(&self) -> NUMPIR_A[src]

Get enumerated values variant

pub fn is_one(&self) -> bool[src]

Checks if the value of the field is ONE

pub fn is_two(&self) -> bool[src]

Checks if the value of the field is TWO

impl R<bool, PIR0WA_A>[src]

pub fn variant(&self) -> PIR0WA_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, PIR1WA_A>[src]

pub fn variant(&self) -> PIR1WA_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _PARAMETER>>[src]

pub fn dt(&self) -> DT_R[src]

Bit 0 - Digital Tuner

pub fn dtexpwa(&self) -> DTEXPWA_R[src]

Bit 1 - Digital Tuner Exponent Writeable

pub fn dtexpvalue(&self) -> DTEXPVALUE_R[src]

Bits 2:6 - Digital Tuner Exponent Value

pub fn numar(&self) -> NUMAR_R[src]

Bits 8:9 - Number of alarm comparators

pub fn numpir(&self) -> NUMPIR_R[src]

Bit 12 - Number of periodic comparators

pub fn pir0wa(&self) -> PIR0WA_R[src]

Bit 14 - Periodic Interval 0 Writeable

pub fn pir1wa(&self) -> PIR1WA_R[src]

Bit 15 - Periodic Interval 1 Writeable

pub fn per0value(&self) -> PER0VALUE_R[src]

Bits 16:20 - Periodic Interval 0 Value

pub fn per1value(&self) -> PER1VALUE_R[src]

Bits 24:28 - Periodic Interval 1 Value

impl R<u32, Reg<u32, _PIR0>>[src]

pub fn insel(&self) -> INSEL_R[src]

Bits 0:4 - Interval Select

impl R<u32, Reg<u32, _PIR1>>[src]

pub fn insel(&self) -> INSEL_R[src]

Bits 0:4 - Interval Select

impl R<bool, BUSY_A>[src]

pub fn variant(&self) -> BUSY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CLKBUSY_A>[src]

pub fn variant(&self) -> CLKBUSY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _SR>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - Overflow

pub fn alarm0(&self) -> ALARM0_R[src]

Bit 8 - Alarm 0

pub fn alarm1(&self) -> ALARM1_R[src]

Bit 9 - Alarm 1

pub fn per0(&self) -> PER0_R[src]

Bit 16 - Periodic 0

pub fn per1(&self) -> PER1_R[src]

Bit 17 - Periodic 1

pub fn busy(&self) -> BUSY_R[src]

Bit 24 - AST Busy

pub fn ready(&self) -> READY_R[src]

Bit 25 - AST Ready

pub fn clkbusy(&self) -> CLKBUSY_R[src]

Bit 28 - Clock Busy

pub fn clkrdy(&self) -> CLKRDY_R[src]

Bit 29 - Clock Ready

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<bool, OVF_A>[src]

pub fn variant(&self) -> OVF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ALARM0_A>[src]

pub fn variant(&self) -> ALARM0_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ALARM1_A>[src]

pub fn variant(&self) -> ALARM1_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, PER0_A>[src]

pub fn variant(&self) -> PER0_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, PER1_A>[src]

pub fn variant(&self) -> PER1_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _WER>>[src]

pub fn ovf(&self) -> OVF_R[src]

Bit 0 - Overflow

pub fn alarm0(&self) -> ALARM0_R[src]

Bit 8 - Alarm 0

pub fn alarm1(&self) -> ALARM1_R[src]

Bit 9 - Alarm 1

pub fn per0(&self) -> PER0_R[src]

Bit 16 - Periodic 0

pub fn per1(&self) -> PER1_R[src]

Bit 17 - Periodic 1

impl R<u32, Reg<u32, _BKUPPMUX>>[src]

pub fn bkuppmux(&self) -> BKUPPMUX_R[src]

Bits 0:8 - Backup Pin Muxing

impl R<u32, Reg<u32, _BPR>>[src]

pub fn runpspb(&self) -> RUNPSPB_R[src]

Bit 0 - Run Mode Power Scaling Preset Bypass

pub fn psmpspb(&self) -> PSMPSPB_R[src]

Bit 1 - Power Save Mode Power Scaling Preset Bypass

pub fn seqstn(&self) -> SEQSTN_R[src]

Bit 2 - Sequencial Startup from ULP (Active Low)

pub fn psbtd(&self) -> PSBTD_R[src]

Bit 3 - Power Scaling Bias Timing Disable

pub fn pshfd(&self) -> PSHFD_R[src]

Bit 4 - Power Scaling Halt Flash Until VREGOK Disable

pub fn dlyrstd(&self) -> DLYRSTD_R[src]

Bit 5 - Delaying Reset Disable

pub fn biassen(&self) -> BIASSEN_R[src]

Bit 6 - Bias Switch Enable

pub fn latsen(&self) -> LATSEN_R[src]

Bit 7 - Latdel Switch Enable

pub fn bod18cont(&self) -> BOD18CONT_R[src]

Bit 8 - BOD18 in continuous mode not disabled in WAIT/RET/BACKUP modes

pub fn pobs(&self) -> POBS_R[src]

Bit 9 - Pico Uart Observability

pub fn fffw(&self) -> FFFW_R[src]

Bit 10 - Force Flash Fast Wakeup

pub fn fbrdyen(&self) -> FBRDYEN_R[src]

Bit 11 - Flash Bias Ready Enable

pub fn fvrefsen(&self) -> FVREFSEN_R[src]

Bit 12 - Flash Vref Switch Enable

impl R<u32, Reg<u32, _FWPSAVEPS>>[src]

pub fn wreglevel(&self) -> WREGLEVEL_R[src]

Bits 0:3 - Wait mode Regulator Level

pub fn wbias(&self) -> WBIAS_R[src]

Bits 4:7 - Bias in wait mode

pub fn wlatdel(&self) -> WLATDEL_R[src]

Bits 8:12 - Flash Latdel in wait mode

pub fn rreglevel(&self) -> RREGLEVEL_R[src]

Bits 13:16 - Retention mode Regulator Level

pub fn rbias(&self) -> RBIAS_R[src]

Bits 17:20 - Bias in Retention mode

pub fn rlatdel(&self) -> RLATDEL_R[src]

Bits 21:25 - Flash Latdel in Retention mode

pub fn breglevel(&self) -> BREGLEVEL_R[src]

Bits 26:29 - Backup mode Regulator Level

pub fn por18dis(&self) -> POR18DIS_R[src]

Bit 30 - POR 18 Disable

pub fn fwsas(&self) -> FWSAS_R[src]

Bit 31 - Flash Wait State Automatic Switching

impl R<u8, REGTYPE_A>[src]

pub fn variant(&self) -> Variant<u8, REGTYPE_A>[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_lp(&self) -> bool[src]

Checks if the value of the field is LP

pub fn is_xulp(&self) -> bool[src]

Checks if the value of the field is XULP

impl R<u8, REFTYPE_A>[src]

pub fn variant(&self) -> REFTYPE_A[src]

Get enumerated values variant

pub fn is_both(&self) -> bool[src]

Checks if the value of the field is BOTH

pub fn is_bg(&self) -> bool[src]

Checks if the value of the field is BG

pub fn is_lpbg(&self) -> bool[src]

Checks if the value of the field is LPBG

pub fn is_internal(&self) -> bool[src]

Checks if the value of the field is INTERNAL

impl R<u32, Reg<u32, _FWRUNPS>>[src]

pub fn reglevel(&self) -> REGLEVEL_R[src]

Bits 0:3 - Regulator Voltage Level

pub fn regtype(&self) -> REGTYPE_R[src]

Bits 4:5 - Regulator Type

pub fn reftype(&self) -> REFTYPE_R[src]

Bits 6:7 - Reference Type

pub fn flashlatdel(&self) -> FLASHLATDEL_R[src]

Bits 8:12 - Flash Latch Delay Value

pub fn flashbias(&self) -> FLASHBIAS_R[src]

Bits 13:16 - Flash Bias Value

pub fn fppw(&self) -> FPPW_R[src]

Bit 17 - Flash Pico Power Mode

pub fn rc115(&self) -> RC115_R[src]

Bits 18:24 - RC 115KHZ Calibration Value

pub fn rcfast(&self) -> RCFAST_R[src]

Bits 25:31 - RCFAST Calibration Value

impl R<u32, Reg<u32, _IMR>>[src]

pub fn psok(&self) -> PSOK_R[src]

Bit 0 - Power Scaling OK Interrupt Mask

pub fn ae(&self) -> AE_R[src]

Bit 31 - Access Error Interrupt Mask

impl R<u32, Reg<u32, _IORET>>[src]

pub fn ret(&self) -> RET_R[src]

Bit 0 - Retention on I/O lines after waking up from the BACKUP mode

impl R<u32, Reg<u32, _ISR>>[src]

pub fn psok(&self) -> PSOK_R[src]

Bit 0 - Power Scaling OK Interrupt Status

pub fn ae(&self) -> AE_R[src]

Bit 31 - Access Error Interrupt Status

impl R<u32, Reg<u32, _PMCON>>[src]

pub fn ps(&self) -> PS_R[src]

Bits 0:1 - Power Scaling Configuration Value

pub fn pscreq(&self) -> PSCREQ_R[src]

Bit 2 - Power Scaling Change Request

pub fn pscm(&self) -> PSCM_R[src]

Bit 3 - Power Scaling Change Mode

pub fn bkup(&self) -> BKUP_R[src]

Bit 8 - BACKUP Mode

pub fn ret(&self) -> RET_R[src]

Bit 9 - RETENTION Mode

pub fn sleep(&self) -> SLEEP_R[src]

Bits 12:13 - SLEEP mode Configuration

pub fn ck32s(&self) -> CK32S_R[src]

Bit 16 - 32Khz-1Khz Clock Source Selection

pub fn fastwkup(&self) -> FASTWKUP_R[src]

Bit 24 - Fast Wakeup

impl R<u32, Reg<u32, _SR>>[src]

pub fn psok(&self) -> PSOK_R[src]

Bit 0 - Power Scaling OK Status

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u8, ADCISEL_A>[src]

pub fn variant(&self) -> Variant<u8, ADCISEL_A>[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_vtemp(&self) -> bool[src]

Checks if the value of the field is VTEMP

pub fn is_vref(&self) -> bool[src]

Checks if the value of the field is VREF

impl R<u32, Reg<u32, _BGCTRL>>[src]

pub fn adcisel(&self) -> ADCISEL_R[src]

Bits 0:1 - ADC Input Selection

pub fn tsen(&self) -> TSEN_R[src]

Bit 8 - Temperature Sensor Enable

impl R<u32, Reg<u32, _BGREFIFBVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u8, BGBUFRDY_A>[src]

pub fn variant(&self) -> Variant<u8, BGBUFRDY_A>[src]

Get enumerated values variant

pub fn is_flash(&self) -> bool[src]

Checks if the value of the field is FLASH

pub fn is_pll(&self) -> bool[src]

Checks if the value of the field is PLL

pub fn is_vreg(&self) -> bool[src]

Checks if the value of the field is VREG

pub fn is_bufrr(&self) -> bool[src]

Checks if the value of the field is BUFRR

pub fn is_adc(&self) -> bool[src]

Checks if the value of the field is ADC

pub fn is_lcd(&self) -> bool[src]

Checks if the value of the field is LCD

impl R<u32, Reg<u32, _BGSR>>[src]

pub fn bgbufrdy(&self) -> BGBUFRDY_R[src]

Bits 0:7 - Bandgap Buffer Ready

pub fn bgrdy(&self) -> BGRDY_R[src]

Bit 16 - Bandgap Voltage Reference Ready

pub fn lpbgrdy(&self) -> LPBGRDY_R[src]

Bit 17 - Low Power Bandgap Voltage Reference Ready

pub fn vref(&self) -> VREF_R[src]

Bits 18:19 - Voltage Reference Used by the System

impl R<u32, Reg<u32, _BODIFCVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u32, Reg<u32, _BOD18CTRL>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Enable

pub fn hyst(&self) -> HYST_R[src]

Bit 1 - BOD Hysteresis

pub fn action(&self) -> ACTION_R[src]

Bits 8:9 - Action

pub fn mode(&self) -> MODE_R[src]

Bit 16 - Operation modes

pub fn fcd(&self) -> FCD_R[src]

Bit 30 - BOD Fuse Calibration Done

pub fn sfv(&self) -> SFV_R[src]

Bit 31 - BOD Control Register Store Final Value

impl R<u32, Reg<u32, _BOD18LEVEL>>[src]

pub fn val(&self) -> VAL_R[src]

Bits 0:5 - BOD Value

pub fn range(&self) -> RANGE_R[src]

Bit 31 - BOD Threshold Range

impl R<u32, Reg<u32, _BOD33CTRL>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Enable

pub fn hyst(&self) -> HYST_R[src]

Bit 1 - BOD Hysteresis

pub fn action(&self) -> ACTION_R[src]

Bits 8:9 - Action

pub fn mode(&self) -> MODE_R[src]

Bit 16 - Operation modes

pub fn fcd(&self) -> FCD_R[src]

Bit 30 - BOD Fuse Calibration Done

pub fn sfv(&self) -> SFV_R[src]

Bit 31 - BOD Control Register Store Final Value

impl R<u32, Reg<u32, _BOD33LEVEL>>[src]

pub fn val(&self) -> VAL_R[src]

Bits 0:5 - BOD Value

impl R<u32, Reg<u32, _BOD33SAMPLING>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Clock Enable

pub fn cssel(&self) -> CSSEL_R[src]

Bit 1 - Clock Source Select

pub fn psel(&self) -> PSEL_R[src]

Bits 8:11 - Prescaler Select

impl R<u32, Reg<u32, _BRIFBVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u32, Reg<u32, _IMR>>[src]

pub fn osc32rdy(&self) -> OSC32RDY_R[src]

Bit 0 - 32kHz Oscillator Ready

pub fn rc32krdy(&self) -> RC32KRDY_R[src]

Bit 1 - 32kHz RC Oscillator Ready

pub fn rc32klock(&self) -> RC32KLOCK_R[src]

Bit 2 - 32kHz RC Oscillator Lock

pub fn rc32krefe(&self) -> RC32KREFE_R[src]

Bit 3 - 32kHz RC Oscillator Reference Error

pub fn rc32ksat(&self) -> RC32KSAT_R[src]

Bit 4 - 32kHz RC Oscillator Saturation

pub fn bod33det(&self) -> BOD33DET_R[src]

Bit 5 - BOD33 Detected

pub fn bod18det(&self) -> BOD18DET_R[src]

Bit 6 - BOD18 Detected

pub fn bod33synrdy(&self) -> BOD33SYNRDY_R[src]

Bit 7 - BOD33 Synchronization Ready

pub fn bod18synrdy(&self) -> BOD18SYNRDY_R[src]

Bit 8 - BOD18 Synchronization Ready

pub fn sswrdy(&self) -> SSWRDY_R[src]

Bit 9 - VREG Stop Switching Ready

pub fn vregok(&self) -> VREGOK_R[src]

Bit 10 - Main VREG OK

pub fn lpbgrdy(&self) -> LPBGRDY_R[src]

Bit 12 - Low Power Bandgap Voltage Reference Ready

pub fn ae(&self) -> AE_R[src]

Bit 31 - Access Error

impl R<u32, Reg<u32, _ISR>>[src]

pub fn osc32rdy(&self) -> OSC32RDY_R[src]

Bit 0 - 32kHz Oscillator Ready

pub fn rc32krdy(&self) -> RC32KRDY_R[src]

Bit 1 - 32kHz RC Oscillator Ready

pub fn rc32klock(&self) -> RC32KLOCK_R[src]

Bit 2 - 32kHz RC Oscillator Lock

pub fn rc32krefe(&self) -> RC32KREFE_R[src]

Bit 3 - 32kHz RC Oscillator Reference Error

pub fn rc32ksat(&self) -> RC32KSAT_R[src]

Bit 4 - 32kHz RC Oscillator Saturation

pub fn bod33det(&self) -> BOD33DET_R[src]

Bit 5 - BOD33 Detected

pub fn bod18det(&self) -> BOD18DET_R[src]

Bit 6 - BOD18 Detected

pub fn bod33synrdy(&self) -> BOD33SYNRDY_R[src]

Bit 7 - BOD33 Synchronization Ready

pub fn bod18synrdy(&self) -> BOD18SYNRDY_R[src]

Bit 8 - BOD18 Synchronization Ready

pub fn sswrdy(&self) -> SSWRDY_R[src]

Bit 9 - VREG Stop Switching Ready

pub fn vregok(&self) -> VREGOK_R[src]

Bit 10 - Main VREG OK

pub fn lpbgrdy(&self) -> LPBGRDY_R[src]

Bit 12 - Low Power Bandgap Voltage Reference Ready

pub fn ae(&self) -> AE_R[src]

Bit 31 - Access Error

impl R<u32, Reg<u32, _OSCCTRL32>>[src]

pub fn osc32en(&self) -> OSC32EN_R[src]

Bit 0 - 32 KHz Oscillator Enable

pub fn pinsel(&self) -> PINSEL_R[src]

Bit 1 - Pins Select

pub fn en32k(&self) -> EN32K_R[src]

Bit 2 - 32 KHz output Enable

pub fn en1k(&self) -> EN1K_R[src]

Bit 3 - 1 KHz output Enable

pub fn mode(&self) -> MODE_R[src]

Bits 8:10 - Oscillator Mode

pub fn selcurr(&self) -> SELCURR_R[src]

Bits 12:15 - Current selection

pub fn startup(&self) -> STARTUP_R[src]

Bits 16:18 - Oscillator Start-up Time

impl R<u32, Reg<u32, _OSC32IFAVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant nubmer

impl R<u32, Reg<u32, _PCLKSR>>[src]

pub fn osc32rdy(&self) -> OSC32RDY_R[src]

Bit 0 - 32kHz Oscillator Ready

pub fn rc32krdy(&self) -> RC32KRDY_R[src]

Bit 1 - 32kHz RC Oscillator Ready

pub fn rc32klock(&self) -> RC32KLOCK_R[src]

Bit 2 - 32kHz RC Oscillator Lock

pub fn rc32krefe(&self) -> RC32KREFE_R[src]

Bit 3 - 32kHz RC Oscillator Reference Error

pub fn rc32ksat(&self) -> RC32KSAT_R[src]

Bit 4 - 32kHz RC Oscillator Saturation

pub fn bod33det(&self) -> BOD33DET_R[src]

Bit 5 - BOD33 Detected

pub fn bod18det(&self) -> BOD18DET_R[src]

Bit 6 - BOD18 Detected

pub fn bod33synrdy(&self) -> BOD33SYNRDY_R[src]

Bit 7 - BOD33 Synchronization Ready

pub fn bod18synrdy(&self) -> BOD18SYNRDY_R[src]

Bit 8 - BOD18 Synchronization Ready

pub fn sswrdy(&self) -> SSWRDY_R[src]

Bit 9 - VREG Stop Switching Ready

pub fn vregok(&self) -> VREGOK_R[src]

Bit 10 - Main VREG OK

pub fn rc1mrdy(&self) -> RC1MRDY_R[src]

Bit 11 - RC 1MHz Oscillator Ready

pub fn lpbgrdy(&self) -> LPBGRDY_R[src]

Bit 12 - Low Power Bandgap Voltage Reference Ready

impl R<u32, Reg<u32, _RC1MCR>>[src]

pub fn clkoe(&self) -> CLKOE_R[src]

Bit 0 - 1MHz RC Osc Clock Output Enable

pub fn fcd(&self) -> FCD_R[src]

Bit 7 - Flash Calibration Done

pub fn clkcal(&self) -> CLKCAL_R[src]

Bits 8:12 - 1MHz RC Osc Calibration

impl R<u32, Reg<u32, _RC32KCR>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Enable as Generic clock source

pub fn tcen(&self) -> TCEN_R[src]

Bit 1 - Temperature Compensation Enable

pub fn en32k(&self) -> EN32K_R[src]

Bit 2 - Enable 32 KHz output

pub fn en1k(&self) -> EN1K_R[src]

Bit 3 - Enable 1 kHz output

pub fn mode(&self) -> MODE_R[src]

Bit 4 - Mode Selection

pub fn ref_(&self) -> REF_R[src]

Bit 5 - Reference select

pub fn fcd(&self) -> FCD_R[src]

Bit 7 - Flash calibration done

impl R<u32, Reg<u32, _RC32KIFBVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<u32, Reg<u32, _RC32KTUNE>>[src]

pub fn fine(&self) -> FINE_R[src]

Bits 0:5 - Fine value

pub fn coarse(&self) -> COARSE_R[src]

Bits 16:22 - Coarse Value

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u32, Reg<u32, _VREGCR>>[src]

pub fn dis(&self) -> DIS_R[src]

Bit 0 - Voltage Regulator disable

pub fn ssg(&self) -> SSG_R[src]

Bit 8 - Spread Spectrum Generator Enable

pub fn ssw(&self) -> SSW_R[src]

Bit 9 - Stop Switching

pub fn sswevt(&self) -> SSWEVT_R[src]

Bit 10 - Stop Switching On Event Enable

pub fn sfv(&self) -> SFV_R[src]

Bit 31 - Store Final Value

impl R<u32, Reg<u32, _VREGIFGVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u32, Reg<u32, _CNTCR>>[src]

pub fn top(&self) -> TOP_R[src]

Bits 0:23 - Counter Top Value

pub fn spread(&self) -> SPREAD_R[src]

Bits 24:27 - Spread Spectrum

pub fn repeat(&self) -> REPEAT_R[src]

Bits 28:30 - Repeat Measurements

impl R<u32, Reg<u32, _CR>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Module Enable

pub fn run(&self) -> RUN_R[src]

Bit 1 - Start Operation

pub fn iidle(&self) -> IIDLE_R[src]

Bit 2 - Initialize Idle Value

pub fn etrig(&self) -> ETRIG_R[src]

Bit 3 - Event Triggered Operation

pub fn intres(&self) -> INTRES_R[src]

Bit 4 - Internal Resistors

pub fn cksel(&self) -> CKSEL_R[src]

Bit 5 - Clock Select

pub fn diff(&self) -> DIFF_R[src]

Bit 6 - Differential Mode

pub fn dmaen(&self) -> DMAEN_R[src]

Bit 7 - DMA Enable

pub fn esamples(&self) -> ESAMPLES_R[src]

Bits 8:14 - Number of Event Samples

pub fn charget(&self) -> CHARGET_R[src]

Bits 16:19 - Charge Time

pub fn swrst(&self) -> SWRST_R[src]

Bit 31 - Software Reset

impl R<u32, Reg<u32, _DMA>>[src]

pub fn dma(&self) -> DMA_R[src]

Bits 0:31 - Direct Memory Access

impl R<u32, Reg<u32, _IDLE>>[src]

pub fn fidle(&self) -> FIDLE_R[src]

Bits 0:11 - Fractional Sensor Idle

pub fn ridle(&self) -> RIDLE_R[src]

Bits 12:27 - Integer Sensor Idle

impl R<u32, Reg<u32, _IMR>>[src]

pub fn sample(&self) -> SAMPLE_R[src]

Bit 0 - Sample Ready Interrupt Mask

pub fn intch(&self) -> INTCH_R[src]

Bit 1 - In-touch Interrupt Mask

pub fn outtch(&self) -> OUTTCH_R[src]

Bit 2 - Out-of-Touch Interrupt Mask

impl R<u32, Reg<u32, _INTCH>>[src]

pub fn intch(&self) -> INTCH_R[src]

Bits 0:31 - In-Touch

impl R<u32, Reg<u32, _ISR>>[src]

pub fn sample(&self) -> SAMPLE_R[src]

Bit 0 - Sample Ready Interrupt Status

pub fn intch(&self) -> INTCH_R[src]

Bit 1 - In-touch Interrupt Status

pub fn outtch(&self) -> OUTTCH_R[src]

Bit 2 - Out-of-Touch Interrupt Status

impl R<u32, Reg<u32, _LEVEL>>[src]

pub fn flevel(&self) -> FLEVEL_R[src]

Bits 0:11 - Fractional Sensor Level

pub fn rlevel(&self) -> RLEVEL_R[src]

Bits 12:19 - Integer Sensor Level

impl R<u32, Reg<u32, _OUTTCH>>[src]

pub fn outtch(&self) -> OUTTCH_R[src]

Bits 0:31 - Out-of-Touch

impl R<u32, Reg<u32, _PARAMETER>>[src]

pub fn npins(&self) -> NPINS_R[src]

Bits 0:7 - Number of Pins

pub fn nstatus(&self) -> NSTATUS_R[src]

Bits 8:15 - Number of Status bits

pub fn fractional(&self) -> FRACTIONAL_R[src]

Bits 16:19 - Number of Fractional bits

impl R<u32, Reg<u32, _PINSEL>>[src]

pub fn pinsel(&self) -> PINSEL_R[src]

Bits 0:7 - Pin Select

impl R<u32, Reg<u32, _RAW>>[src]

pub fn rawa(&self) -> RAWA_R[src]

Bits 16:23 - Current Sensor Raw Value

pub fn rawb(&self) -> RAWB_R[src]

Bits 24:31 - Last Sensor Raw Value

impl R<u32, Reg<u32, _THRESH>>[src]

pub fn fthresh(&self) -> FTHRESH_R[src]

Bits 0:11 - Fractional part of Threshold Value

pub fn rthresh(&self) -> RTHRESH_R[src]

Bits 12:19 - Rational part of Threshold Value

pub fn dir(&self) -> DIR_R[src]

Bit 23 - Threshold Direction

pub fn length(&self) -> LENGTH_R[src]

Bits 24:28 - Threshold Length

impl R<u32, Reg<u32, _TIMING>>[src]

pub fn tlevel(&self) -> TLEVEL_R[src]

Bits 0:11 - Relative Level Smoothing

pub fn tidle(&self) -> TIDLE_R[src]

Bits 16:27 - Idle Smoothening

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<u32, Reg<u32, _DMAISR>>[src]

pub fn dmaisr(&self) -> DMAISR_R[src]

Bit 0 - DMA Interrupt Status

impl R<u32, Reg<u32, _DMASR>>[src]

pub fn dmasr(&self) -> DMASR_R[src]

Bit 0 - DMA Channel Status

impl R<u32, Reg<u32, _DSCR>>[src]

pub fn dscr(&self) -> DSCR_R[src]

Bits 9:31 - Description Base Address

impl R<u32, Reg<u32, _IMR>>[src]

pub fn errimr(&self) -> ERRIMR_R[src]

Bit 0 - CRC Error Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn errisr(&self) -> ERRISR_R[src]

Bit 0 - CRC Error Interrupt Status

impl R<u8, PTYPE_A>[src]

pub fn variant(&self) -> Variant<u8, PTYPE_A>[src]

Get enumerated values variant

pub fn is_ccitt8023(&self) -> bool[src]

Checks if the value of the field is CCITT8023

pub fn is_castagnoli(&self) -> bool[src]

Checks if the value of the field is CASTAGNOLI

pub fn is_ccitt16(&self) -> bool[src]

Checks if the value of the field is CCITT16

impl R<u32, Reg<u32, _MR>>[src]

pub fn enable(&self) -> ENABLE_R[src]

Bit 0 - CRC Computation Enable

pub fn compare(&self) -> COMPARE_R[src]

Bit 1 - CRC Compare

pub fn ptype(&self) -> PTYPE_R[src]

Bits 2:3 - Polynomial Type

pub fn divider(&self) -> DIVIDER_R[src]

Bits 4:7 - Bandwidth Divider

impl R<u32, Reg<u32, _SR>>[src]

pub fn crc(&self) -> CRC_R[src]

Bits 0:31 - Cyclic Redundancy Check Value

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u32, Reg<u32, _IMR>>[src]

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 0 - Transmit Ready Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 0 - Transmit Ready Interrupt Status

impl R<u32, Reg<u32, _MR>>[src]

pub fn trgen(&self) -> TRGEN_R[src]

Bit 0 - Trigger Enable

pub fn trgsel(&self) -> TRGSEL_R[src]

Bits 1:3 - Trigger Selection

pub fn dacen(&self) -> DACEN_R[src]

Bit 4 - DAC Enable

pub fn word(&self) -> WORD_R[src]

Bit 5 - Word Transfer

pub fn startup(&self) -> STARTUP_R[src]

Bits 8:15 - Startup Time Selection

pub fn clkdiv(&self) -> CLKDIV_R[src]

Bits 16:31 - Clock Divider for Internal Trigger

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:18 - Variant Number

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protect Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protect Key

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wproterr(&self) -> WPROTERR_R[src]

Bit 0 - Write Protection Error

pub fn wprotaddr(&self) -> WPROTADDR_R[src]

Bits 8:15 - Write Protection Error Address

impl R<u32, Reg<u32, _ASYNC>>[src]

pub fn nmi(&self) -> NMI_R[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&self) -> INT1_R[src]

Bit 1 - External Interrupt 1

pub fn int2(&self) -> INT2_R[src]

Bit 2 - External Interrupt 2

pub fn int3(&self) -> INT3_R[src]

Bit 3 - External Interrupt 3

pub fn int4(&self) -> INT4_R[src]

Bit 4 - External Interrupt 4

pub fn int5(&self) -> INT5_R[src]

Bit 5 - External Interrupt 5

pub fn int6(&self) -> INT6_R[src]

Bit 6 - External Interrupt 6

pub fn int7(&self) -> INT7_R[src]

Bit 7 - External Interrupt 7

pub fn int8(&self) -> INT8_R[src]

Bit 8 - External Interrupt 8

pub fn int9(&self) -> INT9_R[src]

Bit 9 - External Interrupt 9

pub fn int10(&self) -> INT10_R[src]

Bit 10 - External Interrupt 10

pub fn int11(&self) -> INT11_R[src]

Bit 11 - External Interrupt 11

pub fn int12(&self) -> INT12_R[src]

Bit 12 - External Interrupt 12

pub fn int13(&self) -> INT13_R[src]

Bit 13 - External Interrupt 13

pub fn int14(&self) -> INT14_R[src]

Bit 14 - External Interrupt 14

pub fn int15(&self) -> INT15_R[src]

Bit 15 - External Interrupt 15

impl R<u32, Reg<u32, _CTRL>>[src]

pub fn nmi(&self) -> NMI_R[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&self) -> INT1_R[src]

Bit 1 - External Interrupt 1

pub fn int2(&self) -> INT2_R[src]

Bit 2 - External Interrupt 2

pub fn int3(&self) -> INT3_R[src]

Bit 3 - External Interrupt 3

pub fn int4(&self) -> INT4_R[src]

Bit 4 - External Interrupt 4

pub fn int5(&self) -> INT5_R[src]

Bit 5 - External Interrupt 5

pub fn int6(&self) -> INT6_R[src]

Bit 6 - External Interrupt 6

pub fn int7(&self) -> INT7_R[src]

Bit 7 - External Interrupt 7

pub fn int8(&self) -> INT8_R[src]

Bit 8 - External Interrupt 8

pub fn int9(&self) -> INT9_R[src]

Bit 9 - External Interrupt 9

pub fn int10(&self) -> INT10_R[src]

Bit 10 - External Interrupt 10

pub fn int11(&self) -> INT11_R[src]

Bit 11 - External Interrupt 11

pub fn int12(&self) -> INT12_R[src]

Bit 12 - External Interrupt 12

pub fn int13(&self) -> INT13_R[src]

Bit 13 - External Interrupt 13

pub fn int14(&self) -> INT14_R[src]

Bit 14 - External Interrupt 14

pub fn int15(&self) -> INT15_R[src]

Bit 15 - External Interrupt 15

impl R<bool, INT1_A>[src]

pub fn variant(&self) -> INT1_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, INT2_A>[src]

pub fn variant(&self) -> INT2_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, INT3_A>[src]

pub fn variant(&self) -> INT3_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, INT4_A>[src]

pub fn variant(&self) -> INT4_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _EDGE>>[src]

pub fn nmi(&self) -> NMI_R[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&self) -> INT1_R[src]

Bit 1 - External Interrupt 1

pub fn int2(&self) -> INT2_R[src]

Bit 2 - External Interrupt 2

pub fn int3(&self) -> INT3_R[src]

Bit 3 - External Interrupt 3

pub fn int4(&self) -> INT4_R[src]

Bit 4 - External Interrupt 4

pub fn int5(&self) -> INT5_R[src]

Bit 5 - External Interrupt 5

pub fn int6(&self) -> INT6_R[src]

Bit 6 - External Interrupt 6

pub fn int7(&self) -> INT7_R[src]

Bit 7 - External Interrupt 7

pub fn int8(&self) -> INT8_R[src]

Bit 8 - External Interrupt 8

pub fn int9(&self) -> INT9_R[src]

Bit 9 - External Interrupt 9

pub fn int10(&self) -> INT10_R[src]

Bit 10 - External Interrupt 10

pub fn int11(&self) -> INT11_R[src]

Bit 11 - External Interrupt 11

pub fn int12(&self) -> INT12_R[src]

Bit 12 - External Interrupt 12

pub fn int13(&self) -> INT13_R[src]

Bit 13 - External Interrupt 13

pub fn int14(&self) -> INT14_R[src]

Bit 14 - External Interrupt 14

pub fn int15(&self) -> INT15_R[src]

Bit 15 - External Interrupt 15

impl R<u32, Reg<u32, _FILTER>>[src]

pub fn nmi(&self) -> NMI_R[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&self) -> INT1_R[src]

Bit 1 - External Interrupt 1

pub fn int2(&self) -> INT2_R[src]

Bit 2 - External Interrupt 2

pub fn int3(&self) -> INT3_R[src]

Bit 3 - External Interrupt 3

pub fn int4(&self) -> INT4_R[src]

Bit 4 - External Interrupt 4

pub fn int5(&self) -> INT5_R[src]

Bit 5 - External Interrupt 5

pub fn int6(&self) -> INT6_R[src]

Bit 6 - External Interrupt 6

pub fn int7(&self) -> INT7_R[src]

Bit 7 - External Interrupt 7

pub fn int8(&self) -> INT8_R[src]

Bit 8 - External Interrupt 8

pub fn int9(&self) -> INT9_R[src]

Bit 9 - External Interrupt 9

pub fn int10(&self) -> INT10_R[src]

Bit 10 - External Interrupt 10

pub fn int11(&self) -> INT11_R[src]

Bit 11 - External Interrupt 11

pub fn int12(&self) -> INT12_R[src]

Bit 12 - External Interrupt 12

pub fn int13(&self) -> INT13_R[src]

Bit 13 - External Interrupt 13

pub fn int14(&self) -> INT14_R[src]

Bit 14 - External Interrupt 14

pub fn int15(&self) -> INT15_R[src]

Bit 15 - External Interrupt 15

impl R<bool, INT1_A>[src]

pub fn variant(&self) -> INT1_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, INT2_A>[src]

pub fn variant(&self) -> INT2_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, INT3_A>[src]

pub fn variant(&self) -> INT3_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, INT4_A>[src]

pub fn variant(&self) -> INT4_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _IMR>>[src]

pub fn nmi(&self) -> NMI_R[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&self) -> INT1_R[src]

Bit 1 - External Interrupt 1

pub fn int2(&self) -> INT2_R[src]

Bit 2 - External Interrupt 2

pub fn int3(&self) -> INT3_R[src]

Bit 3 - External Interrupt 3

pub fn int4(&self) -> INT4_R[src]

Bit 4 - External Interrupt 4

pub fn int5(&self) -> INT5_R[src]

Bit 5 - External Interrupt 5

pub fn int6(&self) -> INT6_R[src]

Bit 6 - External Interrupt 6

pub fn int7(&self) -> INT7_R[src]

Bit 7 - External Interrupt 7

pub fn int8(&self) -> INT8_R[src]

Bit 8 - External Interrupt 8

pub fn int9(&self) -> INT9_R[src]

Bit 9 - External Interrupt 9

pub fn int10(&self) -> INT10_R[src]

Bit 10 - External Interrupt 10

pub fn int11(&self) -> INT11_R[src]

Bit 11 - External Interrupt 11

pub fn int12(&self) -> INT12_R[src]

Bit 12 - External Interrupt 12

pub fn int13(&self) -> INT13_R[src]

Bit 13 - External Interrupt 13

pub fn int14(&self) -> INT14_R[src]

Bit 14 - External Interrupt 14

pub fn int15(&self) -> INT15_R[src]

Bit 15 - External Interrupt 15

impl R<bool, INT1_A>[src]

pub fn variant(&self) -> INT1_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, INT2_A>[src]

pub fn variant(&self) -> INT2_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, INT3_A>[src]

pub fn variant(&self) -> INT3_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, INT4_A>[src]

pub fn variant(&self) -> INT4_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _ISR>>[src]

pub fn nmi(&self) -> NMI_R[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&self) -> INT1_R[src]

Bit 1 - External Interrupt 1

pub fn int2(&self) -> INT2_R[src]

Bit 2 - External Interrupt 2

pub fn int3(&self) -> INT3_R[src]

Bit 3 - External Interrupt 3

pub fn int4(&self) -> INT4_R[src]

Bit 4 - External Interrupt 4

pub fn int5(&self) -> INT5_R[src]

Bit 5 - External Interrupt 5

pub fn int6(&self) -> INT6_R[src]

Bit 6 - External Interrupt 6

pub fn int7(&self) -> INT7_R[src]

Bit 7 - External Interrupt 7

pub fn int8(&self) -> INT8_R[src]

Bit 8 - External Interrupt 8

pub fn int9(&self) -> INT9_R[src]

Bit 9 - External Interrupt 9

pub fn int10(&self) -> INT10_R[src]

Bit 10 - External Interrupt 10

pub fn int11(&self) -> INT11_R[src]

Bit 11 - External Interrupt 11

pub fn int12(&self) -> INT12_R[src]

Bit 12 - External Interrupt 12

pub fn int13(&self) -> INT13_R[src]

Bit 13 - External Interrupt 13

pub fn int14(&self) -> INT14_R[src]

Bit 14 - External Interrupt 14

pub fn int15(&self) -> INT15_R[src]

Bit 15 - External Interrupt 15

impl R<u32, Reg<u32, _LEVEL>>[src]

pub fn nmi(&self) -> NMI_R[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&self) -> INT1_R[src]

Bit 1 - External Interrupt 1

pub fn int2(&self) -> INT2_R[src]

Bit 2 - External Interrupt 2

pub fn int3(&self) -> INT3_R[src]

Bit 3 - External Interrupt 3

pub fn int4(&self) -> INT4_R[src]

Bit 4 - External Interrupt 4

pub fn int5(&self) -> INT5_R[src]

Bit 5 - External Interrupt 5

pub fn int6(&self) -> INT6_R[src]

Bit 6 - External Interrupt 6

pub fn int7(&self) -> INT7_R[src]

Bit 7 - External Interrupt 7

pub fn int8(&self) -> INT8_R[src]

Bit 8 - External Interrupt 8

pub fn int9(&self) -> INT9_R[src]

Bit 9 - External Interrupt 9

pub fn int10(&self) -> INT10_R[src]

Bit 10 - External Interrupt 10

pub fn int11(&self) -> INT11_R[src]

Bit 11 - External Interrupt 11

pub fn int12(&self) -> INT12_R[src]

Bit 12 - External Interrupt 12

pub fn int13(&self) -> INT13_R[src]

Bit 13 - External Interrupt 13

pub fn int14(&self) -> INT14_R[src]

Bit 14 - External Interrupt 14

pub fn int15(&self) -> INT15_R[src]

Bit 15 - External Interrupt 15

impl R<bool, INT1_A>[src]

pub fn variant(&self) -> INT1_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, INT2_A>[src]

pub fn variant(&self) -> INT2_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, INT3_A>[src]

pub fn variant(&self) -> INT3_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, INT4_A>[src]

pub fn variant(&self) -> INT4_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _MODE>>[src]

pub fn nmi(&self) -> NMI_R[src]

Bit 0 - External Non Maskable CPU interrupt

pub fn int1(&self) -> INT1_R[src]

Bit 1 - External Interrupt 1

pub fn int2(&self) -> INT2_R[src]

Bit 2 - External Interrupt 2

pub fn int3(&self) -> INT3_R[src]

Bit 3 - External Interrupt 3

pub fn int4(&self) -> INT4_R[src]

Bit 4 - External Interrupt 4

pub fn int5(&self) -> INT5_R[src]

Bit 5 - External Interrupt 5

pub fn int6(&self) -> INT6_R[src]

Bit 6 - External Interrupt 6

pub fn int7(&self) -> INT7_R[src]

Bit 7 - External Interrupt 7

pub fn int8(&self) -> INT8_R[src]

Bit 8 - External Interrupt 8

pub fn int9(&self) -> INT9_R[src]

Bit 9 - External Interrupt 9

pub fn int10(&self) -> INT10_R[src]

Bit 10 - External Interrupt 10

pub fn int11(&self) -> INT11_R[src]

Bit 11 - External Interrupt 11

pub fn int12(&self) -> INT12_R[src]

Bit 12 - External Interrupt 12

pub fn int13(&self) -> INT13_R[src]

Bit 13 - External Interrupt 13

pub fn int14(&self) -> INT14_R[src]

Bit 14 - External Interrupt 14

pub fn int15(&self) -> INT15_R[src]

Bit 15 - External Interrupt 15

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version bits

impl R<u8, CMD_A>[src]

pub fn variant(&self) -> Variant<u8, CMD_A>[src]

Get enumerated values variant

pub fn is_nop(&self) -> bool[src]

Checks if the value of the field is NOP

pub fn is_wp(&self) -> bool[src]

Checks if the value of the field is WP

pub fn is_ep(&self) -> bool[src]

Checks if the value of the field is EP

pub fn is_cpb(&self) -> bool[src]

Checks if the value of the field is CPB

pub fn is_lp(&self) -> bool[src]

Checks if the value of the field is LP

pub fn is_up(&self) -> bool[src]

Checks if the value of the field is UP

pub fn is_ea(&self) -> bool[src]

Checks if the value of the field is EA

pub fn is_wgpb(&self) -> bool[src]

Checks if the value of the field is WGPB

pub fn is_egpb(&self) -> bool[src]

Checks if the value of the field is EGPB

pub fn is_ssb(&self) -> bool[src]

Checks if the value of the field is SSB

pub fn is_pgpfb(&self) -> bool[src]

Checks if the value of the field is PGPFB

pub fn is_eagpf(&self) -> bool[src]

Checks if the value of the field is EAGPF

pub fn is_qpr(&self) -> bool[src]

Checks if the value of the field is QPR

pub fn is_wup(&self) -> bool[src]

Checks if the value of the field is WUP

pub fn is_eup(&self) -> bool[src]

Checks if the value of the field is EUP

pub fn is_qprup(&self) -> bool[src]

Checks if the value of the field is QPRUP

pub fn is_hsen(&self) -> bool[src]

Checks if the value of the field is HSEN

pub fn is_hsdis(&self) -> bool[src]

Checks if the value of the field is HSDIS

impl R<u8, KEY_A>[src]

pub fn variant(&self) -> Variant<u8, KEY_A>[src]

Get enumerated values variant

pub fn is_key(&self) -> bool[src]

Checks if the value of the field is KEY

impl R<u32, Reg<u32, _FCMD>>[src]

pub fn cmd(&self) -> CMD_R[src]

Bits 0:5 - Command

pub fn pagen(&self) -> PAGEN_R[src]

Bits 8:23 - Page number

pub fn key(&self) -> KEY_R[src]

Bits 24:31 - Write protection key

impl R<bool, FRDY_A>[src]

pub fn variant(&self) -> FRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, LOCKE_A>[src]

pub fn variant(&self) -> LOCKE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, PROGE_A>[src]

pub fn variant(&self) -> PROGE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, FWS_A>[src]

pub fn variant(&self) -> FWS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _FCR>>[src]

pub fn frdy(&self) -> FRDY_R[src]

Bit 0 - Flash Ready Interrupt Enable

pub fn locke(&self) -> LOCKE_R[src]

Bit 2 - Lock Error Interrupt Enable

pub fn proge(&self) -> PROGE_R[src]

Bit 3 - Programming Error Interrupt Enable

pub fn fws(&self) -> FWS_R[src]

Bit 6 - Flash Wait State

pub fn ws1opt(&self) -> WS1OPT_R[src]

Bit 7 - Wait State 1 Optimization

impl R<u32, Reg<u32, _FGPFRHI>>[src]

pub fn gpf32(&self) -> GPF32_R[src]

Bit 0 - General Purpose Fuse 32

pub fn gpf33(&self) -> GPF33_R[src]

Bit 1 - General Purpose Fuse 33

pub fn gpf34(&self) -> GPF34_R[src]

Bit 2 - General Purpose Fuse 34

pub fn gpf35(&self) -> GPF35_R[src]

Bit 3 - General Purpose Fuse 35

pub fn gpf36(&self) -> GPF36_R[src]

Bit 4 - General Purpose Fuse 36

pub fn gpf37(&self) -> GPF37_R[src]

Bit 5 - General Purpose Fuse 37

pub fn gpf38(&self) -> GPF38_R[src]

Bit 6 - General Purpose Fuse 38

pub fn gpf39(&self) -> GPF39_R[src]

Bit 7 - General Purpose Fuse 39

pub fn gpf40(&self) -> GPF40_R[src]

Bit 8 - General Purpose Fuse 40

pub fn gpf41(&self) -> GPF41_R[src]

Bit 9 - General Purpose Fuse 41

pub fn gpf42(&self) -> GPF42_R[src]

Bit 10 - General Purpose Fuse 42

pub fn gpf43(&self) -> GPF43_R[src]

Bit 11 - General Purpose Fuse 43

pub fn gpf44(&self) -> GPF44_R[src]

Bit 12 - General Purpose Fuse 44

pub fn gpf45(&self) -> GPF45_R[src]

Bit 13 - General Purpose Fuse 45

pub fn gpf46(&self) -> GPF46_R[src]

Bit 14 - General Purpose Fuse 46

pub fn gpf47(&self) -> GPF47_R[src]

Bit 15 - General Purpose Fuse 47

pub fn gpf48(&self) -> GPF48_R[src]

Bit 16 - General Purpose Fuse 48

pub fn gpf49(&self) -> GPF49_R[src]

Bit 17 - General Purpose Fuse 49

pub fn gpf50(&self) -> GPF50_R[src]

Bit 18 - General Purpose Fuse 50

pub fn gpf51(&self) -> GPF51_R[src]

Bit 19 - General Purpose Fuse 51

pub fn gpf52(&self) -> GPF52_R[src]

Bit 20 - General Purpose Fuse 52

pub fn gpf53(&self) -> GPF53_R[src]

Bit 21 - General Purpose Fuse 53

pub fn gpf54(&self) -> GPF54_R[src]

Bit 22 - General Purpose Fuse 54

pub fn gpf55(&self) -> GPF55_R[src]

Bit 23 - General Purpose Fuse 55

pub fn gpf56(&self) -> GPF56_R[src]

Bit 24 - General Purpose Fuse 56

pub fn gpf57(&self) -> GPF57_R[src]

Bit 25 - General Purpose Fuse 57

pub fn gpf58(&self) -> GPF58_R[src]

Bit 26 - General Purpose Fuse 58

pub fn gpf59(&self) -> GPF59_R[src]

Bit 27 - General Purpose Fuse 59

pub fn gpf60(&self) -> GPF60_R[src]

Bit 28 - General Purpose Fuse 60

pub fn gpf61(&self) -> GPF61_R[src]

Bit 29 - General Purpose Fuse 61

pub fn gpf62(&self) -> GPF62_R[src]

Bit 30 - General Purpose Fuse 62

pub fn gpf63(&self) -> GPF63_R[src]

Bit 31 - General Purpose Fuse 63

impl R<u32, Reg<u32, _FGPFRLO>>[src]

pub fn lock0(&self) -> LOCK0_R[src]

Bit 0 - Lock Bit 0

pub fn lock1(&self) -> LOCK1_R[src]

Bit 1 - Lock Bit 1

pub fn lock2(&self) -> LOCK2_R[src]

Bit 2 - Lock Bit 2

pub fn lock3(&self) -> LOCK3_R[src]

Bit 3 - Lock Bit 3

pub fn lock4(&self) -> LOCK4_R[src]

Bit 4 - Lock Bit 4

pub fn lock5(&self) -> LOCK5_R[src]

Bit 5 - Lock Bit 5

pub fn lock6(&self) -> LOCK6_R[src]

Bit 6 - Lock Bit 6

pub fn lock7(&self) -> LOCK7_R[src]

Bit 7 - Lock Bit 7

pub fn lock8(&self) -> LOCK8_R[src]

Bit 8 - Lock Bit 8

pub fn lock9(&self) -> LOCK9_R[src]

Bit 9 - Lock Bit 9

pub fn lock10(&self) -> LOCK10_R[src]

Bit 10 - Lock Bit 10

pub fn lock11(&self) -> LOCK11_R[src]

Bit 11 - Lock Bit 11

pub fn lock12(&self) -> LOCK12_R[src]

Bit 12 - Lock Bit 12

pub fn lock13(&self) -> LOCK13_R[src]

Bit 13 - Lock Bit 13

pub fn lock14(&self) -> LOCK14_R[src]

Bit 14 - Lock Bit 14

pub fn lock15(&self) -> LOCK15_R[src]

Bit 15 - Lock Bit 15

pub fn gpf16(&self) -> GPF16_R[src]

Bit 16 - General Purpose Fuse 16

pub fn gpf17(&self) -> GPF17_R[src]

Bit 17 - General Purpose Fuse 17

pub fn gpf18(&self) -> GPF18_R[src]

Bit 18 - General Purpose Fuse 18

pub fn gpf19(&self) -> GPF19_R[src]

Bit 19 - General Purpose Fuse 19

pub fn gpf20(&self) -> GPF20_R[src]

Bit 20 - General Purpose Fuse 20

pub fn gpf21(&self) -> GPF21_R[src]

Bit 21 - General Purpose Fuse 21

pub fn gpf22(&self) -> GPF22_R[src]

Bit 22 - General Purpose Fuse 22

pub fn gpf23(&self) -> GPF23_R[src]

Bit 23 - General Purpose Fuse 23

pub fn gpf24(&self) -> GPF24_R[src]

Bit 24 - General Purpose Fuse 24

pub fn gpf25(&self) -> GPF25_R[src]

Bit 25 - General Purpose Fuse 25

pub fn gpf26(&self) -> GPF26_R[src]

Bit 26 - General Purpose Fuse 26

pub fn gpf27(&self) -> GPF27_R[src]

Bit 27 - General Purpose Fuse 27

pub fn gpf28(&self) -> GPF28_R[src]

Bit 28 - General Purpose Fuse 28

pub fn gpf29(&self) -> GPF29_R[src]

Bit 29 - General Purpose Fuse 29

pub fn gpf30(&self) -> GPF30_R[src]

Bit 30 - General Purpose Fuse 30

pub fn gpf31(&self) -> GPF31_R[src]

Bit 31 - General Purpose Fuse 31

impl R<u32, Reg<u32, _FPR>>[src]

pub fn fsz(&self) -> FSZ_R[src]

Bits 0:3 - Flash Size

pub fn psz(&self) -> PSZ_R[src]

Bits 8:10 - Page Size

impl R<u8, ECCERR_A>[src]

pub fn variant(&self) -> Variant<u8, ECCERR_A>[src]

Get enumerated values variant

pub fn is_noerror(&self) -> bool[src]

Checks if the value of the field is NOERROR

pub fn is_oneeccerr(&self) -> bool[src]

Checks if the value of the field is ONEECCERR

pub fn is_twoeccerr(&self) -> bool[src]

Checks if the value of the field is TWOECCERR

impl R<u32, Reg<u32, _FSR>>[src]

pub fn frdy(&self) -> FRDY_R[src]

Bit 0 - Flash Ready Status

pub fn locke(&self) -> LOCKE_R[src]

Bit 2 - Lock Error Status

pub fn proge(&self) -> PROGE_R[src]

Bit 3 - Programming Error Status

pub fn security(&self) -> SECURITY_R[src]

Bit 4 - Security Bit Status

pub fn qprr(&self) -> QPRR_R[src]

Bit 5 - Quick Page Read Result

pub fn hsmode(&self) -> HSMODE_R[src]

Bit 6 - High Speed Mode

pub fn eccerr(&self) -> ECCERR_R[src]

Bits 8:9 - ECC Error Status

pub fn lock0(&self) -> LOCK0_R[src]

Bit 16 - Lock Region 0 Lock Status

pub fn lock1(&self) -> LOCK1_R[src]

Bit 17 - Lock Region 1 Lock Status

pub fn lock2(&self) -> LOCK2_R[src]

Bit 18 - Lock Region 2 Lock Status

pub fn lock3(&self) -> LOCK3_R[src]

Bit 19 - Lock Region 3 Lock Status

pub fn lock4(&self) -> LOCK4_R[src]

Bit 20 - Lock Region 4 Lock Status

pub fn lock5(&self) -> LOCK5_R[src]

Bit 21 - Lock Region 5 Lock Status

pub fn lock6(&self) -> LOCK6_R[src]

Bit 22 - Lock Region 6 Lock Status

pub fn lock7(&self) -> LOCK7_R[src]

Bit 23 - Lock Region 7 Lock Status

pub fn lock8(&self) -> LOCK8_R[src]

Bit 24 - Lock Region 8 Lock Status

pub fn lock9(&self) -> LOCK9_R[src]

Bit 25 - Lock Region 9 Lock Status

pub fn lock10(&self) -> LOCK10_R[src]

Bit 26 - Lock Region 10 Lock Status

pub fn lock11(&self) -> LOCK11_R[src]

Bit 27 - Lock Region 11 Lock Status

pub fn lock12(&self) -> LOCK12_R[src]

Bit 28 - Lock Region 12 Lock Status

pub fn lock13(&self) -> LOCK13_R[src]

Bit 29 - Lock Region 13 Lock Status

pub fn lock14(&self) -> LOCK14_R[src]

Bit 30 - Lock Region 14 Lock Status

pub fn lock15(&self) -> LOCK15_R[src]

Bit 31 - Lock Region 15 Lock Status

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u32, Reg<u32, _IMR>>[src]

pub fn done(&self) -> DONE_R[src]

Bit 0 - Frequency measurment done

pub fn rclkrdy(&self) -> RCLKRDY_R[src]

Bit 1 - Reference Clock ready

impl R<u32, Reg<u32, _ISR>>[src]

pub fn done(&self) -> DONE_R[src]

Bit 0 - Frequency measurment done

pub fn rclkrdy(&self) -> RCLKRDY_R[src]

Bit 1 - Reference Clock ready

impl R<u32, Reg<u32, _MODE>>[src]

pub fn refsel(&self) -> REFSEL_R[src]

Bits 0:1 - Reference Clock Selection

pub fn refnum(&self) -> REFNUM_R[src]

Bits 8:15 - Number of Reference CLock Cycles

pub fn clksel(&self) -> CLKSEL_R[src]

Bits 16:20 - Clock Source Selection

pub fn refcen(&self) -> REFCEN_R[src]

Bit 31 - Reference Clock Enable

impl R<u32, Reg<u32, _STATUS>>[src]

pub fn busy(&self) -> BUSY_R[src]

Bit 0 - Frequency measurement on-going

pub fn rclkbusy(&self) -> RCLKBUSY_R[src]

Bit 1 - Reference Clock busy

impl R<u32, Reg<u32, _VALUE>>[src]

pub fn value(&self) -> VALUE_R[src]

Bits 0:23 - Measured frequency

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<u32, Reg<u32, _CR>>[src]

pub fn aen(&self) -> AEN_R[src]

Bits 0:3 - Input mask

pub fn filten(&self) -> FILTEN_R[src]

Bit 31 - Filter enable

impl R<u32, Reg<u32, _PARAMETER>>[src]

pub fn luts(&self) -> LUTS_R[src]

Bits 0:7 - LUTs

impl R<u32, Reg<u32, _TRUTH>>[src]

pub fn truth(&self) -> TRUTH_R[src]

Bits 0:15 - Truth

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant

impl R<u32, Reg<u32, _ASR>>[src]

pub fn ar(&self) -> AR_R[src]

Bit 0 - Access Error

impl R<u32, Reg<u32, _EVER>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Event Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Event Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Event Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Event Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Event Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Event Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Event Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Event Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Event Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Event Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Event Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Event Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Event Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Event Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Event Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Event Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Event Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Event Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Event Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Event Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Event Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Event Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Event Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Event Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Event Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Event Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Event Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Event Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Event Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Event Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Event Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Event Enable

impl R<u32, Reg<u32, _GFER>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Glitch Filter Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Glitch Filter Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Glitch Filter Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Glitch Filter Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Glitch Filter Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Glitch Filter Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Glitch Filter Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Glitch Filter Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Glitch Filter Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Glitch Filter Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Glitch Filter Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Glitch Filter Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Glitch Filter Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Glitch Filter Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Glitch Filter Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Glitch Filter Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Glitch Filter Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Glitch Filter Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Glitch Filter Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Glitch Filter Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Glitch Filter Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Glitch Filter Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Glitch Filter Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Glitch Filter Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Glitch Filter Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Glitch Filter Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Glitch Filter Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Glitch Filter Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Glitch Filter Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Glitch Filter Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Glitch Filter Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Glitch Filter Enable

impl R<u32, Reg<u32, _GPER>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - GPIO Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - GPIO Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - GPIO Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - GPIO Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - GPIO Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - GPIO Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - GPIO Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - GPIO Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - GPIO Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - GPIO Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - GPIO Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - GPIO Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - GPIO Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - GPIO Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - GPIO Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - GPIO Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - GPIO Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - GPIO Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - GPIO Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - GPIO Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - GPIO Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - GPIO Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - GPIO Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - GPIO Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - GPIO Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - GPIO Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - GPIO Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - GPIO Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - GPIO Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - GPIO Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - GPIO Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - GPIO Enable

impl R<u32, Reg<u32, _IER>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Interrupt Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Interrupt Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Interrupt Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Interrupt Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Interrupt Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Interrupt Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Interrupt Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Interrupt Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Interrupt Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Interrupt Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Interrupt Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Interrupt Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Interrupt Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Interrupt Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Interrupt Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Interrupt Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Interrupt Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Interrupt Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Interrupt Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Interrupt Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Interrupt Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Interrupt Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Interrupt Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Interrupt Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Interrupt Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Interrupt Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Interrupt Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Interrupt Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Interrupt Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Interrupt Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Interrupt Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Interrupt Enable

impl R<u32, Reg<u32, _IFR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Interrupt Flag

pub fn p1(&self) -> P1_R[src]

Bit 1 - Interrupt Flag

pub fn p2(&self) -> P2_R[src]

Bit 2 - Interrupt Flag

pub fn p3(&self) -> P3_R[src]

Bit 3 - Interrupt Flag

pub fn p4(&self) -> P4_R[src]

Bit 4 - Interrupt Flag

pub fn p5(&self) -> P5_R[src]

Bit 5 - Interrupt Flag

pub fn p6(&self) -> P6_R[src]

Bit 6 - Interrupt Flag

pub fn p7(&self) -> P7_R[src]

Bit 7 - Interrupt Flag

pub fn p8(&self) -> P8_R[src]

Bit 8 - Interrupt Flag

pub fn p9(&self) -> P9_R[src]

Bit 9 - Interrupt Flag

pub fn p10(&self) -> P10_R[src]

Bit 10 - Interrupt Flag

pub fn p11(&self) -> P11_R[src]

Bit 11 - Interrupt Flag

pub fn p12(&self) -> P12_R[src]

Bit 12 - Interrupt Flag

pub fn p13(&self) -> P13_R[src]

Bit 13 - Interrupt Flag

pub fn p14(&self) -> P14_R[src]

Bit 14 - Interrupt Flag

pub fn p15(&self) -> P15_R[src]

Bit 15 - Interrupt Flag

pub fn p16(&self) -> P16_R[src]

Bit 16 - Interrupt Flag

pub fn p17(&self) -> P17_R[src]

Bit 17 - Interrupt Flag

pub fn p18(&self) -> P18_R[src]

Bit 18 - Interrupt Flag

pub fn p19(&self) -> P19_R[src]

Bit 19 - Interrupt Flag

pub fn p20(&self) -> P20_R[src]

Bit 20 - Interrupt Flag

pub fn p21(&self) -> P21_R[src]

Bit 21 - Interrupt Flag

pub fn p22(&self) -> P22_R[src]

Bit 22 - Interrupt Flag

pub fn p23(&self) -> P23_R[src]

Bit 23 - Interrupt Flag

pub fn p24(&self) -> P24_R[src]

Bit 24 - Interrupt Flag

pub fn p25(&self) -> P25_R[src]

Bit 25 - Interrupt Flag

pub fn p26(&self) -> P26_R[src]

Bit 26 - Interrupt Flag

pub fn p27(&self) -> P27_R[src]

Bit 27 - Interrupt Flag

pub fn p28(&self) -> P28_R[src]

Bit 28 - Interrupt Flag

pub fn p29(&self) -> P29_R[src]

Bit 29 - Interrupt Flag

pub fn p30(&self) -> P30_R[src]

Bit 30 - Interrupt Flag

pub fn p31(&self) -> P31_R[src]

Bit 31 - Interrupt Flag

impl R<u32, Reg<u32, _IMR0>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Interrupt Mode Bit 0

pub fn p1(&self) -> P1_R[src]

Bit 1 - Interrupt Mode Bit 0

pub fn p2(&self) -> P2_R[src]

Bit 2 - Interrupt Mode Bit 0

pub fn p3(&self) -> P3_R[src]

Bit 3 - Interrupt Mode Bit 0

pub fn p4(&self) -> P4_R[src]

Bit 4 - Interrupt Mode Bit 0

pub fn p5(&self) -> P5_R[src]

Bit 5 - Interrupt Mode Bit 0

pub fn p6(&self) -> P6_R[src]

Bit 6 - Interrupt Mode Bit 0

pub fn p7(&self) -> P7_R[src]

Bit 7 - Interrupt Mode Bit 0

pub fn p8(&self) -> P8_R[src]

Bit 8 - Interrupt Mode Bit 0

pub fn p9(&self) -> P9_R[src]

Bit 9 - Interrupt Mode Bit 0

pub fn p10(&self) -> P10_R[src]

Bit 10 - Interrupt Mode Bit 0

pub fn p11(&self) -> P11_R[src]

Bit 11 - Interrupt Mode Bit 0

pub fn p12(&self) -> P12_R[src]

Bit 12 - Interrupt Mode Bit 0

pub fn p13(&self) -> P13_R[src]

Bit 13 - Interrupt Mode Bit 0

pub fn p14(&self) -> P14_R[src]

Bit 14 - Interrupt Mode Bit 0

pub fn p15(&self) -> P15_R[src]

Bit 15 - Interrupt Mode Bit 0

pub fn p16(&self) -> P16_R[src]

Bit 16 - Interrupt Mode Bit 0

pub fn p17(&self) -> P17_R[src]

Bit 17 - Interrupt Mode Bit 0

pub fn p18(&self) -> P18_R[src]

Bit 18 - Interrupt Mode Bit 0

pub fn p19(&self) -> P19_R[src]

Bit 19 - Interrupt Mode Bit 0

pub fn p20(&self) -> P20_R[src]

Bit 20 - Interrupt Mode Bit 0

pub fn p21(&self) -> P21_R[src]

Bit 21 - Interrupt Mode Bit 0

pub fn p22(&self) -> P22_R[src]

Bit 22 - Interrupt Mode Bit 0

pub fn p23(&self) -> P23_R[src]

Bit 23 - Interrupt Mode Bit 0

pub fn p24(&self) -> P24_R[src]

Bit 24 - Interrupt Mode Bit 0

pub fn p25(&self) -> P25_R[src]

Bit 25 - Interrupt Mode Bit 0

pub fn p26(&self) -> P26_R[src]

Bit 26 - Interrupt Mode Bit 0

pub fn p27(&self) -> P27_R[src]

Bit 27 - Interrupt Mode Bit 0

pub fn p28(&self) -> P28_R[src]

Bit 28 - Interrupt Mode Bit 0

pub fn p29(&self) -> P29_R[src]

Bit 29 - Interrupt Mode Bit 0

pub fn p30(&self) -> P30_R[src]

Bit 30 - Interrupt Mode Bit 0

pub fn p31(&self) -> P31_R[src]

Bit 31 - Interrupt Mode Bit 0

impl R<u32, Reg<u32, _IMR1>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Interrupt Mode Bit 1

pub fn p1(&self) -> P1_R[src]

Bit 1 - Interrupt Mode Bit 1

pub fn p2(&self) -> P2_R[src]

Bit 2 - Interrupt Mode Bit 1

pub fn p3(&self) -> P3_R[src]

Bit 3 - Interrupt Mode Bit 1

pub fn p4(&self) -> P4_R[src]

Bit 4 - Interrupt Mode Bit 1

pub fn p5(&self) -> P5_R[src]

Bit 5 - Interrupt Mode Bit 1

pub fn p6(&self) -> P6_R[src]

Bit 6 - Interrupt Mode Bit 1

pub fn p7(&self) -> P7_R[src]

Bit 7 - Interrupt Mode Bit 1

pub fn p8(&self) -> P8_R[src]

Bit 8 - Interrupt Mode Bit 1

pub fn p9(&self) -> P9_R[src]

Bit 9 - Interrupt Mode Bit 1

pub fn p10(&self) -> P10_R[src]

Bit 10 - Interrupt Mode Bit 1

pub fn p11(&self) -> P11_R[src]

Bit 11 - Interrupt Mode Bit 1

pub fn p12(&self) -> P12_R[src]

Bit 12 - Interrupt Mode Bit 1

pub fn p13(&self) -> P13_R[src]

Bit 13 - Interrupt Mode Bit 1

pub fn p14(&self) -> P14_R[src]

Bit 14 - Interrupt Mode Bit 1

pub fn p15(&self) -> P15_R[src]

Bit 15 - Interrupt Mode Bit 1

pub fn p16(&self) -> P16_R[src]

Bit 16 - Interrupt Mode Bit 1

pub fn p17(&self) -> P17_R[src]

Bit 17 - Interrupt Mode Bit 1

pub fn p18(&self) -> P18_R[src]

Bit 18 - Interrupt Mode Bit 1

pub fn p19(&self) -> P19_R[src]

Bit 19 - Interrupt Mode Bit 1

pub fn p20(&self) -> P20_R[src]

Bit 20 - Interrupt Mode Bit 1

pub fn p21(&self) -> P21_R[src]

Bit 21 - Interrupt Mode Bit 1

pub fn p22(&self) -> P22_R[src]

Bit 22 - Interrupt Mode Bit 1

pub fn p23(&self) -> P23_R[src]

Bit 23 - Interrupt Mode Bit 1

pub fn p24(&self) -> P24_R[src]

Bit 24 - Interrupt Mode Bit 1

pub fn p25(&self) -> P25_R[src]

Bit 25 - Interrupt Mode Bit 1

pub fn p26(&self) -> P26_R[src]

Bit 26 - Interrupt Mode Bit 1

pub fn p27(&self) -> P27_R[src]

Bit 27 - Interrupt Mode Bit 1

pub fn p28(&self) -> P28_R[src]

Bit 28 - Interrupt Mode Bit 1

pub fn p29(&self) -> P29_R[src]

Bit 29 - Interrupt Mode Bit 1

pub fn p30(&self) -> P30_R[src]

Bit 30 - Interrupt Mode Bit 1

pub fn p31(&self) -> P31_R[src]

Bit 31 - Interrupt Mode Bit 1

impl R<u32, Reg<u32, _LOCK>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Lock State

pub fn p1(&self) -> P1_R[src]

Bit 1 - Lock State

pub fn p2(&self) -> P2_R[src]

Bit 2 - Lock State

pub fn p3(&self) -> P3_R[src]

Bit 3 - Lock State

pub fn p4(&self) -> P4_R[src]

Bit 4 - Lock State

pub fn p5(&self) -> P5_R[src]

Bit 5 - Lock State

pub fn p6(&self) -> P6_R[src]

Bit 6 - Lock State

pub fn p7(&self) -> P7_R[src]

Bit 7 - Lock State

pub fn p8(&self) -> P8_R[src]

Bit 8 - Lock State

pub fn p9(&self) -> P9_R[src]

Bit 9 - Lock State

pub fn p10(&self) -> P10_R[src]

Bit 10 - Lock State

pub fn p11(&self) -> P11_R[src]

Bit 11 - Lock State

pub fn p12(&self) -> P12_R[src]

Bit 12 - Lock State

pub fn p13(&self) -> P13_R[src]

Bit 13 - Lock State

pub fn p14(&self) -> P14_R[src]

Bit 14 - Lock State

pub fn p15(&self) -> P15_R[src]

Bit 15 - Lock State

pub fn p16(&self) -> P16_R[src]

Bit 16 - Lock State

pub fn p17(&self) -> P17_R[src]

Bit 17 - Lock State

pub fn p18(&self) -> P18_R[src]

Bit 18 - Lock State

pub fn p19(&self) -> P19_R[src]

Bit 19 - Lock State

pub fn p20(&self) -> P20_R[src]

Bit 20 - Lock State

pub fn p21(&self) -> P21_R[src]

Bit 21 - Lock State

pub fn p22(&self) -> P22_R[src]

Bit 22 - Lock State

pub fn p23(&self) -> P23_R[src]

Bit 23 - Lock State

pub fn p24(&self) -> P24_R[src]

Bit 24 - Lock State

pub fn p25(&self) -> P25_R[src]

Bit 25 - Lock State

pub fn p26(&self) -> P26_R[src]

Bit 26 - Lock State

pub fn p27(&self) -> P27_R[src]

Bit 27 - Lock State

pub fn p28(&self) -> P28_R[src]

Bit 28 - Lock State

pub fn p29(&self) -> P29_R[src]

Bit 29 - Lock State

pub fn p30(&self) -> P30_R[src]

Bit 30 - Lock State

pub fn p31(&self) -> P31_R[src]

Bit 31 - Lock State

impl R<u32, Reg<u32, _ODCR0C>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Driving Capability Register Bit 0

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Driving Capability Register Bit 0

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Driving Capability Register Bit 0

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Driving Capability Register Bit 0

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Driving Capability Register Bit 0

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Driving Capability Register Bit 0

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Driving Capability Register Bit 0

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Driving Capability Register Bit 0

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Driving Capability Register Bit 0

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Driving Capability Register Bit 0

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Driving Capability Register Bit 0

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Driving Capability Register Bit 0

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Driving Capability Register Bit 0

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Driving Capability Register Bit 0

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Driving Capability Register Bit 0

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Driving Capability Register Bit 0

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Driving Capability Register Bit 0

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Driving Capability Register Bit 0

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Driving Capability Register Bit 0

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Driving Capability Register Bit 0

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Driving Capability Register Bit 0

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Driving Capability Register Bit 0

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Driving Capability Register Bit 0

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Driving Capability Register Bit 0

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Driving Capability Register Bit 0

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Driving Capability Register Bit 0

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Driving Capability Register Bit 0

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Driving Capability Register Bit 0

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Driving Capability Register Bit 0

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Driving Capability Register Bit 0

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Driving Capability Register Bit 0

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Driving Capability Register Bit 0

impl R<u32, Reg<u32, _ODCR0S>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Driving Capability Register Bit 0

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Driving Capability Register Bit 0

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Driving Capability Register Bit 0

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Driving Capability Register Bit 0

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Driving Capability Register Bit 0

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Driving Capability Register Bit 0

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Driving Capability Register Bit 0

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Driving Capability Register Bit 0

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Driving Capability Register Bit 0

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Driving Capability Register Bit 0

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Driving Capability Register Bit 0

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Driving Capability Register Bit 0

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Driving Capability Register Bit 0

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Driving Capability Register Bit 0

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Driving Capability Register Bit 0

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Driving Capability Register Bit 0

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Driving Capability Register Bit 0

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Driving Capability Register Bit 0

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Driving Capability Register Bit 0

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Driving Capability Register Bit 0

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Driving Capability Register Bit 0

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Driving Capability Register Bit 0

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Driving Capability Register Bit 0

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Driving Capability Register Bit 0

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Driving Capability Register Bit 0

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Driving Capability Register Bit 0

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Driving Capability Register Bit 0

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Driving Capability Register Bit 0

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Driving Capability Register Bit 0

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Driving Capability Register Bit 0

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Driving Capability Register Bit 0

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Driving Capability Register Bit 0

impl R<u32, Reg<u32, _ODCR0T>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Driving Capability Register Bit 0

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Driving Capability Register Bit 0

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Driving Capability Register Bit 0

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Driving Capability Register Bit 0

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Driving Capability Register Bit 0

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Driving Capability Register Bit 0

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Driving Capability Register Bit 0

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Driving Capability Register Bit 0

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Driving Capability Register Bit 0

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Driving Capability Register Bit 0

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Driving Capability Register Bit 0

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Driving Capability Register Bit 0

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Driving Capability Register Bit 0

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Driving Capability Register Bit 0

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Driving Capability Register Bit 0

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Driving Capability Register Bit 0

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Driving Capability Register Bit 0

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Driving Capability Register Bit 0

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Driving Capability Register Bit 0

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Driving Capability Register Bit 0

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Driving Capability Register Bit 0

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Driving Capability Register Bit 0

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Driving Capability Register Bit 0

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Driving Capability Register Bit 0

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Driving Capability Register Bit 0

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Driving Capability Register Bit 0

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Driving Capability Register Bit 0

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Driving Capability Register Bit 0

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Driving Capability Register Bit 0

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Driving Capability Register Bit 0

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Driving Capability Register Bit 0

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Driving Capability Register Bit 0

impl R<u32, Reg<u32, _ODCR1C>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Driving Capability Register Bit 1

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Driving Capability Register Bit 1

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Driving Capability Register Bit 1

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Driving Capability Register Bit 1

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Driving Capability Register Bit 1

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Driving Capability Register Bit 1

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Driving Capability Register Bit 1

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Driving Capability Register Bit 1

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Driving Capability Register Bit 1

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Driving Capability Register Bit 1

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Driving Capability Register Bit 1

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Driving Capability Register Bit 1

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Driving Capability Register Bit 1

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Driving Capability Register Bit 1

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Driving Capability Register Bit 1

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Driving Capability Register Bit 1

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Driving Capability Register Bit 1

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Driving Capability Register Bit 1

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Driving Capability Register Bit 1

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Driving Capability Register Bit 1

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Driving Capability Register Bit 1

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Driving Capability Register Bit 1

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Driving Capability Register Bit 1

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Driving Capability Register Bit 1

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Driving Capability Register Bit 1

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Driving Capability Register Bit 1

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Driving Capability Register Bit 1

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Driving Capability Register Bit 1

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Driving Capability Register Bit 1

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Driving Capability Register Bit 1

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Driving Capability Register Bit 1

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Driving Capability Register Bit 1

impl R<u32, Reg<u32, _ODCR1S>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Driving Capability Register Bit 1

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Driving Capability Register Bit 1

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Driving Capability Register Bit 1

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Driving Capability Register Bit 1

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Driving Capability Register Bit 1

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Driving Capability Register Bit 1

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Driving Capability Register Bit 1

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Driving Capability Register Bit 1

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Driving Capability Register Bit 1

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Driving Capability Register Bit 1

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Driving Capability Register Bit 1

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Driving Capability Register Bit 1

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Driving Capability Register Bit 1

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Driving Capability Register Bit 1

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Driving Capability Register Bit 1

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Driving Capability Register Bit 1

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Driving Capability Register Bit 1

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Driving Capability Register Bit 1

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Driving Capability Register Bit 1

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Driving Capability Register Bit 1

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Driving Capability Register Bit 1

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Driving Capability Register Bit 1

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Driving Capability Register Bit 1

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Driving Capability Register Bit 1

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Driving Capability Register Bit 1

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Driving Capability Register Bit 1

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Driving Capability Register Bit 1

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Driving Capability Register Bit 1

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Driving Capability Register Bit 1

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Driving Capability Register Bit 1

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Driving Capability Register Bit 1

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Driving Capability Register Bit 1

impl R<u32, Reg<u32, _ODCR1T>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Driving Capability Register Bit 1

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Driving Capability Register Bit 1

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Driving Capability Register Bit 1

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Driving Capability Register Bit 1

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Driving Capability Register Bit 1

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Driving Capability Register Bit 1

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Driving Capability Register Bit 1

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Driving Capability Register Bit 1

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Driving Capability Register Bit 1

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Driving Capability Register Bit 1

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Driving Capability Register Bit 1

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Driving Capability Register Bit 1

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Driving Capability Register Bit 1

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Driving Capability Register Bit 1

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Driving Capability Register Bit 1

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Driving Capability Register Bit 1

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Driving Capability Register Bit 1

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Driving Capability Register Bit 1

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Driving Capability Register Bit 1

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Driving Capability Register Bit 1

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Driving Capability Register Bit 1

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Driving Capability Register Bit 1

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Driving Capability Register Bit 1

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Driving Capability Register Bit 1

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Driving Capability Register Bit 1

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Driving Capability Register Bit 1

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Driving Capability Register Bit 1

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Driving Capability Register Bit 1

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Driving Capability Register Bit 1

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Driving Capability Register Bit 1

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Driving Capability Register Bit 1

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Driving Capability Register Bit 1

impl R<u32, Reg<u32, _ODCR0>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Driving Capability Register Bit 0

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Driving Capability Register Bit 0

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Driving Capability Register Bit 0

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Driving Capability Register Bit 0

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Driving Capability Register Bit 0

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Driving Capability Register Bit 0

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Driving Capability Register Bit 0

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Driving Capability Register Bit 0

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Driving Capability Register Bit 0

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Driving Capability Register Bit 0

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Driving Capability Register Bit 0

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Driving Capability Register Bit 0

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Driving Capability Register Bit 0

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Driving Capability Register Bit 0

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Driving Capability Register Bit 0

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Driving Capability Register Bit 0

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Driving Capability Register Bit 0

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Driving Capability Register Bit 0

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Driving Capability Register Bit 0

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Driving Capability Register Bit 0

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Driving Capability Register Bit 0

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Driving Capability Register Bit 0

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Driving Capability Register Bit 0

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Driving Capability Register Bit 0

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Driving Capability Register Bit 0

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Driving Capability Register Bit 0

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Driving Capability Register Bit 0

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Driving Capability Register Bit 0

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Driving Capability Register Bit 0

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Driving Capability Register Bit 0

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Driving Capability Register Bit 0

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Driving Capability Register Bit 0

impl R<u32, Reg<u32, _ODCR1>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Driving Capability Register Bit 1

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Driving Capability Register Bit 1

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Driving Capability Register Bit 1

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Driving Capability Register Bit 1

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Driving Capability Register Bit 1

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Driving Capability Register Bit 1

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Driving Capability Register Bit 1

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Driving Capability Register Bit 1

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Driving Capability Register Bit 1

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Driving Capability Register Bit 1

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Driving Capability Register Bit 1

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Driving Capability Register Bit 1

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Driving Capability Register Bit 1

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Driving Capability Register Bit 1

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Driving Capability Register Bit 1

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Driving Capability Register Bit 1

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Driving Capability Register Bit 1

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Driving Capability Register Bit 1

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Driving Capability Register Bit 1

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Driving Capability Register Bit 1

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Driving Capability Register Bit 1

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Driving Capability Register Bit 1

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Driving Capability Register Bit 1

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Driving Capability Register Bit 1

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Driving Capability Register Bit 1

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Driving Capability Register Bit 1

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Driving Capability Register Bit 1

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Driving Capability Register Bit 1

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Driving Capability Register Bit 1

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Driving Capability Register Bit 1

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Driving Capability Register Bit 1

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Driving Capability Register Bit 1

impl R<u32, Reg<u32, _ODER>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Driver Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Driver Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Driver Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Driver Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Driver Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Driver Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Driver Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Driver Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Driver Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Driver Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Driver Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Driver Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Driver Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Driver Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Driver Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Driver Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Driver Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Driver Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Driver Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Driver Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Driver Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Driver Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Driver Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Driver Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Driver Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Driver Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Driver Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Driver Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Driver Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Driver Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Driver Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Driver Enable

impl R<u32, Reg<u32, _ODMER>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Open Drain Mode Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Open Drain Mode Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Open Drain Mode Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Open Drain Mode Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Open Drain Mode Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Open Drain Mode Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Open Drain Mode Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Open Drain Mode Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Open Drain Mode Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Open Drain Mode Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Open Drain Mode Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Open Drain Mode Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Open Drain Mode Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Open Drain Mode Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Open Drain Mode Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Open Drain Mode Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Open Drain Mode Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Open Drain Mode Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Open Drain Mode Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Open Drain Mode Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Open Drain Mode Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Open Drain Mode Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Open Drain Mode Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Open Drain Mode Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Open Drain Mode Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Open Drain Mode Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Open Drain Mode Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Open Drain Mode Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Open Drain Mode Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Open Drain Mode Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Open Drain Mode Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Open Drain Mode Enable

impl R<u32, Reg<u32, _OSRR0C>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Slew Rate Control Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Slew Rate Control Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Slew Rate Control Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Slew Rate Control Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Slew Rate Control Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Slew Rate Control Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Slew Rate Control Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Slew Rate Control Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Slew Rate Control Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Slew Rate Control Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Slew Rate Control Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Slew Rate Control Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Slew Rate Control Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Slew Rate Control Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Slew Rate Control Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Slew Rate Control Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Slew Rate Control Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Slew Rate Control Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Slew Rate Control Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Slew Rate Control Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Slew Rate Control Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Slew Rate Control Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Slew Rate Control Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Slew Rate Control Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Slew Rate Control Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Slew Rate Control Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Slew Rate Control Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Slew Rate Control Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Slew Rate Control Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Slew Rate Control Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Slew Rate Control Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Slew Rate Control Enable

impl R<u32, Reg<u32, _OSRR0S>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Slew Rate Control Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Slew Rate Control Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Slew Rate Control Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Slew Rate Control Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Slew Rate Control Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Slew Rate Control Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Slew Rate Control Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Slew Rate Control Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Slew Rate Control Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Slew Rate Control Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Slew Rate Control Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Slew Rate Control Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Slew Rate Control Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Slew Rate Control Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Slew Rate Control Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Slew Rate Control Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Slew Rate Control Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Slew Rate Control Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Slew Rate Control Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Slew Rate Control Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Slew Rate Control Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Slew Rate Control Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Slew Rate Control Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Slew Rate Control Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Slew Rate Control Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Slew Rate Control Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Slew Rate Control Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Slew Rate Control Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Slew Rate Control Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Slew Rate Control Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Slew Rate Control Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Slew Rate Control Enable

impl R<u32, Reg<u32, _OSRR0T>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Slew Rate Control Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Slew Rate Control Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Slew Rate Control Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Slew Rate Control Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Slew Rate Control Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Slew Rate Control Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Slew Rate Control Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Slew Rate Control Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Slew Rate Control Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Slew Rate Control Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Slew Rate Control Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Slew Rate Control Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Slew Rate Control Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Slew Rate Control Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Slew Rate Control Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Slew Rate Control Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Slew Rate Control Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Slew Rate Control Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Slew Rate Control Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Slew Rate Control Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Slew Rate Control Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Slew Rate Control Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Slew Rate Control Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Slew Rate Control Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Slew Rate Control Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Slew Rate Control Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Slew Rate Control Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Slew Rate Control Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Slew Rate Control Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Slew Rate Control Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Slew Rate Control Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Slew Rate Control Enable

impl R<u32, Reg<u32, _OSRR0>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Slew Rate Control Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Slew Rate Control Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Slew Rate Control Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Slew Rate Control Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Slew Rate Control Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Slew Rate Control Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Slew Rate Control Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Slew Rate Control Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Slew Rate Control Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Slew Rate Control Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Slew Rate Control Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Slew Rate Control Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Slew Rate Control Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Slew Rate Control Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Slew Rate Control Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Slew Rate Control Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Slew Rate Control Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Slew Rate Control Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Slew Rate Control Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Slew Rate Control Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Slew Rate Control Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Slew Rate Control Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Slew Rate Control Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Slew Rate Control Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Slew Rate Control Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Slew Rate Control Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Slew Rate Control Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Slew Rate Control Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Slew Rate Control Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Slew Rate Control Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Slew Rate Control Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Slew Rate Control Enable

impl R<u32, Reg<u32, _OVR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Output Value

pub fn p1(&self) -> P1_R[src]

Bit 1 - Output Value

pub fn p2(&self) -> P2_R[src]

Bit 2 - Output Value

pub fn p3(&self) -> P3_R[src]

Bit 3 - Output Value

pub fn p4(&self) -> P4_R[src]

Bit 4 - Output Value

pub fn p5(&self) -> P5_R[src]

Bit 5 - Output Value

pub fn p6(&self) -> P6_R[src]

Bit 6 - Output Value

pub fn p7(&self) -> P7_R[src]

Bit 7 - Output Value

pub fn p8(&self) -> P8_R[src]

Bit 8 - Output Value

pub fn p9(&self) -> P9_R[src]

Bit 9 - Output Value

pub fn p10(&self) -> P10_R[src]

Bit 10 - Output Value

pub fn p11(&self) -> P11_R[src]

Bit 11 - Output Value

pub fn p12(&self) -> P12_R[src]

Bit 12 - Output Value

pub fn p13(&self) -> P13_R[src]

Bit 13 - Output Value

pub fn p14(&self) -> P14_R[src]

Bit 14 - Output Value

pub fn p15(&self) -> P15_R[src]

Bit 15 - Output Value

pub fn p16(&self) -> P16_R[src]

Bit 16 - Output Value

pub fn p17(&self) -> P17_R[src]

Bit 17 - Output Value

pub fn p18(&self) -> P18_R[src]

Bit 18 - Output Value

pub fn p19(&self) -> P19_R[src]

Bit 19 - Output Value

pub fn p20(&self) -> P20_R[src]

Bit 20 - Output Value

pub fn p21(&self) -> P21_R[src]

Bit 21 - Output Value

pub fn p22(&self) -> P22_R[src]

Bit 22 - Output Value

pub fn p23(&self) -> P23_R[src]

Bit 23 - Output Value

pub fn p24(&self) -> P24_R[src]

Bit 24 - Output Value

pub fn p25(&self) -> P25_R[src]

Bit 25 - Output Value

pub fn p26(&self) -> P26_R[src]

Bit 26 - Output Value

pub fn p27(&self) -> P27_R[src]

Bit 27 - Output Value

pub fn p28(&self) -> P28_R[src]

Bit 28 - Output Value

pub fn p29(&self) -> P29_R[src]

Bit 29 - Output Value

pub fn p30(&self) -> P30_R[src]

Bit 30 - Output Value

pub fn p31(&self) -> P31_R[src]

Bit 31 - Output Value

impl R<u32, Reg<u32, _PARAMETER>>[src]

pub fn parameter(&self) -> PARAMETER_R[src]

Bits 0:31 - Parameter

impl R<u32, Reg<u32, _PDER>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Pull-down Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Pull-down Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Pull-down Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Pull-down Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Pull-down Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Pull-down Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Pull-down Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Pull-down Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Pull-down Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Pull-down Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Pull-down Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Pull-down Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Pull-down Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Pull-down Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Pull-down Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Pull-down Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Pull-down Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Pull-down Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Pull-down Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Pull-down Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Pull-down Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Pull-down Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Pull-down Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Pull-down Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Pull-down Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Pull-down Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Pull-down Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Pull-down Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Pull-down Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Pull-down Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Pull-down Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Pull-down Enable

impl R<u32, Reg<u32, _PMR0>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Peripheral Multiplexer Select bit 0

pub fn p1(&self) -> P1_R[src]

Bit 1 - Peripheral Multiplexer Select bit 0

pub fn p2(&self) -> P2_R[src]

Bit 2 - Peripheral Multiplexer Select bit 0

pub fn p3(&self) -> P3_R[src]

Bit 3 - Peripheral Multiplexer Select bit 0

pub fn p4(&self) -> P4_R[src]

Bit 4 - Peripheral Multiplexer Select bit 0

pub fn p5(&self) -> P5_R[src]

Bit 5 - Peripheral Multiplexer Select bit 0

pub fn p6(&self) -> P6_R[src]

Bit 6 - Peripheral Multiplexer Select bit 0

pub fn p7(&self) -> P7_R[src]

Bit 7 - Peripheral Multiplexer Select bit 0

pub fn p8(&self) -> P8_R[src]

Bit 8 - Peripheral Multiplexer Select bit 0

pub fn p9(&self) -> P9_R[src]

Bit 9 - Peripheral Multiplexer Select bit 0

pub fn p10(&self) -> P10_R[src]

Bit 10 - Peripheral Multiplexer Select bit 0

pub fn p11(&self) -> P11_R[src]

Bit 11 - Peripheral Multiplexer Select bit 0

pub fn p12(&self) -> P12_R[src]

Bit 12 - Peripheral Multiplexer Select bit 0

pub fn p13(&self) -> P13_R[src]

Bit 13 - Peripheral Multiplexer Select bit 0

pub fn p14(&self) -> P14_R[src]

Bit 14 - Peripheral Multiplexer Select bit 0

pub fn p15(&self) -> P15_R[src]

Bit 15 - Peripheral Multiplexer Select bit 0

pub fn p16(&self) -> P16_R[src]

Bit 16 - Peripheral Multiplexer Select bit 0

pub fn p17(&self) -> P17_R[src]

Bit 17 - Peripheral Multiplexer Select bit 0

pub fn p18(&self) -> P18_R[src]

Bit 18 - Peripheral Multiplexer Select bit 0

pub fn p19(&self) -> P19_R[src]

Bit 19 - Peripheral Multiplexer Select bit 0

pub fn p20(&self) -> P20_R[src]

Bit 20 - Peripheral Multiplexer Select bit 0

pub fn p21(&self) -> P21_R[src]

Bit 21 - Peripheral Multiplexer Select bit 0

pub fn p22(&self) -> P22_R[src]

Bit 22 - Peripheral Multiplexer Select bit 0

pub fn p23(&self) -> P23_R[src]

Bit 23 - Peripheral Multiplexer Select bit 0

pub fn p24(&self) -> P24_R[src]

Bit 24 - Peripheral Multiplexer Select bit 0

pub fn p25(&self) -> P25_R[src]

Bit 25 - Peripheral Multiplexer Select bit 0

pub fn p26(&self) -> P26_R[src]

Bit 26 - Peripheral Multiplexer Select bit 0

pub fn p27(&self) -> P27_R[src]

Bit 27 - Peripheral Multiplexer Select bit 0

pub fn p28(&self) -> P28_R[src]

Bit 28 - Peripheral Multiplexer Select bit 0

pub fn p29(&self) -> P29_R[src]

Bit 29 - Peripheral Multiplexer Select bit 0

pub fn p30(&self) -> P30_R[src]

Bit 30 - Peripheral Multiplexer Select bit 0

pub fn p31(&self) -> P31_R[src]

Bit 31 - Peripheral Multiplexer Select bit 0

impl R<u32, Reg<u32, _PMR1>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Peripheral Multiplexer Select bit 1

pub fn p1(&self) -> P1_R[src]

Bit 1 - Peripheral Multiplexer Select bit 1

pub fn p2(&self) -> P2_R[src]

Bit 2 - Peripheral Multiplexer Select bit 1

pub fn p3(&self) -> P3_R[src]

Bit 3 - Peripheral Multiplexer Select bit 1

pub fn p4(&self) -> P4_R[src]

Bit 4 - Peripheral Multiplexer Select bit 1

pub fn p5(&self) -> P5_R[src]

Bit 5 - Peripheral Multiplexer Select bit 1

pub fn p6(&self) -> P6_R[src]

Bit 6 - Peripheral Multiplexer Select bit 1

pub fn p7(&self) -> P7_R[src]

Bit 7 - Peripheral Multiplexer Select bit 1

pub fn p8(&self) -> P8_R[src]

Bit 8 - Peripheral Multiplexer Select bit 1

pub fn p9(&self) -> P9_R[src]

Bit 9 - Peripheral Multiplexer Select bit 1

pub fn p10(&self) -> P10_R[src]

Bit 10 - Peripheral Multiplexer Select bit 1

pub fn p11(&self) -> P11_R[src]

Bit 11 - Peripheral Multiplexer Select bit 1

pub fn p12(&self) -> P12_R[src]

Bit 12 - Peripheral Multiplexer Select bit 1

pub fn p13(&self) -> P13_R[src]

Bit 13 - Peripheral Multiplexer Select bit 1

pub fn p14(&self) -> P14_R[src]

Bit 14 - Peripheral Multiplexer Select bit 1

pub fn p15(&self) -> P15_R[src]

Bit 15 - Peripheral Multiplexer Select bit 1

pub fn p16(&self) -> P16_R[src]

Bit 16 - Peripheral Multiplexer Select bit 1

pub fn p17(&self) -> P17_R[src]

Bit 17 - Peripheral Multiplexer Select bit 1

pub fn p18(&self) -> P18_R[src]

Bit 18 - Peripheral Multiplexer Select bit 1

pub fn p19(&self) -> P19_R[src]

Bit 19 - Peripheral Multiplexer Select bit 1

pub fn p20(&self) -> P20_R[src]

Bit 20 - Peripheral Multiplexer Select bit 1

pub fn p21(&self) -> P21_R[src]

Bit 21 - Peripheral Multiplexer Select bit 1

pub fn p22(&self) -> P22_R[src]

Bit 22 - Peripheral Multiplexer Select bit 1

pub fn p23(&self) -> P23_R[src]

Bit 23 - Peripheral Multiplexer Select bit 1

pub fn p24(&self) -> P24_R[src]

Bit 24 - Peripheral Multiplexer Select bit 1

pub fn p25(&self) -> P25_R[src]

Bit 25 - Peripheral Multiplexer Select bit 1

pub fn p26(&self) -> P26_R[src]

Bit 26 - Peripheral Multiplexer Select bit 1

pub fn p27(&self) -> P27_R[src]

Bit 27 - Peripheral Multiplexer Select bit 1

pub fn p28(&self) -> P28_R[src]

Bit 28 - Peripheral Multiplexer Select bit 1

pub fn p29(&self) -> P29_R[src]

Bit 29 - Peripheral Multiplexer Select bit 1

pub fn p30(&self) -> P30_R[src]

Bit 30 - Peripheral Multiplexer Select bit 1

pub fn p31(&self) -> P31_R[src]

Bit 31 - Peripheral Multiplexer Select bit 1

impl R<u32, Reg<u32, _PMR2>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Peripheral Multiplexer Select bit 2

pub fn p1(&self) -> P1_R[src]

Bit 1 - Peripheral Multiplexer Select bit 2

pub fn p2(&self) -> P2_R[src]

Bit 2 - Peripheral Multiplexer Select bit 2

pub fn p3(&self) -> P3_R[src]

Bit 3 - Peripheral Multiplexer Select bit 2

pub fn p4(&self) -> P4_R[src]

Bit 4 - Peripheral Multiplexer Select bit 2

pub fn p5(&self) -> P5_R[src]

Bit 5 - Peripheral Multiplexer Select bit 2

pub fn p6(&self) -> P6_R[src]

Bit 6 - Peripheral Multiplexer Select bit 2

pub fn p7(&self) -> P7_R[src]

Bit 7 - Peripheral Multiplexer Select bit 2

pub fn p8(&self) -> P8_R[src]

Bit 8 - Peripheral Multiplexer Select bit 2

pub fn p9(&self) -> P9_R[src]

Bit 9 - Peripheral Multiplexer Select bit 2

pub fn p10(&self) -> P10_R[src]

Bit 10 - Peripheral Multiplexer Select bit 2

pub fn p11(&self) -> P11_R[src]

Bit 11 - Peripheral Multiplexer Select bit 2

pub fn p12(&self) -> P12_R[src]

Bit 12 - Peripheral Multiplexer Select bit 2

pub fn p13(&self) -> P13_R[src]

Bit 13 - Peripheral Multiplexer Select bit 2

pub fn p14(&self) -> P14_R[src]

Bit 14 - Peripheral Multiplexer Select bit 2

pub fn p15(&self) -> P15_R[src]

Bit 15 - Peripheral Multiplexer Select bit 2

pub fn p16(&self) -> P16_R[src]

Bit 16 - Peripheral Multiplexer Select bit 2

pub fn p17(&self) -> P17_R[src]

Bit 17 - Peripheral Multiplexer Select bit 2

pub fn p18(&self) -> P18_R[src]

Bit 18 - Peripheral Multiplexer Select bit 2

pub fn p19(&self) -> P19_R[src]

Bit 19 - Peripheral Multiplexer Select bit 2

pub fn p20(&self) -> P20_R[src]

Bit 20 - Peripheral Multiplexer Select bit 2

pub fn p21(&self) -> P21_R[src]

Bit 21 - Peripheral Multiplexer Select bit 2

pub fn p22(&self) -> P22_R[src]

Bit 22 - Peripheral Multiplexer Select bit 2

pub fn p23(&self) -> P23_R[src]

Bit 23 - Peripheral Multiplexer Select bit 2

pub fn p24(&self) -> P24_R[src]

Bit 24 - Peripheral Multiplexer Select bit 2

pub fn p25(&self) -> P25_R[src]

Bit 25 - Peripheral Multiplexer Select bit 2

pub fn p26(&self) -> P26_R[src]

Bit 26 - Peripheral Multiplexer Select bit 2

pub fn p27(&self) -> P27_R[src]

Bit 27 - Peripheral Multiplexer Select bit 2

pub fn p28(&self) -> P28_R[src]

Bit 28 - Peripheral Multiplexer Select bit 2

pub fn p29(&self) -> P29_R[src]

Bit 29 - Peripheral Multiplexer Select bit 2

pub fn p30(&self) -> P30_R[src]

Bit 30 - Peripheral Multiplexer Select bit 2

pub fn p31(&self) -> P31_R[src]

Bit 31 - Peripheral Multiplexer Select bit 2

impl R<u32, Reg<u32, _PUER>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Pull-up Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Pull-up Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Pull-up Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Pull-up Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Pull-up Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Pull-up Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Pull-up Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Pull-up Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Pull-up Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Pull-up Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Pull-up Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Pull-up Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Pull-up Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Pull-up Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Pull-up Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Pull-up Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Pull-up Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Pull-up Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Pull-up Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Pull-up Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Pull-up Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Pull-up Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Pull-up Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Pull-up Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Pull-up Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Pull-up Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Pull-up Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Pull-up Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Pull-up Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Pull-up Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Pull-up Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Pull-up Enable

impl R<u32, Reg<u32, _PVR>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Pin Value

pub fn p1(&self) -> P1_R[src]

Bit 1 - Pin Value

pub fn p2(&self) -> P2_R[src]

Bit 2 - Pin Value

pub fn p3(&self) -> P3_R[src]

Bit 3 - Pin Value

pub fn p4(&self) -> P4_R[src]

Bit 4 - Pin Value

pub fn p5(&self) -> P5_R[src]

Bit 5 - Pin Value

pub fn p6(&self) -> P6_R[src]

Bit 6 - Pin Value

pub fn p7(&self) -> P7_R[src]

Bit 7 - Pin Value

pub fn p8(&self) -> P8_R[src]

Bit 8 - Pin Value

pub fn p9(&self) -> P9_R[src]

Bit 9 - Pin Value

pub fn p10(&self) -> P10_R[src]

Bit 10 - Pin Value

pub fn p11(&self) -> P11_R[src]

Bit 11 - Pin Value

pub fn p12(&self) -> P12_R[src]

Bit 12 - Pin Value

pub fn p13(&self) -> P13_R[src]

Bit 13 - Pin Value

pub fn p14(&self) -> P14_R[src]

Bit 14 - Pin Value

pub fn p15(&self) -> P15_R[src]

Bit 15 - Pin Value

pub fn p16(&self) -> P16_R[src]

Bit 16 - Pin Value

pub fn p17(&self) -> P17_R[src]

Bit 17 - Pin Value

pub fn p18(&self) -> P18_R[src]

Bit 18 - Pin Value

pub fn p19(&self) -> P19_R[src]

Bit 19 - Pin Value

pub fn p20(&self) -> P20_R[src]

Bit 20 - Pin Value

pub fn p21(&self) -> P21_R[src]

Bit 21 - Pin Value

pub fn p22(&self) -> P22_R[src]

Bit 22 - Pin Value

pub fn p23(&self) -> P23_R[src]

Bit 23 - Pin Value

pub fn p24(&self) -> P24_R[src]

Bit 24 - Pin Value

pub fn p25(&self) -> P25_R[src]

Bit 25 - Pin Value

pub fn p26(&self) -> P26_R[src]

Bit 26 - Pin Value

pub fn p27(&self) -> P27_R[src]

Bit 27 - Pin Value

pub fn p28(&self) -> P28_R[src]

Bit 28 - Pin Value

pub fn p29(&self) -> P29_R[src]

Bit 29 - Pin Value

pub fn p30(&self) -> P30_R[src]

Bit 30 - Pin Value

pub fn p31(&self) -> P31_R[src]

Bit 31 - Pin Value

impl R<u32, Reg<u32, _STERC>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Schmitt Trigger Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Schmitt Trigger Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Schmitt Trigger Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Schmitt Trigger Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Schmitt Trigger Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Schmitt Trigger Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Schmitt Trigger Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Schmitt Trigger Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Schmitt Trigger Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Schmitt Trigger Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Schmitt Trigger Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Schmitt Trigger Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Schmitt Trigger Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Schmitt Trigger Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Schmitt Trigger Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Schmitt Trigger Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Schmitt Trigger Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Schmitt Trigger Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Schmitt Trigger Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Schmitt Trigger Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Schmitt Trigger Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Schmitt Trigger Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Schmitt Trigger Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Schmitt Trigger Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Schmitt Trigger Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Schmitt Trigger Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Schmitt Trigger Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Schmitt Trigger Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Schmitt Trigger Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Schmitt Trigger Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Schmitt Trigger Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Schmitt Trigger Enable

impl R<u32, Reg<u32, _STERS>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Schmitt Trigger Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Schmitt Trigger Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Schmitt Trigger Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Schmitt Trigger Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Schmitt Trigger Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Schmitt Trigger Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Schmitt Trigger Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Schmitt Trigger Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Schmitt Trigger Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Schmitt Trigger Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Schmitt Trigger Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Schmitt Trigger Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Schmitt Trigger Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Schmitt Trigger Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Schmitt Trigger Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Schmitt Trigger Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Schmitt Trigger Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Schmitt Trigger Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Schmitt Trigger Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Schmitt Trigger Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Schmitt Trigger Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Schmitt Trigger Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Schmitt Trigger Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Schmitt Trigger Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Schmitt Trigger Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Schmitt Trigger Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Schmitt Trigger Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Schmitt Trigger Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Schmitt Trigger Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Schmitt Trigger Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Schmitt Trigger Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Schmitt Trigger Enable

impl R<u32, Reg<u32, _STERT>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Schmitt Trigger Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Schmitt Trigger Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Schmitt Trigger Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Schmitt Trigger Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Schmitt Trigger Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Schmitt Trigger Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Schmitt Trigger Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Schmitt Trigger Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Schmitt Trigger Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Schmitt Trigger Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Schmitt Trigger Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Schmitt Trigger Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Schmitt Trigger Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Schmitt Trigger Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Schmitt Trigger Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Schmitt Trigger Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Schmitt Trigger Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Schmitt Trigger Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Schmitt Trigger Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Schmitt Trigger Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Schmitt Trigger Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Schmitt Trigger Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Schmitt Trigger Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Schmitt Trigger Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Schmitt Trigger Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Schmitt Trigger Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Schmitt Trigger Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Schmitt Trigger Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Schmitt Trigger Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Schmitt Trigger Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Schmitt Trigger Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Schmitt Trigger Enable

impl R<u32, Reg<u32, _STER>>[src]

pub fn p0(&self) -> P0_R[src]

Bit 0 - Schmitt Trigger Enable

pub fn p1(&self) -> P1_R[src]

Bit 1 - Schmitt Trigger Enable

pub fn p2(&self) -> P2_R[src]

Bit 2 - Schmitt Trigger Enable

pub fn p3(&self) -> P3_R[src]

Bit 3 - Schmitt Trigger Enable

pub fn p4(&self) -> P4_R[src]

Bit 4 - Schmitt Trigger Enable

pub fn p5(&self) -> P5_R[src]

Bit 5 - Schmitt Trigger Enable

pub fn p6(&self) -> P6_R[src]

Bit 6 - Schmitt Trigger Enable

pub fn p7(&self) -> P7_R[src]

Bit 7 - Schmitt Trigger Enable

pub fn p8(&self) -> P8_R[src]

Bit 8 - Schmitt Trigger Enable

pub fn p9(&self) -> P9_R[src]

Bit 9 - Schmitt Trigger Enable

pub fn p10(&self) -> P10_R[src]

Bit 10 - Schmitt Trigger Enable

pub fn p11(&self) -> P11_R[src]

Bit 11 - Schmitt Trigger Enable

pub fn p12(&self) -> P12_R[src]

Bit 12 - Schmitt Trigger Enable

pub fn p13(&self) -> P13_R[src]

Bit 13 - Schmitt Trigger Enable

pub fn p14(&self) -> P14_R[src]

Bit 14 - Schmitt Trigger Enable

pub fn p15(&self) -> P15_R[src]

Bit 15 - Schmitt Trigger Enable

pub fn p16(&self) -> P16_R[src]

Bit 16 - Schmitt Trigger Enable

pub fn p17(&self) -> P17_R[src]

Bit 17 - Schmitt Trigger Enable

pub fn p18(&self) -> P18_R[src]

Bit 18 - Schmitt Trigger Enable

pub fn p19(&self) -> P19_R[src]

Bit 19 - Schmitt Trigger Enable

pub fn p20(&self) -> P20_R[src]

Bit 20 - Schmitt Trigger Enable

pub fn p21(&self) -> P21_R[src]

Bit 21 - Schmitt Trigger Enable

pub fn p22(&self) -> P22_R[src]

Bit 22 - Schmitt Trigger Enable

pub fn p23(&self) -> P23_R[src]

Bit 23 - Schmitt Trigger Enable

pub fn p24(&self) -> P24_R[src]

Bit 24 - Schmitt Trigger Enable

pub fn p25(&self) -> P25_R[src]

Bit 25 - Schmitt Trigger Enable

pub fn p26(&self) -> P26_R[src]

Bit 26 - Schmitt Trigger Enable

pub fn p27(&self) -> P27_R[src]

Bit 27 - Schmitt Trigger Enable

pub fn p28(&self) -> P28_R[src]

Bit 28 - Schmitt Trigger Enable

pub fn p29(&self) -> P29_R[src]

Bit 29 - Schmitt Trigger Enable

pub fn p30(&self) -> P30_R[src]

Bit 30 - Schmitt Trigger Enable

pub fn p31(&self) -> P31_R[src]

Bit 31 - Schmitt Trigger Enable

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_cycle(&self) -> bool[src]

Checks if the value of the field is CYCLE

pub fn is_ihit(&self) -> bool[src]

Checks if the value of the field is IHIT

pub fn is_dhit(&self) -> bool[src]

Checks if the value of the field is DHIT

impl R<u32, Reg<u32, _MCFG>>[src]

pub fn mode(&self) -> MODE_R[src]

Bits 0:1 - Cache Controller Monitor Counter Mode

impl R<u32, Reg<u32, _MSR>>[src]

pub fn eventcnt(&self) -> EVENTCNT_R[src]

Bits 0:31 - Monitor Event Counter

impl R<bool, CSTS_A>[src]

pub fn variant(&self) -> CSTS_A[src]

Get enumerated values variant

pub fn is_dis(&self) -> bool[src]

Checks if the value of the field is DIS

pub fn is_en(&self) -> bool[src]

Checks if the value of the field is EN

impl R<u32, Reg<u32, _SR>>[src]

pub fn csts(&self) -> CSTS_R[src]

Bit 0 - Cache Controller Status

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - VERSION

pub fn mfn(&self) -> MFN_R[src]

Bits 16:19 - MFN

impl R<u8, ULBT_A>[src]

pub fn variant(&self) -> Variant<u8, ULBT_A>[src]

Get enumerated values variant

pub fn is_infinite(&self) -> bool[src]

Checks if the value of the field is INFINITE

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_four_beat(&self) -> bool[src]

Checks if the value of the field is FOUR_BEAT

pub fn is_eight_beat(&self) -> bool[src]

Checks if the value of the field is EIGHT_BEAT

pub fn is_sixteen_beat(&self) -> bool[src]

Checks if the value of the field is SIXTEEN_BEAT

impl R<u32, Reg<u32, _MCFG>>[src]

pub fn ulbt(&self) -> ULBT_R[src]

Bits 0:2 - Undefined Length Burst Type

impl R<bool, RCB0_A>[src]

pub fn variant(&self) -> RCB0_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB1_A>[src]

pub fn variant(&self) -> RCB1_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB2_A>[src]

pub fn variant(&self) -> RCB2_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB3_A>[src]

pub fn variant(&self) -> RCB3_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB4_A>[src]

pub fn variant(&self) -> RCB4_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB5_A>[src]

pub fn variant(&self) -> RCB5_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB6_A>[src]

pub fn variant(&self) -> RCB6_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB7_A>[src]

pub fn variant(&self) -> RCB7_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB8_A>[src]

pub fn variant(&self) -> RCB8_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB9_A>[src]

pub fn variant(&self) -> RCB9_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB10_A>[src]

pub fn variant(&self) -> RCB10_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB11_A>[src]

pub fn variant(&self) -> RCB11_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB12_A>[src]

pub fn variant(&self) -> RCB12_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB13_A>[src]

pub fn variant(&self) -> RCB13_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB14_A>[src]

pub fn variant(&self) -> RCB14_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RCB15_A>[src]

pub fn variant(&self) -> RCB15_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _MRCR>>[src]

pub fn rcb0(&self) -> RCB0_R[src]

Bit 0 - Remap Command bit for Master 0

pub fn rcb1(&self) -> RCB1_R[src]

Bit 1 - Remap Command bit for Master 1

pub fn rcb2(&self) -> RCB2_R[src]

Bit 2 - Remap Command bit for Master 2

pub fn rcb3(&self) -> RCB3_R[src]

Bit 3 - Remap Command bit for Master 3

pub fn rcb4(&self) -> RCB4_R[src]

Bit 4 - Remap Command bit for Master 4

pub fn rcb5(&self) -> RCB5_R[src]

Bit 5 - Remap Command bit for Master 5

pub fn rcb6(&self) -> RCB6_R[src]

Bit 6 - Remap Command bit for Master 6

pub fn rcb7(&self) -> RCB7_R[src]

Bit 7 - Remap Command bit for Master 7

pub fn rcb8(&self) -> RCB8_R[src]

Bit 8 - Remap Command bit for Master 8

pub fn rcb9(&self) -> RCB9_R[src]

Bit 9 - Remap Command bit for Master 9

pub fn rcb10(&self) -> RCB10_R[src]

Bit 10 - Remap Command bit for Master 10

pub fn rcb11(&self) -> RCB11_R[src]

Bit 11 - Remap Command bit for Master 11

pub fn rcb12(&self) -> RCB12_R[src]

Bit 12 - Remap Command bit for Master 12

pub fn rcb13(&self) -> RCB13_R[src]

Bit 13 - Remap Command bit for Master 13

pub fn rcb14(&self) -> RCB14_R[src]

Bit 14 - Remap Command bit for Master 14

pub fn rcb15(&self) -> RCB15_R[src]

Bit 15 - Remap Command bit for Master 15

impl R<u32, Reg<u32, _PRAS>>[src]

pub fn m0pr(&self) -> M0PR_R[src]

Bits 0:3 - Master 0 Priority

pub fn m1pr(&self) -> M1PR_R[src]

Bits 4:7 - Master 1 Priority

pub fn m2pr(&self) -> M2PR_R[src]

Bits 8:11 - Master 2 Priority

pub fn m3pr(&self) -> M3PR_R[src]

Bits 12:15 - Master 3 Priority

pub fn m4pr(&self) -> M4PR_R[src]

Bits 16:19 - Master 4 Priority

pub fn m5pr(&self) -> M5PR_R[src]

Bits 20:23 - Master 5 Priority

pub fn m6pr(&self) -> M6PR_R[src]

Bits 24:27 - Master 6 Priority

pub fn m7pr(&self) -> M7PR_R[src]

Bits 28:31 - Master 7 Priority

impl R<u32, Reg<u32, _PRBS>>[src]

pub fn m8pr(&self) -> M8PR_R[src]

Bits 0:3 - Master 8 Priority

pub fn m9pr(&self) -> M9PR_R[src]

Bits 4:7 - Master 9 Priority

pub fn m10pr(&self) -> M10PR_R[src]

Bits 8:11 - Master 10 Priority

pub fn m11pr(&self) -> M11PR_R[src]

Bits 12:15 - Master 11 Priority

pub fn m12pr(&self) -> M12PR_R[src]

Bits 16:19 - Master 12 Priority

pub fn m13pr(&self) -> M13PR_R[src]

Bits 20:23 - Master 13 Priority

pub fn m14pr(&self) -> M14PR_R[src]

Bits 24:27 - Master 14 Priority

pub fn m15pr(&self) -> M15PR_R[src]

Bits 28:31 - Master 15 Priority

impl R<u8, DEFMSTR_TYPE_A>[src]

pub fn variant(&self) -> Variant<u8, DEFMSTR_TYPE_A>[src]

Get enumerated values variant

pub fn is_no_default(&self) -> bool[src]

Checks if the value of the field is NO_DEFAULT

pub fn is_last_default(&self) -> bool[src]

Checks if the value of the field is LAST_DEFAULT

pub fn is_fixed_default(&self) -> bool[src]

Checks if the value of the field is FIXED_DEFAULT

impl R<bool, ARBT_A>[src]

pub fn variant(&self) -> ARBT_A[src]

Get enumerated values variant

pub fn is_round_robin(&self) -> bool[src]

Checks if the value of the field is ROUND_ROBIN

pub fn is_fixed_priority(&self) -> bool[src]

Checks if the value of the field is FIXED_PRIORITY

impl R<u32, Reg<u32, _SCFG>>[src]

pub fn slot_cycle(&self) -> SLOT_CYCLE_R[src]

Bits 0:7 - Maximum Number of Allowed Cycles for a Burst

pub fn defmstr_type(&self) -> DEFMSTR_TYPE_R[src]

Bits 16:17 - Default Master Type

pub fn fixed_defmstr(&self) -> FIXED_DEFMSTR_R[src]

Bits 18:21 - Fixed Index of Default Master

pub fn arbt(&self) -> ARBT_R[src]

Bit 24 - Arbitration Type

impl R<u32, Reg<u32, _SFR>>[src]

pub fn sfr(&self) -> SFR_R[src]

Bits 0:31 - Special Function Register

impl R<bool, RXRDY_A>[src]

pub fn variant(&self) -> RXRDY_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, RXOR_A>[src]

pub fn variant(&self) -> RXOR_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TXRDY_A>[src]

pub fn variant(&self) -> TXRDY_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<bool, TXUR_A>[src]

pub fn variant(&self) -> TXUR_A[src]

Get enumerated values variant

pub fn is_disabled(&self) -> bool[src]

Checks if the value of the field is DISABLED

pub fn is_enabled(&self) -> bool[src]

Checks if the value of the field is ENABLED

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 1 - Receive Ready Interrupt Mask

pub fn rxor(&self) -> RXOR_R[src]

Bit 2 - Receive Overrun Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 5 - Transmit Ready Interrupt Mask

pub fn txur(&self) -> TXUR_R[src]

Bit 6 - Transmit Underrun Interrupt Mask

impl R<bool, MODE_A>[src]

pub fn variant(&self) -> MODE_A[src]

Get enumerated values variant

pub fn is_slave(&self) -> bool[src]

Checks if the value of the field is SLAVE

pub fn is_master(&self) -> bool[src]

Checks if the value of the field is MASTER

impl R<u8, DATALENGTH_A>[src]

pub fn variant(&self) -> DATALENGTH_A[src]

Get enumerated values variant

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_24(&self) -> bool[src]

Checks if the value of the field is _24

pub fn is_20(&self) -> bool[src]

Checks if the value of the field is _20

pub fn is_18(&self) -> bool[src]

Checks if the value of the field is _18

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_16c(&self) -> bool[src]

Checks if the value of the field is _16C

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_8c(&self) -> bool[src]

Checks if the value of the field is _8C

impl R<bool, RXMONO_A>[src]

pub fn variant(&self) -> RXMONO_A[src]

Get enumerated values variant

pub fn is_stereo(&self) -> bool[src]

Checks if the value of the field is STEREO

pub fn is_mono(&self) -> bool[src]

Checks if the value of the field is MONO

impl R<bool, RXDMA_A>[src]

pub fn variant(&self) -> RXDMA_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_multiple(&self) -> bool[src]

Checks if the value of the field is MULTIPLE

impl R<bool, RXLOOP_A>[src]

pub fn variant(&self) -> RXLOOP_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, TXMONO_A>[src]

pub fn variant(&self) -> TXMONO_A[src]

Get enumerated values variant

pub fn is_stereo(&self) -> bool[src]

Checks if the value of the field is STEREO

pub fn is_mono(&self) -> bool[src]

Checks if the value of the field is MONO

impl R<bool, TXDMA_A>[src]

pub fn variant(&self) -> TXDMA_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_multiple(&self) -> bool[src]

Checks if the value of the field is MULTIPLE

impl R<bool, TXSAME_A>[src]

pub fn variant(&self) -> TXSAME_A[src]

Get enumerated values variant

pub fn is_zero(&self) -> bool[src]

Checks if the value of the field is ZERO

pub fn is_same(&self) -> bool[src]

Checks if the value of the field is SAME

impl R<u8, IMCKFS_A>[src]

pub fn variant(&self) -> Variant<u8, IMCKFS_A>[src]

Get enumerated values variant

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_384(&self) -> bool[src]

Checks if the value of the field is _384

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_768(&self) -> bool[src]

Checks if the value of the field is _768

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<bool, IMCKMODE_A>[src]

pub fn variant(&self) -> IMCKMODE_A[src]

Get enumerated values variant

pub fn is_no_imck(&self) -> bool[src]

Checks if the value of the field is NO_IMCK

pub fn is_imck(&self) -> bool[src]

Checks if the value of the field is IMCK

impl R<bool, IWS24_A>[src]

pub fn variant(&self) -> IWS24_A[src]

Get enumerated values variant

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_24(&self) -> bool[src]

Checks if the value of the field is _24

impl R<u32, Reg<u32, _MR>>[src]

pub fn mode(&self) -> MODE_R[src]

Bit 0 - Master/Slave/Controller Mode

pub fn datalength(&self) -> DATALENGTH_R[src]

Bits 2:4 - Data Word Length

pub fn rxmono(&self) -> RXMONO_R[src]

Bit 8 - Receiver Mono

pub fn rxdma(&self) -> RXDMA_R[src]

Bit 9 - Single or Multiple DMA Channels for Receiver

pub fn rxloop(&self) -> RXLOOP_R[src]

Bit 10 - Loop-back Test Mode

pub fn txmono(&self) -> TXMONO_R[src]

Bit 12 - Transmitter Mono

pub fn txdma(&self) -> TXDMA_R[src]

Bit 13 - Single or Multiple DMA Channels for Transmitter

pub fn txsame(&self) -> TXSAME_R[src]

Bit 14 - Transmit Data when Underrun

pub fn imckfs(&self) -> IMCKFS_R[src]

Bits 24:29 - Master Clock to fs Ratio

pub fn imckmode(&self) -> IMCKMODE_R[src]

Bit 30 - Master Clock Mode

pub fn iws24(&self) -> IWS24_R[src]

Bit 31 - IWS Data Slot Width

impl R<bool, FORMAT_A>[src]

pub fn variant(&self) -> Variant<bool, FORMAT_A>[src]

Get enumerated values variant

pub fn is_i2s(&self) -> bool[src]

Checks if the value of the field is I2S

impl R<u32, Reg<u32, _PARAMETER>>[src]

pub fn format(&self) -> FORMAT_R[src]

Bit 7 - Data protocol format

pub fn nbchan(&self) -> NBCHAN_R[src]

Bits 16:20 - Maximum number of channels - 1

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rdat(&self) -> RDAT_R[src]

Bits 0:31 - Receive Data

impl R<bool, RXEN_A>[src]

pub fn variant(&self) -> RXEN_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, RXRDY_A>[src]

pub fn variant(&self) -> RXRDY_A[src]

Get enumerated values variant

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

impl R<bool, RXOR_A>[src]

pub fn variant(&self) -> RXOR_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<bool, TXEN_A>[src]

pub fn variant(&self) -> TXEN_A[src]

Get enumerated values variant

pub fn is_off(&self) -> bool[src]

Checks if the value of the field is OFF

pub fn is_on(&self) -> bool[src]

Checks if the value of the field is ON

impl R<bool, TXRDY_A>[src]

pub fn variant(&self) -> TXRDY_A[src]

Get enumerated values variant

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

pub fn is_empty(&self) -> bool[src]

Checks if the value of the field is EMPTY

impl R<bool, TXUR_A>[src]

pub fn variant(&self) -> TXUR_A[src]

Get enumerated values variant

pub fn is_no(&self) -> bool[src]

Checks if the value of the field is NO

pub fn is_yes(&self) -> bool[src]

Checks if the value of the field is YES

impl R<u8, RXORCH_A>[src]

pub fn variant(&self) -> Variant<u8, RXORCH_A>[src]

Get enumerated values variant

pub fn is_left(&self) -> bool[src]

Checks if the value of the field is LEFT

pub fn is_right(&self) -> bool[src]

Checks if the value of the field is RIGHT

impl R<u8, TXURCH_A>[src]

pub fn variant(&self) -> Variant<u8, TXURCH_A>[src]

Get enumerated values variant

pub fn is_left(&self) -> bool[src]

Checks if the value of the field is LEFT

pub fn is_right(&self) -> bool[src]

Checks if the value of the field is RIGHT

impl R<u32, Reg<u32, _SR>>[src]

pub fn rxen(&self) -> RXEN_R[src]

Bit 0 - Receive Enable

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 1 - Receive Ready

pub fn rxor(&self) -> RXOR_R[src]

Bit 2 - Receive Overrun

pub fn txen(&self) -> TXEN_R[src]

Bit 4 - Transmit Enable

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 5 - Transmit Ready

pub fn txur(&self) -> TXUR_R[src]

Bit 6 - Transmit Underrun

pub fn rxorch(&self) -> RXORCH_R[src]

Bits 8:9 - Receive Overrun Channels

pub fn txurch(&self) -> TXURCH_R[src]

Bits 20:21 - Transmit Underrun Channels

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Reserved. Value subject to change. No functionality associated. This is the Atmel internal version of the macrocell.

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Reserved. Value subject to change. No functionality associated.

impl R<u32, Reg<u32, _CFG>>[src]

pub fn dsize(&self) -> DSIZE_R[src]

Bits 0:1 - Data Size

pub fn smode(&self) -> SMODE_R[src]

Bits 2:3 - Sampling Mode

pub fn emode(&self) -> EMODE_R[src]

Bit 4 - Events Mode

pub fn edge(&self) -> EDGE_R[src]

Bit 5 - Sampling Edge Select

pub fn half(&self) -> HALF_R[src]

Bit 6 - Half Capture

pub fn odd(&self) -> ODD_R[src]

Bit 7 - Odd Capture

impl R<u32, Reg<u32, _CR>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Enable

pub fn stop(&self) -> STOP_R[src]

Bit 3 - Stop Capture

impl R<u32, Reg<u32, _IMR>>[src]

pub fn drdy(&self) -> DRDY_R[src]

Bit 2 - Data Ready Interrupt Mask

pub fn ovr(&self) -> OVR_R[src]

Bit 3 - Overrun Interrupt Mask

impl R<u32, Reg<u32, _RHR>>[src]

pub fn cdata(&self) -> CDATA_R[src]

Bits 0:31 - Captured Data

impl R<u32, Reg<u32, _SR>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Enable Status

pub fn cs(&self) -> CS_R[src]

Bit 1 - Capture Status

pub fn drdy(&self) -> DRDY_R[src]

Bit 2 - Data Ready Interrupt Status

pub fn ovr(&self) -> OVR_R[src]

Bit 3 - Overrun Interrupt Status

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rcz(&self) -> RCZ_R[src]

Bit 0 - Reload Counter Zero

pub fn trc(&self) -> TRC_R[src]

Bit 1 - Transfer Complete

pub fn terr(&self) -> TERR_R[src]

Bit 2 - Transfer Error

impl R<u32, Reg<u32, _ISR>>[src]

pub fn rcz(&self) -> RCZ_R[src]

Bit 0 - Reload Counter Zero

pub fn trc(&self) -> TRC_R[src]

Bit 1 - Transfer Complete

pub fn terr(&self) -> TERR_R[src]

Bit 2 - Transfer Error

impl R<u32, Reg<u32, _MARR>>[src]

pub fn marv(&self) -> MARV_R[src]

Bits 0:31 - Memory Address Reload Value

impl R<u32, Reg<u32, _MAR>>[src]

pub fn maddr(&self) -> MADDR_R[src]

Bits 0:31 - Memory Address

impl R<u8, SIZE_A>[src]

pub fn variant(&self) -> Variant<u8, SIZE_A>[src]

Get enumerated values variant

pub fn is_byte(&self) -> bool[src]

Checks if the value of the field is BYTE

pub fn is_half_word(&self) -> bool[src]

Checks if the value of the field is HALF_WORD

pub fn is_word(&self) -> bool[src]

Checks if the value of the field is WORD

impl R<u32, Reg<u32, _MR>>[src]

pub fn size(&self) -> SIZE_R[src]

Bits 0:1 - Transfer size

pub fn etrig(&self) -> ETRIG_R[src]

Bit 2 - Event trigger

pub fn ring(&self) -> RING_R[src]

Bit 3 - Ring Buffer

impl R<u32, Reg<u32, _PCONTROL>>[src]

pub fn ch0en(&self) -> CH0EN_R[src]

Bit 0 - Channel 0 Enabled

pub fn ch1en(&self) -> CH1EN_R[src]

Bit 1 - Channel 1 Enabled.

pub fn ch0of(&self) -> CH0OF_R[src]

Bit 4 - Channel 0 Overflow Freeze

pub fn ch1of(&self) -> CH1OF_R[src]

Bit 5 - Channel 1 overflow freeze

pub fn ch0res(&self) -> CH0RES_R[src]

Bit 8 - Channel 0 counter reset

pub fn ch1res(&self) -> CH1RES_R[src]

Bit 9 - Channel 1 counter reset

pub fn mon0ch(&self) -> MON0CH_R[src]

Bits 16:21 - PDCA Channel to monitor with counter 0

pub fn mon1ch(&self) -> MON1CH_R[src]

Bits 24:29 - PDCA Channel to monitor with counter 1

impl R<u32, Reg<u32, _PRDATA0>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data Cycles Counted Since Last reset

impl R<u32, Reg<u32, _PRDATA1>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data Cycles Counted Since Last reset

impl R<u32, Reg<u32, _PRLAT0>>[src]

pub fn lat(&self) -> LAT_R[src]

Bits 0:15 - Maximum Transfer Initiation cycles counted since last reset

impl R<u32, Reg<u32, _PRLAT1>>[src]

pub fn lat(&self) -> LAT_R[src]

Bits 0:15 - Maximum Transfer initiation cycles counted since last reset

impl R<u32, Reg<u32, _PRSTALL0>>[src]

pub fn stall(&self) -> STALL_R[src]

Bits 0:31 - Stall Cycles counted since last reset

impl R<u32, Reg<u32, _PRSTALL1>>[src]

pub fn stall(&self) -> STALL_R[src]

Bits 0:31 - Stall Cycles Counted since last reset

impl R<u32, Reg<u32, _PSR>>[src]

pub fn pid(&self) -> PID_R[src]

Bits 0:7 - Peripheral Identifier

impl R<u32, Reg<u32, _PWDATA0>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data Cycles Counted since last Reset

impl R<u32, Reg<u32, _PWDATA1>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Data cycles Counted Since last reset

impl R<u32, Reg<u32, _PWLAT0>>[src]

pub fn lat(&self) -> LAT_R[src]

Bits 0:15 - Maximum transfer initiation cycles counted since last reset

impl R<u32, Reg<u32, _PWLAT1>>[src]

pub fn lat(&self) -> LAT_R[src]

Bits 0:15 - Maximum transfer initiation cycles counted since last reset

impl R<u32, Reg<u32, _PWSTALL0>>[src]

pub fn stall(&self) -> STALL_R[src]

Bits 0:31 - Stall cycles counted since last reset

impl R<u32, Reg<u32, _PWSTALL1>>[src]

pub fn stall(&self) -> STALL_R[src]

Bits 0:31 - Stall cycles counted since last reset

impl R<u32, Reg<u32, _SR>>[src]

pub fn ten(&self) -> TEN_R[src]

Bit 0 - Transfer Enabled

impl R<u32, Reg<u32, _TCRR>>[src]

pub fn tcrv(&self) -> TCRV_R[src]

Bits 0:15 - Transfer Counter Reload Value

impl R<u32, Reg<u32, _TCR>>[src]

pub fn tcv(&self) -> TCV_R[src]

Bits 0:15 - Transfer Counter Value

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u32, Reg<u32, _BUSY>>[src]

pub fn busy(&self) -> BUSY_R[src]

Bits 0:31 - Channel Status

impl R<u8, EVMX_A>[src]

pub fn variant(&self) -> Variant<u8, EVMX_A>[src]

Get enumerated values variant

pub fn is_0x00(&self) -> bool[src]

Checks if the value of the field is _0X00

pub fn is_0x01(&self) -> bool[src]

Checks if the value of the field is _0X01

impl R<bool, SMX_A>[src]

pub fn variant(&self) -> SMX_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _CHMX>>[src]

pub fn evmx(&self) -> EVMX_R[src]

Bits 0:5 - Event Multiplexer

pub fn smx(&self) -> SMX_R[src]

Bit 8 - Software Event Multiplexer

impl R<u32, Reg<u32, _CHSR>>[src]

pub fn chs(&self) -> CHS_R[src]

Bits 0:31 - Channel Status

impl R<bool, EN_A>[src]

pub fn variant(&self) -> EN_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, IGFR_A>[src]

pub fn variant(&self) -> IGFR_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, IGFF_A>[src]

pub fn variant(&self) -> IGFF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _EVS>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Event Shaper Enable

pub fn igfr(&self) -> IGFR_R[src]

Bit 16 - Input Glitch Filter Rise

pub fn igff(&self) -> IGFF_R[src]

Bit 17 - Input Glitch Filter Fall

pub fn igfon(&self) -> IGFON_R[src]

Bit 18 - Input Glitch Filter Status

impl R<u32, Reg<u32, _IGFDR>>[src]

pub fn igfdr(&self) -> IGFDR_R[src]

Bits 0:3 - Input Glitch Filter Divider Register

impl R<u32, Reg<u32, _OVIMR>>[src]

pub fn ovim(&self) -> OVIM_R[src]

Bits 0:31 - Overrun Interrupt Mask

impl R<u32, Reg<u32, _OVSR>>[src]

pub fn ovs(&self) -> OVS_R[src]

Bits 0:31 - Overrun Interrupt Status

impl R<u32, Reg<u32, _PARAMETER>>[src]

pub fn igf_count(&self) -> IGF_COUNT_R[src]

Bits 0:7 - Number of Input Glitch Filters

pub fn evs_count(&self) -> EVS_COUNT_R[src]

Bits 8:15 - Number of Event Shapers

pub fn evin(&self) -> EVIN_R[src]

Bits 16:23 - Number of Event Inputs / Generators

pub fn trigout(&self) -> TRIGOUT_R[src]

Bits 24:31 - Number of Trigger Outputs / Channels / Users

impl R<u32, Reg<u32, _TRIMR>>[src]

pub fn trim(&self) -> TRIM_R[src]

Bits 0:31 - Trigger Interrupt Mask

impl R<u32, Reg<u32, _TRSR>>[src]

pub fn trs(&self) -> TRS_R[src]

Bits 0:31 - Trigger Interrupt Status

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u32, Reg<u32, _CFG>>[src]

pub fn source(&self) -> SOURCE_R[src]

Bits 0:1 - Source Enable Mode

pub fn action(&self) -> ACTION_R[src]

Bit 2 - Action to perform

pub fn match_(&self) -> MATCH_R[src]

Bits 8:15 - Data Match

impl R<u32, Reg<u32, _RHR>>[src]

pub fn cdata(&self) -> CDATA_R[src]

Bits 0:31 - Received Data

impl R<u32, Reg<u32, _SR>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Enable Interrupt Status

pub fn drdy(&self) -> DRDY_R[src]

Bit 1 - Data Ready Interrupt Status

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u32, Reg<u32, _AWEN>>[src]

pub fn awen(&self) -> AWEN_R[src]

Bits 0:31 - Asynchronous Wake Up

impl R<u32, Reg<u32, _CFDCTRL>>[src]

pub fn cfden(&self) -> CFDEN_R[src]

Bit 0 - Clock Failure Detection Enable

pub fn sfv(&self) -> SFV_R[src]

Bit 31 - Store Final Value

impl R<u32, Reg<u32, _CONFIG>>[src]

pub fn pba(&self) -> PBA_R[src]

Bit 0 - APBA Implemented

pub fn pbb(&self) -> PBB_R[src]

Bit 1 - APBB Implemented

pub fn pbc(&self) -> PBC_R[src]

Bit 2 - APBC Implemented

pub fn pbd(&self) -> PBD_R[src]

Bit 3 - APBD Implemented

pub fn hsbpevc(&self) -> HSBPEVC_R[src]

Bit 7 - HSB PEVC Clock Implemented

impl R<u32, Reg<u32, _CPUMASK>>[src]

pub fn ocd_(&self) -> OCD__R[src]

Bit 0 - OCD CPU Clock Mask

impl R<u8, CPUSEL_A>[src]

pub fn variant(&self) -> Variant<u8, CPUSEL_A>[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _CPUSEL>>[src]

pub fn cpusel(&self) -> CPUSEL_R[src]

Bits 0:2 - CPU Clock Select

pub fn cpudiv(&self) -> CPUDIV_R[src]

Bit 7 - CPU Division

impl R<u32, Reg<u32, _FASTSLEEP>>[src]

pub fn osc(&self) -> OSC_R[src]

Bit 0 - Oscillator

pub fn pll(&self) -> PLL_R[src]

Bit 8 - PLL

pub fn fastrcosc(&self) -> FASTRCOSC_R[src]

Bits 16:20 - RC80 or FLO

pub fn dfll(&self) -> DFLL_R[src]

Bit 24 - DFLL

impl R<u32, Reg<u32, _HSBMASK>>[src]

pub fn pdca_(&self) -> PDCA__R[src]

Bit 0 - PDCA HSB Clock Mask

pub fn hflashc_(&self) -> HFLASHC__R[src]

Bit 1 - HFLASHC HSB Clock Mask

pub fn hramc1_(&self) -> HRAMC1__R[src]

Bit 2 - HRAMC1 HSB Clock Mask

pub fn usbc_(&self) -> USBC__R[src]

Bit 3 - USBC HSB Clock Mask

pub fn crccu_(&self) -> CRCCU__R[src]

Bit 4 - CRCCU HSB Clock Mask

pub fn htop0_(&self) -> HTOP0__R[src]

Bit 5 - HTOP0 HSB Clock Mask

pub fn htop1_(&self) -> HTOP1__R[src]

Bit 6 - HTOP1 HSB Clock Mask

pub fn htop2_(&self) -> HTOP2__R[src]

Bit 7 - HTOP2 HSB Clock Mask

pub fn htop3_(&self) -> HTOP3__R[src]

Bit 8 - HTOP3 HSB Clock Mask

impl R<bool, WAKE_A>[src]

pub fn variant(&self) -> WAKE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _IMR>>[src]

pub fn cfd(&self) -> CFD_R[src]

Bit 0 - Clock Failure Detected Interrupt Mask

pub fn ckrdy(&self) -> CKRDY_R[src]

Bit 5 - Clock Ready Interrupt Mask

pub fn wake(&self) -> WAKE_R[src]

Bit 8 - Wake up Interrupt Mask

pub fn ae(&self) -> AE_R[src]

Bit 31 - Access Error Interrupt Mask

impl R<bool, WAKE_A>[src]

pub fn variant(&self) -> WAKE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _ISR>>[src]

pub fn cfd(&self) -> CFD_R[src]

Bit 0 - Clock Failure Detected Interrupt Status

pub fn ckrdy(&self) -> CKRDY_R[src]

Bit 5 - Clock Ready Interrupt Status

pub fn wake(&self) -> WAKE_R[src]

Bit 8 - Wake up Interrupt Status

pub fn ae(&self) -> AE_R[src]

Bit 31 - Access Error Interrupt Status

impl R<u32, Reg<u32, _MCCTRL>>[src]

pub fn mcsel(&self) -> MCSEL_R[src]

Bits 0:2 - Main Clock Select

impl R<u32, Reg<u32, _PBAMASK>>[src]

pub fn iisc_(&self) -> IISC__R[src]

Bit 0 - IISC APB Clock Enable

pub fn spi_(&self) -> SPI__R[src]

Bit 1 - SPI APB Clock Enable

pub fn tc0_(&self) -> TC0__R[src]

Bit 2 - TC0 APB Clock Enable

pub fn tc1_(&self) -> TC1__R[src]

Bit 3 - TC1 APB Clock Enable

pub fn twim0_(&self) -> TWIM0__R[src]

Bit 4 - TWIM0 APB Clock Enable

pub fn twis0_(&self) -> TWIS0__R[src]

Bit 5 - TWIS0 APB Clock Enable

pub fn twim1_(&self) -> TWIM1__R[src]

Bit 6 - TWIM1 APB Clock Enable

pub fn twis1_(&self) -> TWIS1__R[src]

Bit 7 - TWIS1 APB Clock Enable

pub fn usart0_(&self) -> USART0__R[src]

Bit 8 - USART0 APB Clock Enable

pub fn usart1_(&self) -> USART1__R[src]

Bit 9 - USART1 APB Clock Enable

pub fn usart2_(&self) -> USART2__R[src]

Bit 10 - USART2 APB Clock Enable

pub fn usart3_(&self) -> USART3__R[src]

Bit 11 - USART3 APB Clock Enable

pub fn adcife_(&self) -> ADCIFE__R[src]

Bit 12 - ADCIFE APB Clock Enable

pub fn dacc_(&self) -> DACC__R[src]

Bit 13 - DACC APB Clock Enable

pub fn acifc_(&self) -> ACIFC__R[src]

Bit 14 - ACIFC APB Clock Enable

pub fn gloc_(&self) -> GLOC__R[src]

Bit 15 - GLOC APB Clock Enable

pub fn abdacb_(&self) -> ABDACB__R[src]

Bit 16 - ABDACB APB Clock Enable

pub fn trng_(&self) -> TRNG__R[src]

Bit 17 - TRNG APB Clock Enable

pub fn parc_(&self) -> PARC__R[src]

Bit 18 - PARC APB Clock Enable

pub fn catb_(&self) -> CATB__R[src]

Bit 19 - CATB APB Clock Enable

pub fn twim2_(&self) -> TWIM2__R[src]

Bit 21 - TWIM2 APB Clock Enable

pub fn twim3_(&self) -> TWIM3__R[src]

Bit 22 - TWIM3 APB Clock Enable

impl R<u32, Reg<u32, _PBASEL>>[src]

pub fn pbsel(&self) -> PBSEL_R[src]

Bits 0:2 - PBA Clock Select

pub fn pbdiv(&self) -> PBDIV_R[src]

Bit 7 - PBA Division Select

impl R<u32, Reg<u32, _PBBMASK>>[src]

pub fn hflashc_(&self) -> HFLASHC__R[src]

Bit 0 - HFLASHC APB Clock Enable

pub fn hcache_(&self) -> HCACHE__R[src]

Bit 1 - HCACHE APB Clock Enable

pub fn hmatrix_(&self) -> HMATRIX__R[src]

Bit 2 - HMATRIX APB Clock Enable

pub fn pdca_(&self) -> PDCA__R[src]

Bit 3 - PDCA APB Clock Enable

pub fn crccu_(&self) -> CRCCU__R[src]

Bit 4 - CRCCU APB Clock Enable

pub fn usbc_(&self) -> USBC__R[src]

Bit 5 - USBC APB Clock Enable

pub fn pevc_(&self) -> PEVC__R[src]

Bit 6 - PEVC APB Clock Enable

impl R<u32, Reg<u32, _PBBSEL>>[src]

pub fn pbsel(&self) -> PBSEL_R[src]

Bits 0:2 - PBB Clock Select

pub fn pbdiv(&self) -> PBDIV_R[src]

Bit 7 - PBB Division Select

impl R<u32, Reg<u32, _PBCMASK>>[src]

pub fn pm_(&self) -> PM__R[src]

Bit 0 - PM APB Clock Enable

pub fn chipid_(&self) -> CHIPID__R[src]

Bit 1 - CHIPID APB Clock Enable

pub fn scif_(&self) -> SCIF__R[src]

Bit 2 - SCIF APB Clock Enable

pub fn freqm_(&self) -> FREQM__R[src]

Bit 3 - FREQM APB Clock Enable

pub fn gpio_(&self) -> GPIO__R[src]

Bit 4 - GPIO APB Clock Enable

impl R<u32, Reg<u32, _PBCSEL>>[src]

pub fn pbsel(&self) -> PBSEL_R[src]

Bits 0:2 - PBC Clock Select

pub fn pbdiv(&self) -> PBDIV_R[src]

Bit 7 - PBC Division Select

impl R<u32, Reg<u32, _PBDMASK>>[src]

pub fn bpm_(&self) -> BPM__R[src]

Bit 0 - BPM APB Clock Enable

pub fn bscif_(&self) -> BSCIF__R[src]

Bit 1 - BSCIF APB Clock Enable

pub fn ast_(&self) -> AST__R[src]

Bit 2 - AST APB Clock Enable

pub fn wdt_(&self) -> WDT__R[src]

Bit 3 - WDT APB Clock Enable

pub fn eic_(&self) -> EIC__R[src]

Bit 4 - EIC APB Clock Enable

pub fn picouart_(&self) -> PICOUART__R[src]

Bit 5 - PICOUART APB Clock Enable

impl R<u32, Reg<u32, _PBDSEL>>[src]

pub fn pbsel(&self) -> PBSEL_R[src]

Bits 0:2 - PBD Clock Select

pub fn pbdiv(&self) -> PBDIV_R[src]

Bit 7 - PBD Division Select

impl R<u32, Reg<u32, _PPCR>>[src]

pub fn rstpun(&self) -> RSTPUN_R[src]

Bit 0 - Reset Pullup

pub fn catbrcmask(&self) -> CATBRCMASK_R[src]

Bit 1 - CAT Request Clock Mask

pub fn acifcrcmask(&self) -> ACIFCRCMASK_R[src]

Bit 2 - ACIFC Request Clock Mask

pub fn astrcmask(&self) -> ASTRCMASK_R[src]

Bit 3 - AST Request Clock Mask

pub fn twis0rcmask(&self) -> TWIS0RCMASK_R[src]

Bit 4 - TWIS0 Request Clock Mask

pub fn twis1rcmask(&self) -> TWIS1RCMASK_R[src]

Bit 5 - TWIS1 Request Clock Mask

pub fn pevcrcmask(&self) -> PEVCRCMASK_R[src]

Bit 6 - PEVC Request Clock Mask

pub fn adcifercmask(&self) -> ADCIFERCMASK_R[src]

Bit 7 - ADCIFE Request Clock Mask

pub fn vregrcmask(&self) -> VREGRCMASK_R[src]

Bit 8 - VREG Request Clock Mask

pub fn fwbgref(&self) -> FWBGREF_R[src]

Bit 9 - Flash Wait BGREF

pub fn fwbod18(&self) -> FWBOD18_R[src]

Bit 10 - Flash Wait BOD18

impl R<u32, Reg<u32, _RCAUSE>>[src]

pub fn por(&self) -> POR_R[src]

Bit 0 - Power-on Reset

pub fn bod(&self) -> BOD_R[src]

Bit 1 - Brown-out Reset

pub fn ext(&self) -> EXT_R[src]

Bit 2 - External Reset Pin

pub fn wdt(&self) -> WDT_R[src]

Bit 3 - Watchdog Reset

pub fn ocdrst(&self) -> OCDRST_R[src]

Bit 8 - OCD Reset

pub fn por33(&self) -> POR33_R[src]

Bit 10 - Power-on Reset

pub fn bod33(&self) -> BOD33_R[src]

Bit 13 - Brown-out 3.3V Reset

impl R<bool, WAKE_A>[src]

pub fn variant(&self) -> WAKE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _SR>>[src]

pub fn cfd(&self) -> CFD_R[src]

Bit 0 - Clock Failure Detected

pub fn ocp(&self) -> OCP_R[src]

Bit 1 - Over Clock Detected

pub fn ckrdy(&self) -> CKRDY_R[src]

Bit 5 - Clock Ready

pub fn wake(&self) -> WAKE_R[src]

Bit 8 - Wake up

pub fn perrdy(&self) -> PERRDY_R[src]

Bit 28 - Peripheral Ready

pub fn ae(&self) -> AE_R[src]

Bit 31 - Access Error

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<u32, Reg<u32, _WCAUSE>>[src]

pub fn twi_slave_0(&self) -> TWI_SLAVE_0_R[src]

Bit 0 - Two-wire Slave Interface 0

pub fn twi_slave_1(&self) -> TWI_SLAVE_1_R[src]

Bit 1 - Two-wire Slave Interface 1

pub fn usbc(&self) -> USBC_R[src]

Bit 2 - USB Device and Embedded Host Interface

pub fn psok(&self) -> PSOK_R[src]

Bit 3 - Power Scaling OK

pub fn bod18_irq(&self) -> BOD18_IRQ_R[src]

Bit 4 - BOD18 Interrupt

pub fn bod33_irq(&self) -> BOD33_IRQ_R[src]

Bit 5 - BOD33 Interrupt

pub fn picouart(&self) -> PICOUART_R[src]

Bit 6 - Picopower UART

pub fn lcdca(&self) -> LCDCA_R[src]

Bit 7 - LCD Controller

pub fn eic(&self) -> EIC_R[src]

Bit 16 - External Interrupt Controller

pub fn ast(&self) -> AST_R[src]

Bit 17 - Asynchronous Timer

impl R<u32, Reg<u32, _DFLLIFBVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<u32, Reg<u32, _DFLL0CONF>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Enable

pub fn mode(&self) -> MODE_R[src]

Bit 1 - Mode Selection

pub fn stable(&self) -> STABLE_R[src]

Bit 2 - Stable DFLL Frequency

pub fn llaw(&self) -> LLAW_R[src]

Bit 3 - Lose Lock After Wake

pub fn ccdis(&self) -> CCDIS_R[src]

Bit 5 - Chill Cycle Disable

pub fn qldis(&self) -> QLDIS_R[src]

Bit 6 - Quick Lock Disable

pub fn range(&self) -> RANGE_R[src]

Bits 16:17 - Range Value

pub fn fcd(&self) -> FCD_R[src]

Bit 23 - Fuse Calibration Done

pub fn calib(&self) -> CALIB_R[src]

Bits 24:27 - Calibration Value

impl R<u32, Reg<u32, _DFLL0MUL>>[src]

pub fn mul(&self) -> MUL_R[src]

Bits 0:15 - DFLL Multiply Factor

impl R<u32, Reg<u32, _DFLL0RATIO>>[src]

pub fn ratiodiff(&self) -> RATIODIFF_R[src]

Bits 0:15 - Multiplication Ratio Difference

impl R<u32, Reg<u32, _DFLL0STEP>>[src]

pub fn fstep(&self) -> FSTEP_R[src]

Bits 0:7 - Fine Maximum Step

pub fn cstep(&self) -> CSTEP_R[src]

Bits 16:20 - Coarse Maximum Step

impl R<u32, Reg<u32, _DFLL0VAL>>[src]

pub fn fine(&self) -> FINE_R[src]

Bits 0:7 - Fine Value

pub fn coarse(&self) -> COARSE_R[src]

Bits 16:20 - Coarse Value

impl R<u32, Reg<u32, _FLOVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<u32, Reg<u32, _FPCR>>[src]

pub fn fpen(&self) -> FPEN_R[src]

Bit 0 - High Resolution Prescaler Enable

pub fn cksel(&self) -> CKSEL_R[src]

Bits 1:3 - Clock Input Selection

impl R<u32, Reg<u32, _FPDIV>>[src]

pub fn fpdiv(&self) -> FPDIV_R[src]

Bits 0:15 - Fractional Prescaler Division Factor

impl R<u32, Reg<u32, _FPMUL>>[src]

pub fn fpmul(&self) -> FPMUL_R[src]

Bits 0:15 - Fractional Prescaler Multiplication Factor

impl R<u32, Reg<u32, _GCCTRL>>[src]

pub fn cen(&self) -> CEN_R[src]

Bit 0 - Clock Enable

pub fn diven(&self) -> DIVEN_R[src]

Bit 1 - Divide Enable

pub fn oscsel(&self) -> OSCSEL_R[src]

Bits 8:12 - Clock Select

pub fn div(&self) -> DIV_R[src]

Bits 16:31 - Division Factor

impl R<u32, Reg<u32, _GCLKIFVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<u32, Reg<u32, _GCLKPRESCVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<u32, Reg<u32, _HRPCR>>[src]

pub fn hrpen(&self) -> HRPEN_R[src]

Bit 0 - High Resolution Prescaler Enable

pub fn cksel(&self) -> CKSEL_R[src]

Bits 1:3 - Clock Input Selection

pub fn hrcount(&self) -> HRCOUNT_R[src]

Bits 8:31 - High Resolution Counter

impl R<u32, Reg<u32, _IMR>>[src]

pub fn osc0rdy(&self) -> OSC0RDY_R[src]

Bit 0 - OSC0 Ready

pub fn dfll0lockc(&self) -> DFLL0LOCKC_R[src]

Bit 1 - DFLL0 Lock Coarse

pub fn dfll0lockf(&self) -> DFLL0LOCKF_R[src]

Bit 2 - DFLL0 Lock Fine

pub fn dfll0rdy(&self) -> DFLL0RDY_R[src]

Bit 3 - DFLL0 Ready

pub fn dfll0rcs(&self) -> DFLL0RCS_R[src]

Bit 4 - DFLL0 Reference Clock Stopped

pub fn dfll0oob(&self) -> DFLL0OOB_R[src]

Bit 5 - DFLL0 Out Of Bounds

pub fn pll0lock(&self) -> PLL0LOCK_R[src]

Bit 6 - PLL0 Lock

pub fn pll0locklost(&self) -> PLL0LOCKLOST_R[src]

Bit 7 - PLL0 Lock Lost

pub fn rcfastlock(&self) -> RCFASTLOCK_R[src]

Bit 13 - RCFAST Lock

pub fn rcfastlocklost(&self) -> RCFASTLOCKLOST_R[src]

Bit 14 - RCFAST Lock Lost

pub fn ae(&self) -> AE_R[src]

Bit 31 - Access Error

impl R<u32, Reg<u32, _ISR>>[src]

pub fn osc0rdy(&self) -> OSC0RDY_R[src]

Bit 0 - OSC0 Ready

pub fn dfll0lockc(&self) -> DFLL0LOCKC_R[src]

Bit 1 - DFLL0 Lock Coarse

pub fn dfll0lockf(&self) -> DFLL0LOCKF_R[src]

Bit 2 - DFLL0 Lock Fine

pub fn dfll0rdy(&self) -> DFLL0RDY_R[src]

Bit 3 - DFLL0 Ready

pub fn dfll0rcs(&self) -> DFLL0RCS_R[src]

Bit 4 - DFLL0 Reference Clock Stopped

pub fn dfll0oob(&self) -> DFLL0OOB_R[src]

Bit 5 - DFLL0 Out Of Bounds

pub fn pll0lock(&self) -> PLL0LOCK_R[src]

Bit 6 - PLL0 Lock

pub fn pll0locklost(&self) -> PLL0LOCKLOST_R[src]

Bit 7 - PLL0 Lock Lost

pub fn rcfastlock(&self) -> RCFASTLOCK_R[src]

Bit 13 - RCFAST Lock

pub fn rcfastlocklost(&self) -> RCFASTLOCKLOST_R[src]

Bit 14 - RCFAST Lock Lost

pub fn ae(&self) -> AE_R[src]

Bit 31 - Access Error

impl R<u32, Reg<u32, _OSCCTRL0>>[src]

pub fn mode(&self) -> MODE_R[src]

Bit 0 - Oscillator Mode

pub fn gain(&self) -> GAIN_R[src]

Bits 1:2 - Gain

pub fn agc(&self) -> AGC_R[src]

Bit 3 - Automatic Gain Control

pub fn startup(&self) -> STARTUP_R[src]

Bits 8:11 - Oscillator Start-up Time

pub fn oscen(&self) -> OSCEN_R[src]

Bit 16 - Oscillator Enable

impl R<u32, Reg<u32, _OSCIFAVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant nubmer

impl R<u32, Reg<u32, _PCLKSR>>[src]

pub fn osc0rdy(&self) -> OSC0RDY_R[src]

Bit 0 - OSC0 Ready

pub fn dfll0lockc(&self) -> DFLL0LOCKC_R[src]

Bit 1 - DFLL0 Locked on Coarse Value

pub fn dfll0lockf(&self) -> DFLL0LOCKF_R[src]

Bit 2 - DFLL0 Locked on Fine Value

pub fn dfll0rdy(&self) -> DFLL0RDY_R[src]

Bit 3 - DFLL0 Synchronization Ready

pub fn dfll0rcs(&self) -> DFLL0RCS_R[src]

Bit 4 - DFLL0 Reference Clock Stopped

pub fn dfll0oob(&self) -> DFLL0OOB_R[src]

Bit 5 - DFLL0 Track Out Of Bounds

pub fn pll0lock(&self) -> PLL0LOCK_R[src]

Bit 6 - PLL0 Locked on Accurate value

pub fn pll0locklost(&self) -> PLL0LOCKLOST_R[src]

Bit 7 - PLL0 lock lost value

pub fn rcfastlock(&self) -> RCFASTLOCK_R[src]

Bit 13 - RCFAST Locked on Accurate value

pub fn rcfastlocklost(&self) -> RCFASTLOCKLOST_R[src]

Bit 14 - RCFAST lock lost value

impl R<u32, Reg<u32, _PLLIFAVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant nubmer

impl R<u32, Reg<u32, _PLL>>[src]

pub fn pllen(&self) -> PLLEN_R[src]

Bit 0 - PLL Enable

pub fn pllosc(&self) -> PLLOSC_R[src]

Bits 1:2 - PLL Oscillator Select

pub fn pllopt(&self) -> PLLOPT_R[src]

Bits 3:5 - PLL Option

pub fn plldiv(&self) -> PLLDIV_R[src]

Bits 8:11 - PLL Division Factor

pub fn pllmul(&self) -> PLLMUL_R[src]

Bits 16:19 - PLL Multiply Factor

pub fn pllcount(&self) -> PLLCOUNT_R[src]

Bits 24:29 - PLL Count

impl R<u32, Reg<u32, _RCCR>>[src]

pub fn calib(&self) -> CALIB_R[src]

Bits 0:9 - Calibration Value

pub fn fcd(&self) -> FCD_R[src]

Bit 16 - Flash Calibration Done

impl R<u32, Reg<u32, _RCFASTCFG>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Oscillator Enable

pub fn tuneen(&self) -> TUNEEN_R[src]

Bit 1 - Tuner Enable

pub fn jitmode(&self) -> JITMODE_R[src]

Bit 2 - Jitter Mode

pub fn nbperiods(&self) -> NBPERIODS_R[src]

Bits 4:6 - Number of 32kHz Periods

pub fn fcd(&self) -> FCD_R[src]

Bit 7 - RCFAST Fuse Calibration Done

pub fn frange(&self) -> FRANGE_R[src]

Bits 8:9 - Frequency Range

pub fn lockmargin(&self) -> LOCKMARGIN_R[src]

Bits 12:15 - Accepted Count Error for Lock

pub fn calib(&self) -> CALIB_R[src]

Bits 16:22 - Oscillator Calibration Value

impl R<u32, Reg<u32, _RCFASTSR>>[src]

pub fn curtrim(&self) -> CURTRIM_R[src]

Bits 0:6 - Current Trim Value

pub fn cnterr(&self) -> CNTERR_R[src]

Bits 16:20 - Current Count Error

pub fn sign(&self) -> SIGN_R[src]

Bit 21 - Sign of Current Count Error

pub fn lock(&self) -> LOCK_R[src]

Bit 24 - Lock

pub fn locklost(&self) -> LOCKLOST_R[src]

Bit 25 - Lock Lost

pub fn updated(&self) -> UPDATED_R[src]

Bit 31 - Current Trim Value Updated

impl R<u32, Reg<u32, _RCFASTVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<u32, Reg<u32, _RCOSCIFAVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<u32, Reg<u32, _RC80MCR>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - Enable

pub fn fcd(&self) -> FCD_R[src]

Bit 7 - Flash Calibration Done

pub fn calib(&self) -> CALIB_R[src]

Bits 16:17 - Calibration Value

impl R<u32, Reg<u32, _RC80MVERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<u32, Reg<u32, _ADDR>>[src]

pub fn addr(&self) -> ADDR_R[src]

Bits 2:31 - Address Value

impl R<u32, Reg<u32, _CIDR>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:4 - Version of the Device

pub fn eproc(&self) -> EPROC_R[src]

Bits 5:7 - Embedded Processor

pub fn nvpsiz(&self) -> NVPSIZ_R[src]

Bits 8:11 - Nonvolatile Program Memory Size

pub fn nvpsiz2(&self) -> NVPSIZ2_R[src]

Bits 12:15 - Second Nonvolatile Program Memory Size

pub fn sramsiz(&self) -> SRAMSIZ_R[src]

Bits 16:20 - Internal SRAM Size

pub fn arch(&self) -> ARCH_R[src]

Bits 21:27 - Architecture Identifier

pub fn nvptyp(&self) -> NVPTYP_R[src]

Bits 28:30 - Nonvolatile Program Memory Type

pub fn ext(&self) -> EXT_R[src]

Bit 31 - Extension Flag

impl R<u32, Reg<u32, _DATA>>[src]

pub fn data(&self) -> DATA_R[src]

Bits 0:31 - Generic data register

impl R<u32, Reg<u32, _EXID>>[src]

pub fn exid(&self) -> EXID_R[src]

Bits 0:31 - Chip ID Extension

impl R<u32, Reg<u32, _IDR>>[src]

pub fn apidv(&self) -> APIDV_R[src]

Bits 0:3 - AP Identification Variant

pub fn apid(&self) -> APID_R[src]

Bits 4:7 - AP Identification

pub fn clss(&self) -> CLSS_R[src]

Bit 16 - Class

pub fn ic(&self) -> IC_R[src]

Bits 17:23 - JEP-106 Identity Code

pub fn cc(&self) -> CC_R[src]

Bits 24:27 - JEP-106 Continuation Code

pub fn revision(&self) -> REVISION_R[src]

Bits 28:31 - Revision

impl R<u32, Reg<u32, _LENGTH>>[src]

pub fn length(&self) -> LENGTH_R[src]

Bits 2:31 - Length Register

impl R<u32, Reg<u32, _SR>>[src]

pub fn done(&self) -> DONE_R[src]

Bit 0 - Operation done

pub fn hcr(&self) -> HCR_R[src]

Bit 1 - Hold Core reset

pub fn berr(&self) -> BERR_R[src]

Bit 2 - Bus error

pub fn fail(&self) -> FAIL_R[src]

Bit 3 - Failure

pub fn lck(&self) -> LCK_R[src]

Bit 4 - Lock

pub fn en(&self) -> EN_R[src]

Bit 8 - Enabled

pub fn prot(&self) -> PROT_R[src]

Bit 9 - Protected

pub fn dbgp(&self) -> DBGP_R[src]

Bit 10 - Debugger Present

pub fn state(&self) -> STATE_R[src]

Bits 24:26 - State

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<bool, CPOL_A>[src]

pub fn variant(&self) -> CPOL_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, NCPHA_A>[src]

pub fn variant(&self) -> NCPHA_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CSAAT_A>[src]

pub fn variant(&self) -> CSAAT_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, BITS_A>[src]

pub fn variant(&self) -> Variant<u8, BITS_A>[src]

Get enumerated values variant

pub fn is_8_bpt(&self) -> bool[src]

Checks if the value of the field is _8_BPT

pub fn is_9_bpt(&self) -> bool[src]

Checks if the value of the field is _9_BPT

pub fn is_10_bpt(&self) -> bool[src]

Checks if the value of the field is _10_BPT

pub fn is_11_bpt(&self) -> bool[src]

Checks if the value of the field is _11_BPT

pub fn is_12_bpt(&self) -> bool[src]

Checks if the value of the field is _12_BPT

pub fn is_13_bpt(&self) -> bool[src]

Checks if the value of the field is _13_BPT

pub fn is_14_bpt(&self) -> bool[src]

Checks if the value of the field is _14_BPT

pub fn is_15_bpt(&self) -> bool[src]

Checks if the value of the field is _15_BPT

pub fn is_16_bpt(&self) -> bool[src]

Checks if the value of the field is _16_BPT

impl R<u32, Reg<u32, _CSR>>[src]

pub fn cpol(&self) -> CPOL_R[src]

Bit 0 - Clock Polarity

pub fn ncpha(&self) -> NCPHA_R[src]

Bit 1 - Clock Phase

pub fn csnaat(&self) -> CSNAAT_R[src]

Bit 2 - Chip Select Not Active After Transfer

pub fn csaat(&self) -> CSAAT_R[src]

Bit 3 - Chip Select Active After Transfer

pub fn bits_(&self) -> BITS_R[src]

Bits 4:7 - Bits Per Transfer

pub fn scbr(&self) -> SCBR_R[src]

Bits 8:15 - Serial Clock Baud Rate

pub fn dlybs(&self) -> DLYBS_R[src]

Bits 16:23 - Delay Before SPCK

pub fn dlybct(&self) -> DLYBCT_R[src]

Bits 24:31 - Delay Between Consecutive Transfers

impl R<u32, Reg<u32, _FEATURES>>[src]

pub fn ncs(&self) -> NCS_R[src]

Bits 0:3 - Number of Chip Selects

pub fn pconf(&self) -> PCONF_R[src]

Bit 4 - Polarity is Configurable

pub fn ppnconf(&self) -> PPNCONF_R[src]

Bit 5 - Polarity is Positive if Polarity is not Configurable

pub fn phconf(&self) -> PHCONF_R[src]

Bit 6 - Phase is Configurable

pub fn phznconf(&self) -> PHZNCONF_R[src]

Bit 7 - Phase is Zero if Phase is not Configurable

pub fn lenconf(&self) -> LENCONF_R[src]

Bit 8 - Character Length is Configurable

pub fn lennconf(&self) -> LENNCONF_R[src]

Bits 9:15 - Character Length if not Configurable

pub fn extdec(&self) -> EXTDEC_R[src]

Bit 16 - External Decoder is True

pub fn csnaatimpl(&self) -> CSNAATIMPL_R[src]

Bit 17 - CSNAAT Features are Implemented

pub fn brpbhsb(&self) -> BRPBHSB_R[src]

Bit 18 - Bridge Type is PB to HSB

pub fn fiforimpl(&self) -> FIFORIMPL_R[src]

Bit 19 - FIFO in Reception is Implemented

pub fn swpimpl(&self) -> SWPIMPL_R[src]

Bit 20 - Spurious Write Protection is Implemented

impl R<bool, RDRF_A>[src]

pub fn variant(&self) -> RDRF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TDRE_A>[src]

pub fn variant(&self) -> TDRE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, MODF_A>[src]

pub fn variant(&self) -> MODF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, OVRES_A>[src]

pub fn variant(&self) -> OVRES_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ENDRX_A>[src]

pub fn variant(&self) -> ENDRX_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ENDTX_A>[src]

pub fn variant(&self) -> ENDTX_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RXBUFF_A>[src]

pub fn variant(&self) -> RXBUFF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXBUFE_A>[src]

pub fn variant(&self) -> TXBUFE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, NSSR_A>[src]

pub fn variant(&self) -> NSSR_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXEMPTY_A>[src]

pub fn variant(&self) -> TXEMPTY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rdrf(&self) -> RDRF_R[src]

Bit 0 - Receive Data Register Full Interrupt Mask

pub fn tdre(&self) -> TDRE_R[src]

Bit 1 - Transmit Data Register Empty Interrupt Mask

pub fn modf(&self) -> MODF_R[src]

Bit 2 - Mode Fault Error Interrupt Mask

pub fn ovres(&self) -> OVRES_R[src]

Bit 3 - Overrun Error Interrupt Mask

pub fn endrx(&self) -> ENDRX_R[src]

Bit 4 - End of Receive Buffer Interrupt Mask

pub fn endtx(&self) -> ENDTX_R[src]

Bit 5 - End of Transmit Buffer Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 6 - Receive Buffer Full Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 7 - Transmit Buffer Empty Interrupt Mask

pub fn nssr(&self) -> NSSR_R[src]

Bit 8 - NSS Rising Interrupt Mask

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmission Registers Empty Mask

pub fn undes(&self) -> UNDES_R[src]

Bit 10 - Underrun Error Interrupt Mask

impl R<bool, MSTR_A>[src]

pub fn variant(&self) -> MSTR_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, PS_A>[src]

pub fn variant(&self) -> PS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, PCSDEC_A>[src]

pub fn variant(&self) -> PCSDEC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, MODFDIS_A>[src]

pub fn variant(&self) -> MODFDIS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, LLB_A>[src]

pub fn variant(&self) -> LLB_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _MR>>[src]

pub fn mstr(&self) -> MSTR_R[src]

Bit 0 - Master/Slave Mode

pub fn ps(&self) -> PS_R[src]

Bit 1 - Peripheral Select

pub fn pcsdec(&self) -> PCSDEC_R[src]

Bit 2 - Chip Select Decode

pub fn modfdis(&self) -> MODFDIS_R[src]

Bit 4 - Mode Fault Detection

pub fn wdrbt(&self) -> WDRBT_R[src]

Bit 5 - wait data read before transfer

pub fn rxfifoen(&self) -> RXFIFOEN_R[src]

Bit 6 - FIFO in Reception Enable

pub fn llb(&self) -> LLB_R[src]

Bit 7 - Local Loopback Enable

pub fn pcs(&self) -> PCS_R[src]

Bits 16:19 - Peripheral Chip Select

pub fn dlybcs(&self) -> DLYBCS_R[src]

Bits 24:31 - Delay Between Chip Selects

impl R<u32, Reg<u32, _RDR>>[src]

pub fn rd(&self) -> RD_R[src]

Bits 0:15 - Receive Data

pub fn pcs(&self) -> PCS_R[src]

Bits 16:19 - Peripheral Chip Select

impl R<bool, RDRF_A>[src]

pub fn variant(&self) -> RDRF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TDRE_A>[src]

pub fn variant(&self) -> TDRE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, MODF_A>[src]

pub fn variant(&self) -> MODF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, OVRES_A>[src]

pub fn variant(&self) -> OVRES_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ENDRX_A>[src]

pub fn variant(&self) -> ENDRX_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ENDTX_A>[src]

pub fn variant(&self) -> ENDTX_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RXBUFF_A>[src]

pub fn variant(&self) -> RXBUFF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXBUFE_A>[src]

pub fn variant(&self) -> TXBUFE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, NSSR_A>[src]

pub fn variant(&self) -> NSSR_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXEMPTY_A>[src]

pub fn variant(&self) -> TXEMPTY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, SPIENS_A>[src]

pub fn variant(&self) -> SPIENS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _SR>>[src]

pub fn rdrf(&self) -> RDRF_R[src]

Bit 0 - Receive Data Register Full

pub fn tdre(&self) -> TDRE_R[src]

Bit 1 - Transmit Data Register Empty

pub fn modf(&self) -> MODF_R[src]

Bit 2 - Mode Fault Error

pub fn ovres(&self) -> OVRES_R[src]

Bit 3 - Overrun Error Status

pub fn endrx(&self) -> ENDRX_R[src]

Bit 4 - End of RX buffer

pub fn endtx(&self) -> ENDTX_R[src]

Bit 5 - End of TX buffer

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 6 - RX Buffer Full

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 7 - TX Buffer Empty

pub fn nssr(&self) -> NSSR_R[src]

Bit 8 - NSS Rising

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmission Registers Empty

pub fn undes(&self) -> UNDES_R[src]

Bit 10 - Underrun Error Status (Slave Mode Only)

pub fn spiens(&self) -> SPIENS_R[src]

Bit 16 - SPI Enable Status

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version

pub fn mfn(&self) -> MFN_R[src]

Bits 16:18 - mfn

impl R<u32, WPKEY_A>[src]

pub fn variant(&self) -> Variant<u32, WPKEY_A>[src]

Get enumerated values variant

pub fn is_value(&self) -> bool[src]

Checks if the value of the field is VALUE

impl R<u32, Reg<u32, _WPCR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protection Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protection Key Password

impl R<u8, WPVS_A>[src]

pub fn variant(&self) -> Variant<u8, WPVS_A>[src]

Get enumerated values variant

pub fn is_write_with_wp(&self) -> bool[src]

Checks if the value of the field is WRITE_WITH_WP

pub fn is_swrst_with_wp(&self) -> bool[src]

Checks if the value of the field is SWRST_WITH_WP

pub fn is_unexpected_write(&self) -> bool[src]

Checks if the value of the field is UNEXPECTED_WRITE

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpvs(&self) -> WPVS_R[src]

Bits 0:2 - Write Protection Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:15 - Write Protection Violation Source

impl R<u8, TC0XC0S_A>[src]

pub fn variant(&self) -> TC0XC0S_A[src]

Get enumerated values variant

pub fn is_tclk0(&self) -> bool[src]

Checks if the value of the field is TCLK0

pub fn is_no_clk(&self) -> bool[src]

Checks if the value of the field is NO_CLK

pub fn is_tioa1(&self) -> bool[src]

Checks if the value of the field is TIOA1

pub fn is_tioa2(&self) -> bool[src]

Checks if the value of the field is TIOA2

impl R<u8, TC1XC1S_A>[src]

pub fn variant(&self) -> TC1XC1S_A[src]

Get enumerated values variant

pub fn is_tclk1(&self) -> bool[src]

Checks if the value of the field is TCLK1

pub fn is_no_clk(&self) -> bool[src]

Checks if the value of the field is NO_CLK

pub fn is_tioa0(&self) -> bool[src]

Checks if the value of the field is TIOA0

pub fn is_tioa2(&self) -> bool[src]

Checks if the value of the field is TIOA2

impl R<u8, TC2XC2S_A>[src]

pub fn variant(&self) -> TC2XC2S_A[src]

Get enumerated values variant

pub fn is_tclk2(&self) -> bool[src]

Checks if the value of the field is TCLK2

pub fn is_no_clk(&self) -> bool[src]

Checks if the value of the field is NO_CLK

pub fn is_tioa0(&self) -> bool[src]

Checks if the value of the field is TIOA0

pub fn is_tioa1(&self) -> bool[src]

Checks if the value of the field is TIOA1

impl R<u32, Reg<u32, _BMR>>[src]

pub fn tc0xc0s(&self) -> TC0XC0S_R[src]

Bits 0:1 - External Clock Signal 0 Selection

pub fn tc1xc1s(&self) -> TC1XC1S_R[src]

Bits 2:3 - External Clock Signal 1 Selection

pub fn tc2xc2s(&self) -> TC2XC2S_R[src]

Bits 4:5 - External Clock Signal 2 Selection

impl R<u8, TCCLKS_A>[src]

pub fn variant(&self) -> TCCLKS_A[src]

Get enumerated values variant

pub fn is_timer_clock1(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK1

pub fn is_timer_clock2(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK2

pub fn is_timer_clock3(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK3

pub fn is_timer_clock4(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK4

pub fn is_timer_clock5(&self) -> bool[src]

Checks if the value of the field is TIMER_CLOCK5

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<bool, CLKI_A>[src]

pub fn variant(&self) -> CLKI_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, BURST_A>[src]

pub fn variant(&self) -> BURST_A[src]

Get enumerated values variant

pub fn is_not_gated(&self) -> bool[src]

Checks if the value of the field is NOT_GATED

pub fn is_clk_and_xc0(&self) -> bool[src]

Checks if the value of the field is CLK_AND_XC0

pub fn is_clk_and_xc1(&self) -> bool[src]

Checks if the value of the field is CLK_AND_XC1

pub fn is_clk_and_xc2(&self) -> bool[src]

Checks if the value of the field is CLK_AND_XC2

impl R<bool, LDBSTOP_A>[src]

pub fn variant(&self) -> LDBSTOP_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, LDBDIS_A>[src]

pub fn variant(&self) -> LDBDIS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, ETRGEDG_A>[src]

pub fn variant(&self) -> ETRGEDG_A[src]

Get enumerated values variant

pub fn is_no_edge(&self) -> bool[src]

Checks if the value of the field is NO_EDGE

pub fn is_pos_edge(&self) -> bool[src]

Checks if the value of the field is POS_EDGE

pub fn is_neg_edge(&self) -> bool[src]

Checks if the value of the field is NEG_EDGE

pub fn is_both_edges(&self) -> bool[src]

Checks if the value of the field is BOTH_EDGES

impl R<bool, ABETRG_A>[src]

pub fn variant(&self) -> ABETRG_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CPCTRG_A>[src]

pub fn variant(&self) -> CPCTRG_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, WAVE_A>[src]

pub fn variant(&self) -> WAVE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, LDRA_A>[src]

pub fn variant(&self) -> LDRA_A[src]

Get enumerated values variant

pub fn is_no_edge(&self) -> bool[src]

Checks if the value of the field is NO_EDGE

pub fn is_pos_edge_tioa(&self) -> bool[src]

Checks if the value of the field is POS_EDGE_TIOA

pub fn is_neg_edge_tioa(&self) -> bool[src]

Checks if the value of the field is NEG_EDGE_TIOA

pub fn is_both_edges_tioa(&self) -> bool[src]

Checks if the value of the field is BOTH_EDGES_TIOA

impl R<u8, LDRB_A>[src]

pub fn variant(&self) -> LDRB_A[src]

Get enumerated values variant

pub fn is_no_edge(&self) -> bool[src]

Checks if the value of the field is NO_EDGE

pub fn is_pos_edge_tioa(&self) -> bool[src]

Checks if the value of the field is POS_EDGE_TIOA

pub fn is_neg_edge_tioa(&self) -> bool[src]

Checks if the value of the field is NEG_EDGE_TIOA

pub fn is_both_edges_tioa(&self) -> bool[src]

Checks if the value of the field is BOTH_EDGES_TIOA

impl R<u32, Reg<u32, _CMR>>[src]

pub fn tcclks(&self) -> TCCLKS_R[src]

Bits 0:2 - Clock Selection

pub fn clki(&self) -> CLKI_R[src]

Bit 3 - Clock Invert

pub fn burst(&self) -> BURST_R[src]

Bits 4:5 - Burst Signal Selection

pub fn ldbstop(&self) -> LDBSTOP_R[src]

Bit 6 - Counter Clock Stopped with RB Loading

pub fn ldbdis(&self) -> LDBDIS_R[src]

Bit 7 - Counter Clock Disable with RB Loading

pub fn etrgedg(&self) -> ETRGEDG_R[src]

Bits 8:9 - External Trigger Edge Selection

pub fn abetrg(&self) -> ABETRG_R[src]

Bit 10 - TIOA or TIOB External Trigger Selection

pub fn cpctrg(&self) -> CPCTRG_R[src]

Bit 14 - RC Compare Trigger Enable

pub fn wave(&self) -> WAVE_R[src]

Bit 15 - Wave

pub fn ldra(&self) -> LDRA_R[src]

Bits 16:17 - RA Loading Selection

pub fn ldrb(&self) -> LDRB_R[src]

Bits 18:19 - RB Loading Selection

impl R<u8, TCCLKS_A>[src]

pub fn variant(&self) -> TCCLKS_A[src]

Get enumerated values variant

pub fn is_timer_div1_clock(&self) -> bool[src]

Checks if the value of the field is TIMER_DIV1_CLOCK

pub fn is_timer_div2_clock(&self) -> bool[src]

Checks if the value of the field is TIMER_DIV2_CLOCK

pub fn is_timer_div3_clock(&self) -> bool[src]

Checks if the value of the field is TIMER_DIV3_CLOCK

pub fn is_timer_div4_clock(&self) -> bool[src]

Checks if the value of the field is TIMER_DIV4_CLOCK

pub fn is_timer_div5_clock(&self) -> bool[src]

Checks if the value of the field is TIMER_DIV5_CLOCK

pub fn is_xc0(&self) -> bool[src]

Checks if the value of the field is XC0

pub fn is_xc1(&self) -> bool[src]

Checks if the value of the field is XC1

pub fn is_xc2(&self) -> bool[src]

Checks if the value of the field is XC2

impl R<bool, CLKI_A>[src]

pub fn variant(&self) -> CLKI_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, BURST_A>[src]

pub fn variant(&self) -> BURST_A[src]

Get enumerated values variant

pub fn is_not_gated(&self) -> bool[src]

Checks if the value of the field is NOT_GATED

pub fn is_clk_and_xc0(&self) -> bool[src]

Checks if the value of the field is CLK_AND_XC0

pub fn is_clk_and_xc1(&self) -> bool[src]

Checks if the value of the field is CLK_AND_XC1

pub fn is_clk_and_xc2(&self) -> bool[src]

Checks if the value of the field is CLK_AND_XC2

impl R<bool, CPCSTOP_A>[src]

pub fn variant(&self) -> CPCSTOP_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CPCDIS_A>[src]

pub fn variant(&self) -> CPCDIS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, EEVTEDG_A>[src]

pub fn variant(&self) -> EEVTEDG_A[src]

Get enumerated values variant

pub fn is_no_edge(&self) -> bool[src]

Checks if the value of the field is NO_EDGE

pub fn is_pos_edge(&self) -> bool[src]

Checks if the value of the field is POS_EDGE

pub fn is_neg_edge(&self) -> bool[src]

Checks if the value of the field is NEG_EDGE

pub fn is_both_edges(&self) -> bool[src]

Checks if the value of the field is BOTH_EDGES

impl R<u8, EEVT_A>[src]

pub fn variant(&self) -> EEVT_A[src]

Get enumerated values variant

pub fn is_tiob_input(&self) -> bool[src]

Checks if the value of the field is TIOB_INPUT

pub fn is_xc0_output(&self) -> bool[src]

Checks if the value of the field is XC0_OUTPUT

pub fn is_xc1_output(&self) -> bool[src]

Checks if the value of the field is XC1_OUTPUT

pub fn is_xc2_output(&self) -> bool[src]

Checks if the value of the field is XC2_OUTPUT

impl R<bool, ENETRG_A>[src]

pub fn variant(&self) -> ENETRG_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, WAVSEL_A>[src]

pub fn variant(&self) -> WAVSEL_A[src]

Get enumerated values variant

pub fn is_up_no_auto(&self) -> bool[src]

Checks if the value of the field is UP_NO_AUTO

pub fn is_updown_no_auto(&self) -> bool[src]

Checks if the value of the field is UPDOWN_NO_AUTO

pub fn is_up_auto(&self) -> bool[src]

Checks if the value of the field is UP_AUTO

pub fn is_updown_auto(&self) -> bool[src]

Checks if the value of the field is UPDOWN_AUTO

impl R<bool, WAVE_A>[src]

pub fn variant(&self) -> WAVE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, ACPA_A>[src]

pub fn variant(&self) -> ACPA_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, ACPC_A>[src]

pub fn variant(&self) -> ACPC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, AEEVT_A>[src]

pub fn variant(&self) -> AEEVT_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, ASWTRG_A>[src]

pub fn variant(&self) -> ASWTRG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BCPB_A>[src]

pub fn variant(&self) -> BCPB_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BCPC_A>[src]

pub fn variant(&self) -> BCPC_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BEEVT_A>[src]

pub fn variant(&self) -> BEEVT_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u8, BSWTRG_A>[src]

pub fn variant(&self) -> BSWTRG_A[src]

Get enumerated values variant

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_set(&self) -> bool[src]

Checks if the value of the field is SET

pub fn is_clear(&self) -> bool[src]

Checks if the value of the field is CLEAR

pub fn is_toggle(&self) -> bool[src]

Checks if the value of the field is TOGGLE

impl R<u32, Reg<u32, _CMR_ALT>>[src]

pub fn tcclks(&self) -> TCCLKS_R[src]

Bits 0:2 - Clock Selection

pub fn clki(&self) -> CLKI_R[src]

Bit 3 - Clock Invert

pub fn burst(&self) -> BURST_R[src]

Bits 4:5 - Burst Signal Selection

pub fn cpcstop(&self) -> CPCSTOP_R[src]

Bit 6 - Counter Clock Stopped with RC Compare

pub fn cpcdis(&self) -> CPCDIS_R[src]

Bit 7 - Counter Clock Disable with RC Compare

pub fn eevtedg(&self) -> EEVTEDG_R[src]

Bits 8:9 - External Event Edge Selection

pub fn eevt(&self) -> EEVT_R[src]

Bits 10:11 - External Event Selection

pub fn enetrg(&self) -> ENETRG_R[src]

Bit 12 - External Event Trigger Enable

pub fn wavsel(&self) -> WAVSEL_R[src]

Bits 13:14 - Waveform Selection

pub fn wave(&self) -> WAVE_R[src]

Bit 15 - WAVE

pub fn acpa(&self) -> ACPA_R[src]

Bits 16:17 - RA Compare Effect on TIOA

pub fn acpc(&self) -> ACPC_R[src]

Bits 18:19 - RC Compare Effect on TIOA

pub fn aeevt(&self) -> AEEVT_R[src]

Bits 20:21 - External Event Effect on TIOA

pub fn aswtrg(&self) -> ASWTRG_R[src]

Bits 22:23 - Software Trigger Effect on TIOA

pub fn bcpb(&self) -> BCPB_R[src]

Bits 24:25 - RB Compare Effect on TIOB

pub fn bcpc(&self) -> BCPC_R[src]

Bits 26:27 - RC Compare Effect on TIOB

pub fn beevt(&self) -> BEEVT_R[src]

Bits 28:29 - External Event Effect on TIOB

pub fn bswtrg(&self) -> BSWTRG_R[src]

Bits 30:31 - Software Trigger Effect on TIOB

impl R<u32, Reg<u32, _CV>>[src]

pub fn cv(&self) -> CV_R[src]

Bits 0:15 - Counter Value

impl R<u32, Reg<u32, _FEATURES>>[src]

pub fn ctrsize(&self) -> CTRSIZE_R[src]

Bits 0:7 - Counter Size

pub fn updnimpl(&self) -> UPDNIMPL_R[src]

Bit 8 - Up Down is Implemented

pub fn brpbhsb(&self) -> BRPBHSB_R[src]

Bit 9 - Bridge Type is PB to HSB

impl R<bool, COVFS_A>[src]

pub fn variant(&self) -> COVFS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, LOVRS_A>[src]

pub fn variant(&self) -> LOVRS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CPAS_A>[src]

pub fn variant(&self) -> CPAS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CPBS_A>[src]

pub fn variant(&self) -> CPBS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CPCS_A>[src]

pub fn variant(&self) -> CPCS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, LDRAS_A>[src]

pub fn variant(&self) -> LDRAS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, LDRBS_A>[src]

pub fn variant(&self) -> LDRBS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ETRGS_A>[src]

pub fn variant(&self) -> ETRGS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _IMR>>[src]

pub fn covfs(&self) -> COVFS_R[src]

Bit 0 - Counter Overflow

pub fn lovrs(&self) -> LOVRS_R[src]

Bit 1 - Load Overrun

pub fn cpas(&self) -> CPAS_R[src]

Bit 2 - RA Compare

pub fn cpbs(&self) -> CPBS_R[src]

Bit 3 - RB Compare

pub fn cpcs(&self) -> CPCS_R[src]

Bit 4 - RC Compare

pub fn ldras(&self) -> LDRAS_R[src]

Bit 5 - RA Loading

pub fn ldrbs(&self) -> LDRBS_R[src]

Bit 6 - RB Loading

pub fn etrgs(&self) -> ETRGS_R[src]

Bit 7 - External Trigger

impl R<u32, Reg<u32, _RA>>[src]

pub fn ra(&self) -> RA_R[src]

Bits 0:15 - Register A

impl R<u32, Reg<u32, _RB>>[src]

pub fn rb(&self) -> RB_R[src]

Bits 0:15 - Register B

impl R<u32, Reg<u32, _RC>>[src]

pub fn rc(&self) -> RC_R[src]

Bits 0:15 - Register C

impl R<u32, Reg<u32, _SMMR>>[src]

pub fn gcen(&self) -> GCEN_R[src]

Bit 0 - Gray Count Enable

pub fn down(&self) -> DOWN_R[src]

Bit 1 - Down Count

impl R<bool, COVFS_A>[src]

pub fn variant(&self) -> COVFS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, LOVRS_A>[src]

pub fn variant(&self) -> LOVRS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CPAS_A>[src]

pub fn variant(&self) -> CPAS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CPBS_A>[src]

pub fn variant(&self) -> CPBS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CPCS_A>[src]

pub fn variant(&self) -> CPCS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, LDRAS_A>[src]

pub fn variant(&self) -> LDRAS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, LDRBS_A>[src]

pub fn variant(&self) -> LDRBS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ETRGS_A>[src]

pub fn variant(&self) -> ETRGS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CLKSTA_A>[src]

pub fn variant(&self) -> CLKSTA_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, MTIOA_A>[src]

pub fn variant(&self) -> MTIOA_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, MTIOB_A>[src]

pub fn variant(&self) -> MTIOB_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _SR>>[src]

pub fn covfs(&self) -> COVFS_R[src]

Bit 0 - Counter Overflow Status

pub fn lovrs(&self) -> LOVRS_R[src]

Bit 1 - Load Overrun Status

pub fn cpas(&self) -> CPAS_R[src]

Bit 2 - RA Compare Status

pub fn cpbs(&self) -> CPBS_R[src]

Bit 3 - RB Compare Status

pub fn cpcs(&self) -> CPCS_R[src]

Bit 4 - RC Compare Status

pub fn ldras(&self) -> LDRAS_R[src]

Bit 5 - RA Loading Status

pub fn ldrbs(&self) -> LDRBS_R[src]

Bit 6 - RB Loading Status

pub fn etrgs(&self) -> ETRGS_R[src]

Bit 7 - External Trigger Status

pub fn clksta(&self) -> CLKSTA_R[src]

Bit 16 - Clock Enabling Status

pub fn mtioa(&self) -> MTIOA_R[src]

Bit 17 - TIOA Mirror

pub fn mtiob(&self) -> MTIOB_R[src]

Bit 18 - TIOB Mirror

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Reserved. Value subject to change. No functionality associated. This is the Atmel internal version of the macrocell.

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Reserved. Value subject to change. No functionality associated.

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protect Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protect Key

impl R<u32, Reg<u32, _IMR>>[src]

pub fn datrdy(&self) -> DATRDY_R[src]

Bit 0 - Data Ready Interrupt Mask

impl R<u32, Reg<u32, _ISR>>[src]

pub fn datrdy(&self) -> DATRDY_R[src]

Bit 0 - Data Ready Interrupt Status

impl R<u32, Reg<u32, _ODATA>>[src]

pub fn odata(&self) -> ODATA_R[src]

Bit 0 - Output Data

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:18 - Variant Number

impl R<u32, Reg<u32, _CMDR>>[src]

pub fn read(&self) -> READ_R[src]

Bit 0 - Transfer Direction

pub fn sadr(&self) -> SADR_R[src]

Bits 1:10 - Slave Address

pub fn tenbit(&self) -> TENBIT_R[src]

Bit 11 - Ten Bit Addressing Mode

pub fn repsame(&self) -> REPSAME_R[src]

Bit 12 - Transfer is to same address as previous address

pub fn start(&self) -> START_R[src]

Bit 13 - Send START condition

pub fn stop(&self) -> STOP_R[src]

Bit 14 - Send STOP condition

pub fn valid(&self) -> VALID_R[src]

Bit 15 - CMDR Valid

pub fn nbytes(&self) -> NBYTES_R[src]

Bits 16:23 - Number of data bytes in transfer

pub fn pecen(&self) -> PECEN_R[src]

Bit 24 - Packet Error Checking Enable

pub fn acklast(&self) -> ACKLAST_R[src]

Bit 25 - ACK Last Master RX Byte

pub fn hs(&self) -> HS_R[src]

Bit 26 - HS-mode

pub fn hsmcode(&self) -> HSMCODE_R[src]

Bits 28:30 - HS-mode Master Code

impl R<u32, Reg<u32, _CWGR>>[src]

pub fn low(&self) -> LOW_R[src]

Bits 0:7 - Clock Low Cycles

pub fn high(&self) -> HIGH_R[src]

Bits 8:15 - Clock High Cycles

pub fn stasto(&self) -> STASTO_R[src]

Bits 16:23 - START and STOP Cycles

pub fn data(&self) -> DATA_R[src]

Bits 24:27 - Data Setup and Hold Cycles

pub fn exp(&self) -> EXP_R[src]

Bits 28:30 - Clock Prescaler

impl R<u32, Reg<u32, _HSCWGR>>[src]

pub fn low(&self) -> LOW_R[src]

Bits 0:7 - Clock Low Cycles

pub fn high(&self) -> HIGH_R[src]

Bits 8:15 - Clock High Cycles

pub fn stasto(&self) -> STASTO_R[src]

Bits 16:23 - START and STOP Cycles

pub fn data(&self) -> DATA_R[src]

Bits 24:27 - Data Setup and Hold Cycles

pub fn exp(&self) -> EXP_R[src]

Bits 28:30 - Clock Prescaler

impl R<u32, Reg<u32, _HSSRR>>[src]

pub fn dadrivel(&self) -> DADRIVEL_R[src]

Bits 0:2 - Data Drive Strength LOW

pub fn daslew(&self) -> DASLEW_R[src]

Bits 8:9 - Data Slew Limit

pub fn cldrivel(&self) -> CLDRIVEL_R[src]

Bits 16:18 - Clock Drive Strength LOW

pub fn cldriveh(&self) -> CLDRIVEH_R[src]

Bits 20:21 - Clock Drive Strength HIGH

pub fn clslew(&self) -> CLSLEW_R[src]

Bits 24:25 - Clock Slew Limit

pub fn filter(&self) -> FILTER_R[src]

Bits 28:29 - Input Spike Filter Control

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - RHR Data Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - THR Data Ready

pub fn crdy(&self) -> CRDY_R[src]

Bit 2 - Ready for More Commands

pub fn ccomp(&self) -> CCOMP_R[src]

Bit 3 - Command Complete

pub fn idle(&self) -> IDLE_R[src]

Bit 4 - Master Interface is Idle

pub fn busfree(&self) -> BUSFREE_R[src]

Bit 5 - Two-wire Bus is Free

pub fn anak(&self) -> ANAK_R[src]

Bit 8 - NAK in Address Phase Received

pub fn dnak(&self) -> DNAK_R[src]

Bit 9 - NAK in Data Phase Received

pub fn arblst(&self) -> ARBLST_R[src]

Bit 10 - Arbitration Lost

pub fn smbalert(&self) -> SMBALERT_R[src]

Bit 11 - SMBus Alert

pub fn tout(&self) -> TOUT_R[src]

Bit 12 - Timeout

pub fn pecerr(&self) -> PECERR_R[src]

Bit 13 - PEC Error

pub fn stop(&self) -> STOP_R[src]

Bit 14 - Stop Request Accepted

pub fn hsmcack(&self) -> HSMCACK_R[src]

Bit 17 - ACK in HS-mode Master Code Phase Received

impl R<u32, Reg<u32, _NCMDR>>[src]

pub fn read(&self) -> READ_R[src]

Bit 0 - Transfer Direction

pub fn sadr(&self) -> SADR_R[src]

Bits 1:10 - Slave Address

pub fn tenbit(&self) -> TENBIT_R[src]

Bit 11 - Ten Bit Addressing Mode

pub fn repsame(&self) -> REPSAME_R[src]

Bit 12 - Transfer is to same address as previous address

pub fn start(&self) -> START_R[src]

Bit 13 - Send START condition

pub fn stop(&self) -> STOP_R[src]

Bit 14 - Send STOP condition

pub fn valid(&self) -> VALID_R[src]

Bit 15 - CMDR Valid

pub fn nbytes(&self) -> NBYTES_R[src]

Bits 16:23 - Number of data bytes in transfer

pub fn pecen(&self) -> PECEN_R[src]

Bit 24 - Packet Error Checking Enable

pub fn acklast(&self) -> ACKLAST_R[src]

Bit 25 - ACK Last Master RX Byte

pub fn hs(&self) -> HS_R[src]

Bit 26 - HS-mode

pub fn hsmcode(&self) -> HSMCODE_R[src]

Bits 28:30 - HS-mode Master Code

impl R<u32, Reg<u32, _PR>>[src]

pub fn hs(&self) -> HS_R[src]

Bit 0 - HS-mode

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rxdata(&self) -> RXDATA_R[src]

Bits 0:7 - Received Data

impl R<u32, Reg<u32, _SMBTR>>[src]

pub fn tlows(&self) -> TLOWS_R[src]

Bits 0:7 - Slave Clock stretch maximum cycles

pub fn tlowm(&self) -> TLOWM_R[src]

Bits 8:15 - Master Clock stretch maximum cycles

pub fn thmax(&self) -> THMAX_R[src]

Bits 16:23 - Clock High maximum cycles

pub fn exp(&self) -> EXP_R[src]

Bits 28:31 - SMBus Timeout Clock prescaler

impl R<u32, Reg<u32, _SR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - RHR Data Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - THR Data Ready

pub fn crdy(&self) -> CRDY_R[src]

Bit 2 - Ready for More Commands

pub fn ccomp(&self) -> CCOMP_R[src]

Bit 3 - Command Complete

pub fn idle(&self) -> IDLE_R[src]

Bit 4 - Master Interface is Idle

pub fn busfree(&self) -> BUSFREE_R[src]

Bit 5 - Two-wire Bus is Free

pub fn anak(&self) -> ANAK_R[src]

Bit 8 - NAK in Address Phase Received

pub fn dnak(&self) -> DNAK_R[src]

Bit 9 - NAK in Data Phase Received

pub fn arblst(&self) -> ARBLST_R[src]

Bit 10 - Arbitration Lost

pub fn smbalert(&self) -> SMBALERT_R[src]

Bit 11 - SMBus Alert

pub fn tout(&self) -> TOUT_R[src]

Bit 12 - Timeout

pub fn pecerr(&self) -> PECERR_R[src]

Bit 13 - PEC Error

pub fn stop(&self) -> STOP_R[src]

Bit 14 - Stop Request Accepted

pub fn menb(&self) -> MENB_R[src]

Bit 16 - Master Interface Enable

pub fn hsmcack(&self) -> HSMCACK_R[src]

Bit 17 - ACK in HS-mode Master Code Phase Received

impl R<u32, Reg<u32, _SRR>>[src]

pub fn dadrivel(&self) -> DADRIVEL_R[src]

Bits 0:2 - Data Drive Strength LOW

pub fn daslew(&self) -> DASLEW_R[src]

Bits 8:9 - Data Slew Limit

pub fn cldrivel(&self) -> CLDRIVEL_R[src]

Bits 16:18 - Clock Drive Strength LOW

pub fn clslew(&self) -> CLSLEW_R[src]

Bits 24:25 - Clock Slew Limit

pub fn filter(&self) -> FILTER_R[src]

Bits 28:29 - Input Spike Filter Control

impl R<u32, Reg<u32, _VR>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

impl R<u32, Reg<u32, _CR>>[src]

pub fn sen(&self) -> SEN_R[src]

Bit 0 - Slave Enable

pub fn smen(&self) -> SMEN_R[src]

Bit 1 - SMBus Mode Enable

pub fn smatch(&self) -> SMATCH_R[src]

Bit 2 - Slave Address Match

pub fn gcmatch(&self) -> GCMATCH_R[src]

Bit 3 - General Call Address Match

pub fn stren(&self) -> STREN_R[src]

Bit 4 - Clock Stretch Enable

pub fn swrst(&self) -> SWRST_R[src]

Bit 7 - Software Reset

pub fn smbalert(&self) -> SMBALERT_R[src]

Bit 8 - SMBus Alert

pub fn smda(&self) -> SMDA_R[src]

Bit 9 - SMBus Default Address

pub fn smhh(&self) -> SMHH_R[src]

Bit 10 - SMBus Host Header

pub fn pecen(&self) -> PECEN_R[src]

Bit 11 - Packet Error Checking Enable

pub fn ack(&self) -> ACK_R[src]

Bit 12 - Slave Receiver Data Phase ACK Value

pub fn cup(&self) -> CUP_R[src]

Bit 13 - NBYTES Count Up

pub fn soam(&self) -> SOAM_R[src]

Bit 14 - Stretch Clock on Address Match

pub fn sodr(&self) -> SODR_R[src]

Bit 15 - Stretch Clock on Data Byte Reception

pub fn adr(&self) -> ADR_R[src]

Bits 16:25 - Slave Address

pub fn tenbit(&self) -> TENBIT_R[src]

Bit 26 - Ten Bit Address Match

pub fn bridge(&self) -> BRIDGE_R[src]

Bit 27 - Bridge Control Enable

impl R<u32, Reg<u32, _HSSRR>>[src]

pub fn dadrivel(&self) -> DADRIVEL_R[src]

Bits 0:2 - Data Drive Strength LOW

pub fn daslew(&self) -> DASLEW_R[src]

Bits 8:9 - Data Slew Limit

pub fn filter(&self) -> FILTER_R[src]

Bits 28:29 - Input Spike Filter Control

impl R<u32, Reg<u32, _HSTR>>[src]

pub fn hddat(&self) -> HDDAT_R[src]

Bits 16:23 - Data Hold Cycles

impl R<u32, Reg<u32, _IMR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - RX Buffer Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - TX Buffer Ready

pub fn tcomp(&self) -> TCOMP_R[src]

Bit 3 - Transmission Complete

pub fn urun(&self) -> URUN_R[src]

Bit 6 - Underrun

pub fn orun(&self) -> ORUN_R[src]

Bit 7 - Overrun

pub fn nak(&self) -> NAK_R[src]

Bit 8 - NAK Received

pub fn smbtout(&self) -> SMBTOUT_R[src]

Bit 12 - SMBus Timeout

pub fn smbpecerr(&self) -> SMBPECERR_R[src]

Bit 13 - SMBus PEC Error

pub fn buserr(&self) -> BUSERR_R[src]

Bit 14 - Bus Error

pub fn sam(&self) -> SAM_R[src]

Bit 16 - Slave Address Match

pub fn gcm(&self) -> GCM_R[src]

Bit 17 - General Call Match

pub fn smbalertm(&self) -> SMBALERTM_R[src]

Bit 18 - SMBus Alert Response Address Match

pub fn smbhhm(&self) -> SMBHHM_R[src]

Bit 19 - SMBus Host Header Address Match

pub fn smbdam(&self) -> SMBDAM_R[src]

Bit 20 - SMBus Default Address Match

pub fn sto(&self) -> STO_R[src]

Bit 21 - Stop Received

pub fn rep(&self) -> REP_R[src]

Bit 22 - Repeated Start Received

pub fn btf(&self) -> BTF_R[src]

Bit 23 - Byte Transfer Finished

impl R<u32, Reg<u32, _NBYTES>>[src]

pub fn nbytes(&self) -> NBYTES_R[src]

Bits 0:7 - Number of Bytes to Transfer

impl R<u32, Reg<u32, _PECR>>[src]

pub fn pec(&self) -> PEC_R[src]

Bits 0:7 - Calculated PEC Value

impl R<u32, Reg<u32, _PR>>[src]

pub fn hs(&self) -> HS_R[src]

Bit 0 - HS-mode

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rxdata(&self) -> RXDATA_R[src]

Bits 0:7 - Received Data Byte

impl R<u32, Reg<u32, _SR>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - RX Buffer Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - TX Buffer Ready

pub fn sen(&self) -> SEN_R[src]

Bit 2 - Slave Enabled

pub fn tcomp(&self) -> TCOMP_R[src]

Bit 3 - Transmission Complete

pub fn tra(&self) -> TRA_R[src]

Bit 5 - Transmitter Mode

pub fn urun(&self) -> URUN_R[src]

Bit 6 - Underrun

pub fn orun(&self) -> ORUN_R[src]

Bit 7 - Overrun

pub fn nak(&self) -> NAK_R[src]

Bit 8 - NAK Received

pub fn smbtout(&self) -> SMBTOUT_R[src]

Bit 12 - SMBus Timeout

pub fn smbpecerr(&self) -> SMBPECERR_R[src]

Bit 13 - SMBus PEC Error

pub fn buserr(&self) -> BUSERR_R[src]

Bit 14 - Bus Error

pub fn sam(&self) -> SAM_R[src]

Bit 16 - Slave Address Match

pub fn gcm(&self) -> GCM_R[src]

Bit 17 - General Call Match

pub fn smbalertm(&self) -> SMBALERTM_R[src]

Bit 18 - SMBus Alert Response Address Match

pub fn smbhhm(&self) -> SMBHHM_R[src]

Bit 19 - SMBus Host Header Address Match

pub fn smbdam(&self) -> SMBDAM_R[src]

Bit 20 - SMBus Default Address Match

pub fn sto(&self) -> STO_R[src]

Bit 21 - Stop Received

pub fn rep(&self) -> REP_R[src]

Bit 22 - Repeated Start Received

pub fn btf(&self) -> BTF_R[src]

Bit 23 - Byte Transfer Finished

impl R<u32, Reg<u32, _SRR>>[src]

pub fn dadrivel(&self) -> DADRIVEL_R[src]

Bits 0:2 - Data Drive Strength LOW

pub fn daslew(&self) -> DASLEW_R[src]

Bits 8:9 - Data Slew Limit

pub fn filter(&self) -> FILTER_R[src]

Bits 28:29 - Input Spike Filter Control

impl R<u32, Reg<u32, _TR>>[src]

pub fn tlows(&self) -> TLOWS_R[src]

Bits 0:7 - SMBus Tlow:sext Cycles

pub fn ttout(&self) -> TTOUT_R[src]

Bits 8:15 - SMBus Ttimeout Cycles

pub fn sudat(&self) -> SUDAT_R[src]

Bits 16:23 - Data Setup Cycles

pub fn exp(&self) -> EXP_R[src]

Bits 28:31 - Clock Prescaler

impl R<u32, Reg<u32, _VR>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant Number

impl R<u16, CD_A>[src]

pub fn variant(&self) -> Variant<u16, CD_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

pub fn is_bypass(&self) -> bool[src]

Checks if the value of the field is BYPASS

pub fn is_2(&self) -> bool[src]

Checks if the value of the field is _2

impl R<u8, FP_A>[src]

pub fn variant(&self) -> Variant<u8, FP_A>[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

impl R<u32, Reg<u32, _BRGR>>[src]

pub fn cd(&self) -> CD_R[src]

Bits 0:15 - Clock Divisor

pub fn fp(&self) -> FP_R[src]

Bits 16:18 - Fractional Part

impl R<bool, RXRDY_A>[src]

pub fn variant(&self) -> RXRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXRDY_A>[src]

pub fn variant(&self) -> TXRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RXBRK_A>[src]

pub fn variant(&self) -> RXBRK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, OVRE_A>[src]

pub fn variant(&self) -> OVRE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, FRAME_A>[src]

pub fn variant(&self) -> FRAME_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, PARE_A>[src]

pub fn variant(&self) -> PARE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TIMEOUT_A>[src]

pub fn variant(&self) -> TIMEOUT_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXEMPTY_A>[src]

pub fn variant(&self) -> TXEMPTY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ITER_A>[src]

pub fn variant(&self) -> ITER_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXBUFE_A>[src]

pub fn variant(&self) -> TXBUFE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RXBUFF_A>[src]

pub fn variant(&self) -> RXBUFF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, NACK_A>[src]

pub fn variant(&self) -> NACK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RIIC_A>[src]

pub fn variant(&self) -> RIIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DSRIC_A>[src]

pub fn variant(&self) -> DSRIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DCDIC_A>[src]

pub fn variant(&self) -> DCDIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CTSIC_A>[src]

pub fn variant(&self) -> CTSIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RI_A>[src]

pub fn variant(&self) -> RI_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DSR_A>[src]

pub fn variant(&self) -> DSR_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DCD_A>[src]

pub fn variant(&self) -> DCD_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, LINBLS_A>[src]

pub fn variant(&self) -> LINBLS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, LINSTE_A>[src]

pub fn variant(&self) -> LINSTE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, LINHTE_A>[src]

pub fn variant(&self) -> LINHTE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _CSR_LIN>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Receiver Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmitter Ready

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 2 - Break Received/End of Break

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 8 - Receiver Time-out

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmitter Empty

pub fn iter(&self) -> ITER_R[src]

Bit 10 - Max number of Repetitions Reached

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Transmission Buffer Empty

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Reception Buffer Full

pub fn nack(&self) -> NACK_R[src]

Bit 13 - Non Acknowledge or LIN Break Sent or LIN Break Received

pub fn linid(&self) -> LINID_R[src]

Bit 14 - LIN Identifier Sent or LIN Identifier Received

pub fn lintc(&self) -> LINTC_R[src]

Bit 15 - LIN Transfer Conpleted

pub fn riic(&self) -> RIIC_R[src]

Bit 16 - Ring Indicator Input Change Flag

pub fn dsric(&self) -> DSRIC_R[src]

Bit 17 - Data Set Ready Input Change Flag

pub fn dcdic(&self) -> DCDIC_R[src]

Bit 18 - Data Carrier Detect Input Change Flag

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 19 - Clear to Send Input Change Flag

pub fn ri(&self) -> RI_R[src]

Bit 20 - Image of RI Input

pub fn dsr(&self) -> DSR_R[src]

Bit 21 - Image of DSR Input

pub fn dcd(&self) -> DCD_R[src]

Bit 22 - Image of DCD Input

pub fn linbls(&self) -> LINBLS_R[src]

Bit 23 - LIN Bus Line Status

pub fn linbe(&self) -> LINBE_R[src]

Bit 25 - LIN Bit Error

pub fn linisfe(&self) -> LINISFE_R[src]

Bit 26 - LIN Inconsistent Synch Field Error

pub fn linipe(&self) -> LINIPE_R[src]

Bit 27 - LIN Identifier Parity Error

pub fn lince(&self) -> LINCE_R[src]

Bit 28 - LIN Checksum Error

pub fn linsnre(&self) -> LINSNRE_R[src]

Bit 29 - LIN Slave Not Responding Error

pub fn linste(&self) -> LINSTE_R[src]

Bit 30 - LIN Synch Tolerance Error

pub fn linhte(&self) -> LINHTE_R[src]

Bit 31 - LIN Header Timeout Error

impl R<bool, RXRDY_A>[src]

pub fn variant(&self) -> RXRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXRDY_A>[src]

pub fn variant(&self) -> TXRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RXBRK_A>[src]

pub fn variant(&self) -> RXBRK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, OVRE_A>[src]

pub fn variant(&self) -> OVRE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, FRAME_A>[src]

pub fn variant(&self) -> FRAME_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, PARE_A>[src]

pub fn variant(&self) -> PARE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TIMEOUT_A>[src]

pub fn variant(&self) -> TIMEOUT_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXEMPTY_A>[src]

pub fn variant(&self) -> TXEMPTY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, UNRE_A>[src]

pub fn variant(&self) -> UNRE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXBUFE_A>[src]

pub fn variant(&self) -> TXBUFE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RXBUFF_A>[src]

pub fn variant(&self) -> RXBUFF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, NACK_A>[src]

pub fn variant(&self) -> NACK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RIIC_A>[src]

pub fn variant(&self) -> RIIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DSRIC_A>[src]

pub fn variant(&self) -> DSRIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DCDIC_A>[src]

pub fn variant(&self) -> DCDIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CTSIC_A>[src]

pub fn variant(&self) -> CTSIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RI_A>[src]

pub fn variant(&self) -> RI_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DSR_A>[src]

pub fn variant(&self) -> DSR_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DCD_A>[src]

pub fn variant(&self) -> DCD_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CTS_A>[src]

pub fn variant(&self) -> CTS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _CSR_SPI>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Receiver Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmitter Ready

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 2 - Break Received/End of Break

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 8 - Receiver Time-out

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmitter Empty

pub fn unre(&self) -> UNRE_R[src]

Bit 10 - SPI Underrun Error

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Transmission Buffer Empty

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Reception Buffer Full

pub fn nack(&self) -> NACK_R[src]

Bit 13 - Non Acknowledge

pub fn riic(&self) -> RIIC_R[src]

Bit 16 - Ring Indicator Input Change Flag

pub fn dsric(&self) -> DSRIC_R[src]

Bit 17 - Data Set Ready Input Change Flag

pub fn dcdic(&self) -> DCDIC_R[src]

Bit 18 - Data Carrier Detect Input Change Flag

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 19 - Clear to Send Input Change Flag

pub fn ri(&self) -> RI_R[src]

Bit 20 - Image of RI Input

pub fn dsr(&self) -> DSR_R[src]

Bit 21 - Image of DSR Input

pub fn dcd(&self) -> DCD_R[src]

Bit 22 - Image of DCD Input

pub fn cts(&self) -> CTS_R[src]

Bit 23 - Image of CTS Input

impl R<bool, RXRDY_A>[src]

pub fn variant(&self) -> RXRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXRDY_A>[src]

pub fn variant(&self) -> TXRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RXBRK_A>[src]

pub fn variant(&self) -> RXBRK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, OVRE_A>[src]

pub fn variant(&self) -> OVRE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, FRAME_A>[src]

pub fn variant(&self) -> FRAME_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, PARE_A>[src]

pub fn variant(&self) -> PARE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TIMEOUT_A>[src]

pub fn variant(&self) -> TIMEOUT_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXEMPTY_A>[src]

pub fn variant(&self) -> TXEMPTY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ITER_A>[src]

pub fn variant(&self) -> ITER_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXBUFE_A>[src]

pub fn variant(&self) -> TXBUFE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RXBUFF_A>[src]

pub fn variant(&self) -> RXBUFF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, NACK_A>[src]

pub fn variant(&self) -> NACK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RIIC_A>[src]

pub fn variant(&self) -> RIIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DSRIC_A>[src]

pub fn variant(&self) -> DSRIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DCDIC_A>[src]

pub fn variant(&self) -> DCDIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CTSIC_A>[src]

pub fn variant(&self) -> CTSIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RI_A>[src]

pub fn variant(&self) -> RI_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DSR_A>[src]

pub fn variant(&self) -> DSR_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DCD_A>[src]

pub fn variant(&self) -> DCD_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CTS_A>[src]

pub fn variant(&self) -> CTS_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, MANERR_A>[src]

pub fn variant(&self) -> MANERR_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _CSR_USART>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - Receiver Ready

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - Transmitter Ready

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 2 - Break Received/End of Break

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 8 - Receiver Time-out

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - Transmitter Empty

pub fn iter(&self) -> ITER_R[src]

Bit 10 - Max number of Repetitions Reached

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Transmission Buffer Empty

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Reception Buffer Full

pub fn nack(&self) -> NACK_R[src]

Bit 13 - Non Acknowledge

pub fn riic(&self) -> RIIC_R[src]

Bit 16 - Ring Indicator Input Change Flag

pub fn dsric(&self) -> DSRIC_R[src]

Bit 17 - Data Set Ready Input Change Flag

pub fn dcdic(&self) -> DCDIC_R[src]

Bit 18 - Data Carrier Detect Input Change Flag

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 19 - Clear to Send Input Change Flag

pub fn ri(&self) -> RI_R[src]

Bit 20 - Image of RI Input

pub fn dsr(&self) -> DSR_R[src]

Bit 21 - Image of DSR Input

pub fn dcd(&self) -> DCD_R[src]

Bit 22 - Image of DCD Input

pub fn cts(&self) -> CTS_R[src]

Bit 23 - Image of CTS Input

pub fn manerr(&self) -> MANERR_R[src]

Bit 24 - Manchester Error

impl R<u16, FI_DI_RATIO_A>[src]

pub fn variant(&self) -> Variant<u16, FI_DI_RATIO_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

impl R<u32, Reg<u32, _FIDI>>[src]

pub fn fi_di_ratio(&self) -> FI_DI_RATIO_R[src]

Bits 0:10 - FI Over DI Ratio Value

impl R<u32, Reg<u32, _IFR>>[src]

pub fn irda_filter(&self) -> IRDA_FILTER_R[src]

Bits 0:7 - Irda filter

impl R<bool, RXRDY_A>[src]

pub fn variant(&self) -> RXRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXRDY_A>[src]

pub fn variant(&self) -> TXRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RXBRK_A>[src]

pub fn variant(&self) -> RXBRK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, OVRE_A>[src]

pub fn variant(&self) -> OVRE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, FRAME_A>[src]

pub fn variant(&self) -> FRAME_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, PARE_A>[src]

pub fn variant(&self) -> PARE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TIMEOUT_A>[src]

pub fn variant(&self) -> TIMEOUT_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXEMPTY_A>[src]

pub fn variant(&self) -> TXEMPTY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ITER_A>[src]

pub fn variant(&self) -> ITER_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXBUFE_A>[src]

pub fn variant(&self) -> TXBUFE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RXBUFF_A>[src]

pub fn variant(&self) -> RXBUFF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, NACK_A>[src]

pub fn variant(&self) -> NACK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RIIC_A>[src]

pub fn variant(&self) -> RIIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DSRIC_A>[src]

pub fn variant(&self) -> DSRIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DCDIC_A>[src]

pub fn variant(&self) -> DCDIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CTSIC_A>[src]

pub fn variant(&self) -> CTSIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, LINSTE_A>[src]

pub fn variant(&self) -> LINSTE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, LINHTE_A>[src]

pub fn variant(&self) -> LINHTE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _IMR_LIN>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - RXRDY Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - TXRDY Interrupt Mask

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 2 - Receiver Break Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error Interrupt Mask

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error Interrupt Mask

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error Interrupt Mask

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 8 - Time-out Interrupt Mask

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - TXEMPTY Interrupt Mask

pub fn iter(&self) -> ITER_R[src]

Bit 10 - Iteration Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Buffer Empty Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Buffer Full Interrupt Mask

pub fn nack(&self) -> NACK_R[src]

Bit 13 - Non Acknowledge or LIN Break Sent or LIN Break Received Interrupt Mask

pub fn linid(&self) -> LINID_R[src]

Bit 14 - LIN Identifier Sent or LIN Received Interrupt Mask

pub fn lintc(&self) -> LINTC_R[src]

Bit 15 - LIN Transfer Conpleted Interrupt Mask

pub fn riic(&self) -> RIIC_R[src]

Bit 16 - Ring Indicator Input Change Mask

pub fn dsric(&self) -> DSRIC_R[src]

Bit 17 - Data Set Ready Input Change Mask

pub fn dcdic(&self) -> DCDIC_R[src]

Bit 18 - Data Carrier Detect Input Change Interrupt Mask

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 19 - Clear to Send Input Change Interrupt Mask

pub fn linbe(&self) -> LINBE_R[src]

Bit 25 - LIN Bus Error Interrupt Mask

pub fn linisfe(&self) -> LINISFE_R[src]

Bit 26 - LIN Inconsistent Synch Field Error Interrupt Mask

pub fn linipe(&self) -> LINIPE_R[src]

Bit 27 - LIN Identifier Parity Interrupt Mask

pub fn lince(&self) -> LINCE_R[src]

Bit 28 - LIN Checksum Error Interrupt Mask

pub fn linsnre(&self) -> LINSNRE_R[src]

Bit 29 - LIN Slave Not Responding Error Interrupt Mask

pub fn linste(&self) -> LINSTE_R[src]

Bit 30 - LIN Synch Tolerance Error Interrupt Mask

pub fn linhte(&self) -> LINHTE_R[src]

Bit 31 - LIN Header Timeout Error Interrupt Mask

impl R<bool, RXRDY_A>[src]

pub fn variant(&self) -> RXRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXRDY_A>[src]

pub fn variant(&self) -> TXRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RXBRK_A>[src]

pub fn variant(&self) -> RXBRK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, OVRE_A>[src]

pub fn variant(&self) -> OVRE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, FRAME_A>[src]

pub fn variant(&self) -> FRAME_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, PARE_A>[src]

pub fn variant(&self) -> PARE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TIMEOUT_A>[src]

pub fn variant(&self) -> TIMEOUT_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXEMPTY_A>[src]

pub fn variant(&self) -> TXEMPTY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, UNRE_A>[src]

pub fn variant(&self) -> UNRE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXBUFE_A>[src]

pub fn variant(&self) -> TXBUFE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RXBUFF_A>[src]

pub fn variant(&self) -> RXBUFF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, NACK_A>[src]

pub fn variant(&self) -> NACK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RIIC_A>[src]

pub fn variant(&self) -> RIIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DSRIC_A>[src]

pub fn variant(&self) -> DSRIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DCDIC_A>[src]

pub fn variant(&self) -> DCDIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CTSIC_A>[src]

pub fn variant(&self) -> CTSIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _MR_USART>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - RXRDY Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - TXRDY Interrupt Mask

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 2 - Receiver Break Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error Interrupt Mask

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error Interrupt Mask

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error Interrupt Mask

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 8 - Time-out Interrupt Mask

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - TXEMPTY Interrupt Mask

pub fn unre(&self) -> UNRE_R[src]

Bit 10 - SPI Underrun Error Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Buffer Empty Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Buffer Full Interrupt Mask

pub fn nack(&self) -> NACK_R[src]

Bit 13 - Non Acknowledge Interrupt Mask

pub fn riic(&self) -> RIIC_R[src]

Bit 16 - Ring Indicator Input Change Mask

pub fn dsric(&self) -> DSRIC_R[src]

Bit 17 - Data Set Ready Input Change Mask

pub fn dcdic(&self) -> DCDIC_R[src]

Bit 18 - Data Carrier Detect Input Change Interrupt Mask

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 19 - Clear to Send Input Change Interrupt Mask

impl R<bool, RXRDY_A>[src]

pub fn variant(&self) -> RXRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXRDY_A>[src]

pub fn variant(&self) -> TXRDY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RXBRK_A>[src]

pub fn variant(&self) -> RXBRK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, OVRE_A>[src]

pub fn variant(&self) -> OVRE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, FRAME_A>[src]

pub fn variant(&self) -> FRAME_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, PARE_A>[src]

pub fn variant(&self) -> PARE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TIMEOUT_A>[src]

pub fn variant(&self) -> TIMEOUT_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXEMPTY_A>[src]

pub fn variant(&self) -> TXEMPTY_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ITER_A>[src]

pub fn variant(&self) -> ITER_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, TXBUFE_A>[src]

pub fn variant(&self) -> TXBUFE_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RXBUFF_A>[src]

pub fn variant(&self) -> RXBUFF_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, NACK_A>[src]

pub fn variant(&self) -> NACK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, RIIC_A>[src]

pub fn variant(&self) -> RIIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DSRIC_A>[src]

pub fn variant(&self) -> DSRIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DCDIC_A>[src]

pub fn variant(&self) -> DCDIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CTSIC_A>[src]

pub fn variant(&self) -> CTSIC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, MANEA_A>[src]

pub fn variant(&self) -> MANEA_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _IMR_USART>>[src]

pub fn rxrdy(&self) -> RXRDY_R[src]

Bit 0 - RXRDY Interrupt Mask

pub fn txrdy(&self) -> TXRDY_R[src]

Bit 1 - TXRDY Interrupt Mask

pub fn rxbrk(&self) -> RXBRK_R[src]

Bit 2 - Receiver Break Interrupt Mask

pub fn ovre(&self) -> OVRE_R[src]

Bit 5 - Overrun Error Interrupt Mask

pub fn frame(&self) -> FRAME_R[src]

Bit 6 - Framing Error Interrupt Mask

pub fn pare(&self) -> PARE_R[src]

Bit 7 - Parity Error Interrupt Mask

pub fn timeout(&self) -> TIMEOUT_R[src]

Bit 8 - Time-out Interrupt Mask

pub fn txempty(&self) -> TXEMPTY_R[src]

Bit 9 - TXEMPTY Interrupt Mask

pub fn iter(&self) -> ITER_R[src]

Bit 10 - Iteration Interrupt Mask

pub fn txbufe(&self) -> TXBUFE_R[src]

Bit 11 - Buffer Empty Interrupt Mask

pub fn rxbuff(&self) -> RXBUFF_R[src]

Bit 12 - Buffer Full Interrupt Mask

pub fn nack(&self) -> NACK_R[src]

Bit 13 - Non Acknowledge Interrupt Mask

pub fn riic(&self) -> RIIC_R[src]

Bit 16 - Ring Indicator Input Change Mask

pub fn dsric(&self) -> DSRIC_R[src]

Bit 17 - Data Set Ready Input Change Mask

pub fn dcdic(&self) -> DCDIC_R[src]

Bit 18 - Data Carrier Detect Input Change Interrupt Mask

pub fn ctsic(&self) -> CTSIC_R[src]

Bit 19 - Clear to Send Input Change Interrupt Mask

pub fn mane(&self) -> MANE_R[src]

Bit 20 - Manchester Error Interrupt Mask

pub fn manea(&self) -> MANEA_R[src]

Bit 24 - Manchester Error Interrupt Mask

impl R<u32, Reg<u32, _LINBRR>>[src]

pub fn lincd(&self) -> LINCD_R[src]

Bits 0:15 - Clock Divider after Synchronization

pub fn linfp(&self) -> LINFP_R[src]

Bits 16:18 - Fractional Part after Synchronization

impl R<u32, Reg<u32, _LINIR>>[src]

pub fn idchr(&self) -> IDCHR_R[src]

Bits 0:7 - Identifier Character

impl R<u8, NACT_A>[src]

pub fn variant(&self) -> Variant<u8, NACT_A>[src]

Get enumerated values variant

pub fn is_publish(&self) -> bool[src]

Checks if the value of the field is PUBLISH

pub fn is_subscribe(&self) -> bool[src]

Checks if the value of the field is SUBSCRIBE

pub fn is_ignore(&self) -> bool[src]

Checks if the value of the field is IGNORE

impl R<u32, Reg<u32, _LINMR>>[src]

pub fn nact(&self) -> NACT_R[src]

Bits 0:1 - LIN Node Action

pub fn pardis(&self) -> PARDIS_R[src]

Bit 2 - Parity Disable

pub fn chkdis(&self) -> CHKDIS_R[src]

Bit 3 - Checksum Disable

pub fn chktyp(&self) -> CHKTYP_R[src]

Bit 4 - Checksum Type

pub fn dlm(&self) -> DLM_R[src]

Bit 5 - Data Length Mode

pub fn fsdis(&self) -> FSDIS_R[src]

Bit 6 - Frame Slot Mode Disable

pub fn wkuptyp(&self) -> WKUPTYP_R[src]

Bit 7 - Wakeup Signal Type

pub fn dlc(&self) -> DLC_R[src]

Bits 8:15 - Data Length Control

pub fn pdcm(&self) -> PDCM_R[src]

Bit 16 - PDC Mode

pub fn syncdis(&self) -> SYNCDIS_R[src]

Bit 17 - Synchronization Disable

impl R<u8, TX_PL_A>[src]

pub fn variant(&self) -> Variant<u8, TX_PL_A>[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

impl R<u8, TX_PP_A>[src]

pub fn variant(&self) -> TX_PP_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

pub fn is_2(&self) -> bool[src]

Checks if the value of the field is _2

pub fn is_3(&self) -> bool[src]

Checks if the value of the field is _3

impl R<bool, TX_MPOL_A>[src]

pub fn variant(&self) -> TX_MPOL_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, RX_PL_A>[src]

pub fn variant(&self) -> Variant<u8, RX_PL_A>[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

impl R<u8, RX_PP_A>[src]

pub fn variant(&self) -> RX_PP_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

pub fn is_2(&self) -> bool[src]

Checks if the value of the field is _2

pub fn is_3(&self) -> bool[src]

Checks if the value of the field is _3

impl R<bool, RX_MPOL_A>[src]

pub fn variant(&self) -> RX_MPOL_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DRIFT_A>[src]

pub fn variant(&self) -> DRIFT_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _MAN>>[src]

pub fn tx_pl(&self) -> TX_PL_R[src]

Bits 0:3 - Transmitter Preamble Length

pub fn tx_pp(&self) -> TX_PP_R[src]

Bits 8:9 - Transmitter Preamble Pattern

pub fn tx_mpol(&self) -> TX_MPOL_R[src]

Bit 12 - Transmitter Manchester Polarity

pub fn rx_pl(&self) -> RX_PL_R[src]

Bits 16:19 - Receiver Preamble Length

pub fn rx_pp(&self) -> RX_PP_R[src]

Bits 24:25 - Receiver Preamble Pattern detected

pub fn rx_mpol(&self) -> RX_MPOL_R[src]

Bit 28 - Receiver Manchester Polarity

pub fn drift(&self) -> DRIFT_R[src]

Bit 30 - Drift compensation

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_rs485(&self) -> bool[src]

Checks if the value of the field is RS485

pub fn is_hardware(&self) -> bool[src]

Checks if the value of the field is HARDWARE

pub fn is_modem(&self) -> bool[src]

Checks if the value of the field is MODEM

pub fn is_iso7816_t0(&self) -> bool[src]

Checks if the value of the field is ISO7816_T0

pub fn is_iso7816_t1(&self) -> bool[src]

Checks if the value of the field is ISO7816_T1

pub fn is_irda(&self) -> bool[src]

Checks if the value of the field is IRDA

pub fn is_lin_master(&self) -> bool[src]

Checks if the value of the field is LIN_MASTER

pub fn is_lin_slave(&self) -> bool[src]

Checks if the value of the field is LIN_SLAVE

pub fn is_spi_master(&self) -> bool[src]

Checks if the value of the field is SPI_MASTER

pub fn is_spi_slave(&self) -> bool[src]

Checks if the value of the field is SPI_SLAVE

impl R<u8, USCLKS_A>[src]

pub fn variant(&self) -> Variant<u8, USCLKS_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_mck_div(&self) -> bool[src]

Checks if the value of the field is MCK_DIV

pub fn is_sck(&self) -> bool[src]

Checks if the value of the field is SCK

impl R<u8, CHRL_A>[src]

pub fn variant(&self) -> CHRL_A[src]

Get enumerated values variant

pub fn is_5(&self) -> bool[src]

Checks if the value of the field is _5

pub fn is_6(&self) -> bool[src]

Checks if the value of the field is _6

pub fn is_7(&self) -> bool[src]

Checks if the value of the field is _7

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

impl R<bool, CPHA_A>[src]

pub fn variant(&self) -> CPHA_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, PAR_A>[src]

pub fn variant(&self) -> PAR_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

pub fn is_space(&self) -> bool[src]

Checks if the value of the field is SPACE

pub fn is_mark(&self) -> bool[src]

Checks if the value of the field is MARK

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_5(&self) -> bool[src]

Checks if the value of the field is _5

pub fn is_multi(&self) -> bool[src]

Checks if the value of the field is MULTI

pub fn is_7(&self) -> bool[src]

Checks if the value of the field is _7

impl R<u8, NBSTOP_A>[src]

pub fn variant(&self) -> Variant<u8, NBSTOP_A>[src]

Get enumerated values variant

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

pub fn is_1_5(&self) -> bool[src]

Checks if the value of the field is _1_5

pub fn is_2(&self) -> bool[src]

Checks if the value of the field is _2

impl R<u8, CHMODE_A>[src]

pub fn variant(&self) -> CHMODE_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_echo(&self) -> bool[src]

Checks if the value of the field is ECHO

pub fn is_local_loop(&self) -> bool[src]

Checks if the value of the field is LOCAL_LOOP

pub fn is_remote_loop(&self) -> bool[src]

Checks if the value of the field is REMOTE_LOOP

impl R<bool, CPOL_A>[src]

pub fn variant(&self) -> CPOL_A[src]

Get enumerated values variant

pub fn is_zero(&self) -> bool[src]

Checks if the value of the field is ZERO

pub fn is_one(&self) -> bool[src]

Checks if the value of the field is ONE

impl R<bool, MODE9_A>[src]

pub fn variant(&self) -> MODE9_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CLKO_A>[src]

pub fn variant(&self) -> CLKO_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, OVER_A>[src]

pub fn variant(&self) -> OVER_A[src]

Get enumerated values variant

pub fn is_x16(&self) -> bool[src]

Checks if the value of the field is X16

pub fn is_x8(&self) -> bool[src]

Checks if the value of the field is X8

impl R<bool, INACK_A>[src]

pub fn variant(&self) -> INACK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DSNACK_A>[src]

pub fn variant(&self) -> DSNACK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, FILTER_A>[src]

pub fn variant(&self) -> FILTER_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _MR_SPI>>[src]

pub fn mode(&self) -> MODE_R[src]

Bits 0:3 - Usart Mode

pub fn usclks(&self) -> USCLKS_R[src]

Bits 4:5 - Clock Selection

pub fn chrl(&self) -> CHRL_R[src]

Bits 6:7 - Character Length.

pub fn cpha(&self) -> CPHA_R[src]

Bit 8 - SPI CLock Phase

pub fn par(&self) -> PAR_R[src]

Bits 9:11 - Parity Type

pub fn nbstop(&self) -> NBSTOP_R[src]

Bits 12:13 - Number of Stop Bits

pub fn chmode(&self) -> CHMODE_R[src]

Bits 14:15 - Channel Mode

pub fn cpol(&self) -> CPOL_R[src]

Bit 16 - SPI Clock Polarity

pub fn mode9(&self) -> MODE9_R[src]

Bit 17 - 9-bit Character Length

pub fn clko(&self) -> CLKO_R[src]

Bit 18 - Clock Output Select

pub fn over(&self) -> OVER_R[src]

Bit 19 - Oversampling Mode

pub fn inack(&self) -> INACK_R[src]

Bit 20 - Inhibit Non Acknowledge

pub fn dsnack(&self) -> DSNACK_R[src]

Bit 21 - Disable Successive NACK

pub fn invdata(&self) -> INVDATA_R[src]

Bit 23 - Inverted data

pub fn max_iteration(&self) -> MAX_ITERATION_R[src]

Bits 24:26 - Max interation

pub fn filter(&self) -> FILTER_R[src]

Bit 28 - Infrared Receive Line Filter

impl R<u8, MODE_A>[src]

pub fn variant(&self) -> Variant<u8, MODE_A>[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_rs485(&self) -> bool[src]

Checks if the value of the field is RS485

pub fn is_hardware(&self) -> bool[src]

Checks if the value of the field is HARDWARE

pub fn is_modem(&self) -> bool[src]

Checks if the value of the field is MODEM

pub fn is_iso7816_t0(&self) -> bool[src]

Checks if the value of the field is ISO7816_T0

pub fn is_iso7816_t1(&self) -> bool[src]

Checks if the value of the field is ISO7816_T1

pub fn is_irda(&self) -> bool[src]

Checks if the value of the field is IRDA

pub fn is_lin_master(&self) -> bool[src]

Checks if the value of the field is LIN_MASTER

pub fn is_lin_slave(&self) -> bool[src]

Checks if the value of the field is LIN_SLAVE

pub fn is_spi_master(&self) -> bool[src]

Checks if the value of the field is SPI_MASTER

pub fn is_spi_slave(&self) -> bool[src]

Checks if the value of the field is SPI_SLAVE

impl R<u8, USCLKS_A>[src]

pub fn variant(&self) -> Variant<u8, USCLKS_A>[src]

Get enumerated values variant

pub fn is_mck(&self) -> bool[src]

Checks if the value of the field is MCK

pub fn is_mck_div(&self) -> bool[src]

Checks if the value of the field is MCK_DIV

pub fn is_sck(&self) -> bool[src]

Checks if the value of the field is SCK

impl R<u8, CHRL_A>[src]

pub fn variant(&self) -> CHRL_A[src]

Get enumerated values variant

pub fn is_5(&self) -> bool[src]

Checks if the value of the field is _5

pub fn is_6(&self) -> bool[src]

Checks if the value of the field is _6

pub fn is_7(&self) -> bool[src]

Checks if the value of the field is _7

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

impl R<bool, SYNC_A>[src]

pub fn variant(&self) -> SYNC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u8, PAR_A>[src]

pub fn variant(&self) -> PAR_A[src]

Get enumerated values variant

pub fn is_even(&self) -> bool[src]

Checks if the value of the field is EVEN

pub fn is_odd(&self) -> bool[src]

Checks if the value of the field is ODD

pub fn is_space(&self) -> bool[src]

Checks if the value of the field is SPACE

pub fn is_mark(&self) -> bool[src]

Checks if the value of the field is MARK

pub fn is_none(&self) -> bool[src]

Checks if the value of the field is NONE

pub fn is_5(&self) -> bool[src]

Checks if the value of the field is _5

pub fn is_multi(&self) -> bool[src]

Checks if the value of the field is MULTI

pub fn is_7(&self) -> bool[src]

Checks if the value of the field is _7

impl R<u8, NBSTOP_A>[src]

pub fn variant(&self) -> Variant<u8, NBSTOP_A>[src]

Get enumerated values variant

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

pub fn is_1_5(&self) -> bool[src]

Checks if the value of the field is _1_5

pub fn is_2(&self) -> bool[src]

Checks if the value of the field is _2

impl R<u8, CHMODE_A>[src]

pub fn variant(&self) -> CHMODE_A[src]

Get enumerated values variant

pub fn is_normal(&self) -> bool[src]

Checks if the value of the field is NORMAL

pub fn is_echo(&self) -> bool[src]

Checks if the value of the field is ECHO

pub fn is_local_loop(&self) -> bool[src]

Checks if the value of the field is LOCAL_LOOP

pub fn is_remote_loop(&self) -> bool[src]

Checks if the value of the field is REMOTE_LOOP

impl R<bool, MSBF_A>[src]

pub fn variant(&self) -> MSBF_A[src]

Get enumerated values variant

pub fn is_lsbf(&self) -> bool[src]

Checks if the value of the field is LSBF

pub fn is_msbf(&self) -> bool[src]

Checks if the value of the field is MSBF

impl R<bool, MODE9_A>[src]

pub fn variant(&self) -> MODE9_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, CLKO_A>[src]

pub fn variant(&self) -> CLKO_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, OVER_A>[src]

pub fn variant(&self) -> OVER_A[src]

Get enumerated values variant

pub fn is_x16(&self) -> bool[src]

Checks if the value of the field is X16

pub fn is_x8(&self) -> bool[src]

Checks if the value of the field is X8

impl R<bool, INACK_A>[src]

pub fn variant(&self) -> INACK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, DSNACK_A>[src]

pub fn variant(&self) -> DSNACK_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, VAR_SYNC_A>[src]

pub fn variant(&self) -> VAR_SYNC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, FILTER_A>[src]

pub fn variant(&self) -> FILTER_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, MAN_A>[src]

pub fn variant(&self) -> MAN_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, MODSYNC_A>[src]

pub fn variant(&self) -> MODSYNC_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<bool, ONEBIT_A>[src]

pub fn variant(&self) -> ONEBIT_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _MR>>[src]

pub fn mode(&self) -> MODE_R[src]

Bits 0:3 - Usart Mode

pub fn usclks(&self) -> USCLKS_R[src]

Bits 4:5 - Clock Selection

pub fn chrl(&self) -> CHRL_R[src]

Bits 6:7 - Character Length.

pub fn sync(&self) -> SYNC_R[src]

Bit 8 - Synchronous Mode Select

pub fn par(&self) -> PAR_R[src]

Bits 9:11 - Parity Type

pub fn nbstop(&self) -> NBSTOP_R[src]

Bits 12:13 - Number of Stop Bits

pub fn chmode(&self) -> CHMODE_R[src]

Bits 14:15 - Channel Mode

pub fn msbf(&self) -> MSBF_R[src]

Bit 16 - Bit Order

pub fn mode9(&self) -> MODE9_R[src]

Bit 17 - 9-bit Character Length

pub fn clko(&self) -> CLKO_R[src]

Bit 18 - Clock Output Select

pub fn over(&self) -> OVER_R[src]

Bit 19 - Oversampling Mode

pub fn inack(&self) -> INACK_R[src]

Bit 20 - Inhibit Non Acknowledge

pub fn dsnack(&self) -> DSNACK_R[src]

Bit 21 - Disable Successive NACK

pub fn var_sync(&self) -> VAR_SYNC_R[src]

Bit 22 - Variable synchronization of command/data sync Start Frame Delimiter

pub fn invdata(&self) -> INVDATA_R[src]

Bit 23 - Inverted data

pub fn max_iteration(&self) -> MAX_ITERATION_R[src]

Bits 24:26 - Max interation

pub fn filter(&self) -> FILTER_R[src]

Bit 28 - Infrared Receive Line Filter

pub fn man(&self) -> MAN_R[src]

Bit 29 - Manchester Encoder/Decoder Enable

pub fn modsync(&self) -> MODSYNC_R[src]

Bit 30 - Manchester Synchronization Mode

pub fn onebit(&self) -> ONEBIT_R[src]

Bit 31 - Start Frame Delimiter selector

impl R<u32, Reg<u32, _NER>>[src]

pub fn nb_errors(&self) -> NB_ERRORS_R[src]

Bits 0:7 - Error number during ISO7816 transfers

impl R<bool, RXSYNH_A>[src]

pub fn variant(&self) -> RXSYNH_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _RHR>>[src]

pub fn rxchr(&self) -> RXCHR_R[src]

Bits 0:8 - Received Character

pub fn rxsynh(&self) -> RXSYNH_R[src]

Bit 15 - Received Sync

impl R<u32, TO_A>[src]

pub fn variant(&self) -> Variant<u32, TO_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

impl R<u32, Reg<u32, _RTOR>>[src]

pub fn to(&self) -> TO_R[src]

Bits 0:16 - Time-out Value

impl R<u8, TG_A>[src]

pub fn variant(&self) -> Variant<u8, TG_A>[src]

Get enumerated values variant

pub fn is_disable(&self) -> bool[src]

Checks if the value of the field is DISABLE

impl R<u32, Reg<u32, _TTGR>>[src]

pub fn tg(&self) -> TG_R[src]

Bits 0:7 - Timeguard Value

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version

pub fn mfn(&self) -> MFN_R[src]

Bits 16:19 - MFN

impl R<bool, WPEN_A>[src]

pub fn variant(&self) -> WPEN_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _WPMR>>[src]

pub fn wpen(&self) -> WPEN_R[src]

Bit 0 - Write Protect Enable

pub fn wpkey(&self) -> WPKEY_R[src]

Bits 8:31 - Write Protect Key

impl R<bool, WPV_A>[src]

pub fn variant(&self) -> WPV_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _WPSR>>[src]

pub fn wpv(&self) -> WPV_R[src]

Bit 0 - Write Protect Violation Status

pub fn wpvsrc(&self) -> WPVSRC_R[src]

Bits 8:23 - Write Protect Violation Source

impl R<u32, Reg<u32, _UADDRSIZE>>[src]

pub fn uaddrsize(&self) -> UADDRSIZE_R[src]

Bits 0:31 - IP PB Address Size

impl R<u32, Reg<u32, _UDCON>>[src]

pub fn uadd(&self) -> UADD_R[src]

Bits 0:6 - USB Address

pub fn adden(&self) -> ADDEN_R[src]

Bit 7 - Address Enable

pub fn detach(&self) -> DETACH_R[src]

Bit 8 - Detach

pub fn rmwkup(&self) -> RMWKUP_R[src]

Bit 9 - Remote Wake-Up

pub fn spdconf(&self) -> SPDCONF_R[src]

Bits 10:11 - Speed configuration

pub fn ls(&self) -> LS_R[src]

Bit 12 - Low Speed Mode Force

pub fn tstj(&self) -> TSTJ_R[src]

Bit 13 - Test mode J

pub fn tstk(&self) -> TSTK_R[src]

Bit 14 - Test mode K

pub fn tstpckt(&self) -> TSTPCKT_R[src]

Bit 15 - Test Packet mode

pub fn opmode2(&self) -> OPMODE2_R[src]

Bit 16 - Specific Operational mode

pub fn gnak(&self) -> GNAK_R[src]

Bit 17 - Global NAK

impl R<u32, Reg<u32, _UDESC>>[src]

pub fn udesca(&self) -> UDESCA_R[src]

Bits 0:31 - USB Descriptor Address

impl R<u32, Reg<u32, _UDFNUM>>[src]

pub fn mfnum(&self) -> MFNUM_R[src]

Bits 0:2 - Micro Frame Number

pub fn fnum(&self) -> FNUM_R[src]

Bits 3:13 - Frame Number

pub fn fncerr(&self) -> FNCERR_R[src]

Bit 15 - Frame Number CRC Error

impl R<u32, Reg<u32, _UDINT>>[src]

pub fn susp(&self) -> SUSP_R[src]

Bit 0 - Suspend Interrupt

pub fn msof(&self) -> MSOF_R[src]

Bit 1 - Micro Start of Frame Interrupt

pub fn sof(&self) -> SOF_R[src]

Bit 2 - Start of Frame Interrupt

pub fn eorst(&self) -> EORST_R[src]

Bit 3 - End of Reset Interrupt

pub fn wakeup(&self) -> WAKEUP_R[src]

Bit 4 - Wake-Up Interrupt

pub fn eorsm(&self) -> EORSM_R[src]

Bit 5 - End Of Resume Interrupt

pub fn uprsm(&self) -> UPRSM_R[src]

Bit 6 - Upstream Resume Interrupt

pub fn ep0int(&self) -> EP0INT_R[src]

Bit 12 - Endpoint 0 Interrupt

pub fn ep1int(&self) -> EP1INT_R[src]

Bit 13 - Endpoint 1 Interrupt

pub fn ep2int(&self) -> EP2INT_R[src]

Bit 14 - Endpoint 2 Interrupt

pub fn ep3int(&self) -> EP3INT_R[src]

Bit 15 - Endpoint 3 Interrupt

pub fn ep4int(&self) -> EP4INT_R[src]

Bit 16 - Endpoint 4 Interrupt

pub fn ep5int(&self) -> EP5INT_R[src]

Bit 17 - Endpoint 5 Interrupt

pub fn ep6int(&self) -> EP6INT_R[src]

Bit 18 - Endpoint 6 Interrupt

pub fn ep7int(&self) -> EP7INT_R[src]

Bit 19 - Endpoint 7 Interrupt

impl R<u32, Reg<u32, _UDINTE>>[src]

pub fn suspe(&self) -> SUSPE_R[src]

Bit 0 - SUSP Interrupt Enable

pub fn msofe(&self) -> MSOFE_R[src]

Bit 1 - MSOF Interrupt Enable

pub fn sofe(&self) -> SOFE_R[src]

Bit 2 - SOF Interrupt Enable

pub fn eorste(&self) -> EORSTE_R[src]

Bit 3 - EORST Interrupt Enable

pub fn wakeupe(&self) -> WAKEUPE_R[src]

Bit 4 - WAKEUP Interrupt Enable

pub fn eorsme(&self) -> EORSME_R[src]

Bit 5 - EORSM Interrupt Enable

pub fn uprsme(&self) -> UPRSME_R[src]

Bit 6 - UPRSM Interrupt Enable

pub fn ep0inte(&self) -> EP0INTE_R[src]

Bit 12 - EP0INT Interrupt Enable

pub fn ep1inte(&self) -> EP1INTE_R[src]

Bit 13 - EP1INT Interrupt Enable

pub fn ep2inte(&self) -> EP2INTE_R[src]

Bit 14 - EP2INT Interrupt Enable

pub fn ep3inte(&self) -> EP3INTE_R[src]

Bit 15 - EP3INT Interrupt Enable

pub fn ep4inte(&self) -> EP4INTE_R[src]

Bit 16 - EP4INT Interrupt Enable

pub fn ep5inte(&self) -> EP5INTE_R[src]

Bit 17 - EP5INT Interrupt Enable

pub fn ep6inte(&self) -> EP6INTE_R[src]

Bit 18 - EP6INT Interrupt Enable

pub fn ep7inte(&self) -> EP7INTE_R[src]

Bit 19 - EP7INT Interrupt Enable

impl R<bool, EPBK_A>[src]

pub fn variant(&self) -> EPBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, EPSIZE_A>[src]

pub fn variant(&self) -> EPSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<bool, EPDIR_A>[src]

pub fn variant(&self) -> EPDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u8, EPTYPE_A>[src]

pub fn variant(&self) -> EPTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UECFG0>>[src]

pub fn epbk(&self) -> EPBK_R[src]

Bit 2 - Endpoint Bank

pub fn epsize(&self) -> EPSIZE_R[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&self) -> EPDIR_R[src]

Bit 8 - Endpoint Direction

pub fn eptype(&self) -> EPTYPE_R[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&self) -> REPNB_R[src]

Bits 16:19 - Redirected Endpoint Number

impl R<bool, EPBK_A>[src]

pub fn variant(&self) -> EPBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, EPSIZE_A>[src]

pub fn variant(&self) -> EPSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<bool, EPDIR_A>[src]

pub fn variant(&self) -> EPDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u8, EPTYPE_A>[src]

pub fn variant(&self) -> EPTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UECFG1>>[src]

pub fn epbk(&self) -> EPBK_R[src]

Bit 2 - Endpoint Bank

pub fn epsize(&self) -> EPSIZE_R[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&self) -> EPDIR_R[src]

Bit 8 - Endpoint Direction

pub fn eptype(&self) -> EPTYPE_R[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&self) -> REPNB_R[src]

Bits 16:19 - Redirected Endpoint Number

impl R<bool, EPBK_A>[src]

pub fn variant(&self) -> EPBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, EPSIZE_A>[src]

pub fn variant(&self) -> EPSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<bool, EPDIR_A>[src]

pub fn variant(&self) -> EPDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u8, EPTYPE_A>[src]

pub fn variant(&self) -> EPTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UECFG2>>[src]

pub fn epbk(&self) -> EPBK_R[src]

Bit 2 - Endpoint Bank

pub fn epsize(&self) -> EPSIZE_R[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&self) -> EPDIR_R[src]

Bit 8 - Endpoint Direction

pub fn eptype(&self) -> EPTYPE_R[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&self) -> REPNB_R[src]

Bits 16:19 - Redirected Endpoint Number

impl R<bool, EPBK_A>[src]

pub fn variant(&self) -> EPBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, EPSIZE_A>[src]

pub fn variant(&self) -> EPSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<bool, EPDIR_A>[src]

pub fn variant(&self) -> EPDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u8, EPTYPE_A>[src]

pub fn variant(&self) -> EPTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UECFG3>>[src]

pub fn epbk(&self) -> EPBK_R[src]

Bit 2 - Endpoint Bank

pub fn epsize(&self) -> EPSIZE_R[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&self) -> EPDIR_R[src]

Bit 8 - Endpoint Direction

pub fn eptype(&self) -> EPTYPE_R[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&self) -> REPNB_R[src]

Bits 16:19 - Redirected Endpoint Number

impl R<bool, EPBK_A>[src]

pub fn variant(&self) -> EPBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, EPSIZE_A>[src]

pub fn variant(&self) -> EPSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<bool, EPDIR_A>[src]

pub fn variant(&self) -> EPDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u8, EPTYPE_A>[src]

pub fn variant(&self) -> EPTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UECFG4>>[src]

pub fn epbk(&self) -> EPBK_R[src]

Bit 2 - Endpoint Bank

pub fn epsize(&self) -> EPSIZE_R[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&self) -> EPDIR_R[src]

Bit 8 - Endpoint Direction

pub fn eptype(&self) -> EPTYPE_R[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&self) -> REPNB_R[src]

Bits 16:19 - Redirected Endpoint Number

impl R<bool, EPBK_A>[src]

pub fn variant(&self) -> EPBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, EPSIZE_A>[src]

pub fn variant(&self) -> EPSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<bool, EPDIR_A>[src]

pub fn variant(&self) -> EPDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u8, EPTYPE_A>[src]

pub fn variant(&self) -> EPTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UECFG5>>[src]

pub fn epbk(&self) -> EPBK_R[src]

Bit 2 - Endpoint Bank

pub fn epsize(&self) -> EPSIZE_R[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&self) -> EPDIR_R[src]

Bit 8 - Endpoint Direction

pub fn eptype(&self) -> EPTYPE_R[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&self) -> REPNB_R[src]

Bits 16:19 - Redirected Endpoint Number

impl R<bool, EPBK_A>[src]

pub fn variant(&self) -> EPBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, EPSIZE_A>[src]

pub fn variant(&self) -> EPSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<bool, EPDIR_A>[src]

pub fn variant(&self) -> EPDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u8, EPTYPE_A>[src]

pub fn variant(&self) -> EPTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UECFG6>>[src]

pub fn epbk(&self) -> EPBK_R[src]

Bit 2 - Endpoint Bank

pub fn epsize(&self) -> EPSIZE_R[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&self) -> EPDIR_R[src]

Bit 8 - Endpoint Direction

pub fn eptype(&self) -> EPTYPE_R[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&self) -> REPNB_R[src]

Bits 16:19 - Redirected Endpoint Number

impl R<bool, EPBK_A>[src]

pub fn variant(&self) -> EPBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, EPSIZE_A>[src]

pub fn variant(&self) -> EPSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<bool, EPDIR_A>[src]

pub fn variant(&self) -> EPDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u8, EPTYPE_A>[src]

pub fn variant(&self) -> EPTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UECFG7>>[src]

pub fn epbk(&self) -> EPBK_R[src]

Bit 2 - Endpoint Bank

pub fn epsize(&self) -> EPSIZE_R[src]

Bits 4:6 - Endpoint Size

pub fn epdir(&self) -> EPDIR_R[src]

Bit 8 - Endpoint Direction

pub fn eptype(&self) -> EPTYPE_R[src]

Bits 11:12 - Endpoint Type

pub fn repnb(&self) -> REPNB_R[src]

Bits 16:19 - Redirected Endpoint Number

impl R<u32, Reg<u32, _UECON0>>[src]

pub fn txine(&self) -> TXINE_R[src]

Bit 0 - TXIN Interrupt Enable

pub fn rxoute(&self) -> RXOUTE_R[src]

Bit 1 - RXOUT Interrupt Enable

pub fn rxstpe(&self) -> RXSTPE_R[src]

Bit 2 - RXSTP Interrupt Enable

pub fn nakoute(&self) -> NAKOUTE_R[src]

Bit 3 - NAKOUT Interrupt Enable

pub fn nakine(&self) -> NAKINE_R[src]

Bit 4 - NAKIN Interrupt Enable

pub fn stallede(&self) -> STALLEDE_R[src]

Bit 6 - STALLED Interrupt Enable

pub fn nreply(&self) -> NREPLY_R[src]

Bit 8 - No Reply

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 11 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - Number of Busy Banks Interrupt Enable

pub fn killbk(&self) -> KILLBK_R[src]

Bit 13 - Kill IN Bank

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn nyetdis(&self) -> NYETDIS_R[src]

Bit 17 - NYET token disable

pub fn rstdt(&self) -> RSTDT_R[src]

Bit 18 - Reset Data Toggle

pub fn stallrq(&self) -> STALLRQ_R[src]

Bit 19 - STALL Request

pub fn busy0(&self) -> BUSY0_R[src]

Bit 24 - Busy Bank1 Enable

pub fn busy1(&self) -> BUSY1_R[src]

Bit 25 - Busy Bank0 Enable

impl R<u32, Reg<u32, _UECON1>>[src]

pub fn txine(&self) -> TXINE_R[src]

Bit 0 - TXIN Interrupt Enable

pub fn rxoute(&self) -> RXOUTE_R[src]

Bit 1 - RXOUT Interrupt Enable

pub fn rxstpe(&self) -> RXSTPE_R[src]

Bit 2 - RXSTP Interrupt Enable

pub fn nakoute(&self) -> NAKOUTE_R[src]

Bit 3 - NAKOUT Interrupt Enable

pub fn nakine(&self) -> NAKINE_R[src]

Bit 4 - NAKIN Interrupt Enable

pub fn stallede(&self) -> STALLEDE_R[src]

Bit 6 - STALLED Interrupt Enable

pub fn nreply(&self) -> NREPLY_R[src]

Bit 8 - No Reply

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 11 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - Number of Busy Banks Interrupt Enable

pub fn killbk(&self) -> KILLBK_R[src]

Bit 13 - Kill IN Bank

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn nyetdis(&self) -> NYETDIS_R[src]

Bit 17 - NYET Token Enable

pub fn rstdt(&self) -> RSTDT_R[src]

Bit 18 - Reset Data Toggle

pub fn stallrq(&self) -> STALLRQ_R[src]

Bit 19 - STALL Request

pub fn busy0(&self) -> BUSY0_R[src]

Bit 24 - Busy Bank1 Enable

pub fn busy1(&self) -> BUSY1_R[src]

Bit 25 - Busy Bank0 Enable

impl R<u32, Reg<u32, _UECON2>>[src]

pub fn txine(&self) -> TXINE_R[src]

Bit 0 - TXIN Interrupt Enable

pub fn rxoute(&self) -> RXOUTE_R[src]

Bit 1 - RXOUT Interrupt Enable

pub fn rxstpe(&self) -> RXSTPE_R[src]

Bit 2 - RXSTP Interrupt Enable

pub fn nakoute(&self) -> NAKOUTE_R[src]

Bit 3 - NAKOUT Interrupt Enable

pub fn nakine(&self) -> NAKINE_R[src]

Bit 4 - NAKIN Interrupt Enable

pub fn stallede(&self) -> STALLEDE_R[src]

Bit 6 - STALLED Interrupt Enable

pub fn nreply(&self) -> NREPLY_R[src]

Bit 8 - No Reply

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 11 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - Number of Busy Banks Interrupt Enable

pub fn killbk(&self) -> KILLBK_R[src]

Bit 13 - Kill IN Bank

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn nyetdis(&self) -> NYETDIS_R[src]

Bit 17 - NYET Token Enable

pub fn rstdt(&self) -> RSTDT_R[src]

Bit 18 - Reset Data Toggle

pub fn stallrq(&self) -> STALLRQ_R[src]

Bit 19 - STALL Request

pub fn busy0(&self) -> BUSY0_R[src]

Bit 24 - Busy Bank1 Enable

pub fn busy1(&self) -> BUSY1_R[src]

Bit 25 - Busy Bank0 Enable

impl R<u32, Reg<u32, _UECON3>>[src]

pub fn txine(&self) -> TXINE_R[src]

Bit 0 - TXIN Interrupt Enable

pub fn rxoute(&self) -> RXOUTE_R[src]

Bit 1 - RXOUT Interrupt Enable

pub fn rxstpe(&self) -> RXSTPE_R[src]

Bit 2 - RXSTP Interrupt Enable

pub fn nakoute(&self) -> NAKOUTE_R[src]

Bit 3 - NAKOUT Interrupt Enable

pub fn nakine(&self) -> NAKINE_R[src]

Bit 4 - NAKIN Interrupt Enable

pub fn stallede(&self) -> STALLEDE_R[src]

Bit 6 - STALLED Interrupt Enable

pub fn nreply(&self) -> NREPLY_R[src]

Bit 8 - No Reply

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 11 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - Number of Busy Banks Interrupt Enable

pub fn killbk(&self) -> KILLBK_R[src]

Bit 13 - Kill IN Bank

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn nyetdis(&self) -> NYETDIS_R[src]

Bit 17 - NYET Token Enable

pub fn rstdt(&self) -> RSTDT_R[src]

Bit 18 - Reset Data Toggle

pub fn stallrq(&self) -> STALLRQ_R[src]

Bit 19 - STALL Request

pub fn busy0(&self) -> BUSY0_R[src]

Bit 24 - Busy Bank1 Enable

pub fn busy1(&self) -> BUSY1_R[src]

Bit 25 - Busy Bank0 Enable

impl R<u32, Reg<u32, _UECON4>>[src]

pub fn txine(&self) -> TXINE_R[src]

Bit 0 - TXIN Interrupt Enable

pub fn rxoute(&self) -> RXOUTE_R[src]

Bit 1 - RXOUT Interrupt Enable

pub fn rxstpe(&self) -> RXSTPE_R[src]

Bit 2 - RXSTP Interrupt Enable

pub fn nakoute(&self) -> NAKOUTE_R[src]

Bit 3 - NAKOUT Interrupt Enable

pub fn nakine(&self) -> NAKINE_R[src]

Bit 4 - NAKIN Interrupt Enable

pub fn stallede(&self) -> STALLEDE_R[src]

Bit 6 - STALLED Interrupt Enable

pub fn nreply(&self) -> NREPLY_R[src]

Bit 8 - No Reply

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 11 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - Number of Busy Banks Interrupt Enable

pub fn killbk(&self) -> KILLBK_R[src]

Bit 13 - Kill IN Bank

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn nyetdis(&self) -> NYETDIS_R[src]

Bit 17 - NYET Token Enable

pub fn rstdt(&self) -> RSTDT_R[src]

Bit 18 - Reset Data Toggle

pub fn stallrq(&self) -> STALLRQ_R[src]

Bit 19 - STALL Request

pub fn busy0(&self) -> BUSY0_R[src]

Bit 24 - Busy Bank1 Enable

pub fn busy1(&self) -> BUSY1_R[src]

Bit 25 - Busy Bank0 Enable

impl R<u32, Reg<u32, _UECON5>>[src]

pub fn txine(&self) -> TXINE_R[src]

Bit 0 - TXIN Interrupt Enable

pub fn rxoute(&self) -> RXOUTE_R[src]

Bit 1 - RXOUT Interrupt Enable

pub fn rxstpe(&self) -> RXSTPE_R[src]

Bit 2 - RXSTP Interrupt Enable

pub fn nakoute(&self) -> NAKOUTE_R[src]

Bit 3 - NAKOUT Interrupt Enable

pub fn nakine(&self) -> NAKINE_R[src]

Bit 4 - NAKIN Interrupt Enable

pub fn stallede(&self) -> STALLEDE_R[src]

Bit 6 - STALLED Interrupt Enable

pub fn nreply(&self) -> NREPLY_R[src]

Bit 8 - No Reply

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 11 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - Number of Busy Banks Interrupt Enable

pub fn killbk(&self) -> KILLBK_R[src]

Bit 13 - Kill IN Bank

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn nyetdis(&self) -> NYETDIS_R[src]

Bit 17 - NYET Token Enable

pub fn rstdt(&self) -> RSTDT_R[src]

Bit 18 - Reset Data Toggle

pub fn stallrq(&self) -> STALLRQ_R[src]

Bit 19 - STALL Request

pub fn busy0(&self) -> BUSY0_R[src]

Bit 24 - Busy Bank1 Enable

pub fn busy1(&self) -> BUSY1_R[src]

Bit 25 - Busy Bank0 Enable

impl R<u32, Reg<u32, _UECON6>>[src]

pub fn txine(&self) -> TXINE_R[src]

Bit 0 - TXIN Interrupt Enable

pub fn rxoute(&self) -> RXOUTE_R[src]

Bit 1 - RXOUT Interrupt Enable

pub fn rxstpe(&self) -> RXSTPE_R[src]

Bit 2 - RXSTP Interrupt Enable

pub fn nakoute(&self) -> NAKOUTE_R[src]

Bit 3 - NAKOUT Interrupt Enable

pub fn nakine(&self) -> NAKINE_R[src]

Bit 4 - NAKIN Interrupt Enable

pub fn stallede(&self) -> STALLEDE_R[src]

Bit 6 - STALLED Interrupt Enable

pub fn nreply(&self) -> NREPLY_R[src]

Bit 8 - No Reply

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 11 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - Number of Busy Banks Interrupt Enable

pub fn killbk(&self) -> KILLBK_R[src]

Bit 13 - Kill IN Bank

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn nyetdis(&self) -> NYETDIS_R[src]

Bit 17 - NYET Token Enable

pub fn rstdt(&self) -> RSTDT_R[src]

Bit 18 - Reset Data Toggle

pub fn stallrq(&self) -> STALLRQ_R[src]

Bit 19 - STALL Request

pub fn busy0(&self) -> BUSY0_R[src]

Bit 24 - Busy Bank1 Enable

pub fn busy1(&self) -> BUSY1_R[src]

Bit 25 - Busy Bank0 Enable

impl R<u32, Reg<u32, _UECON7>>[src]

pub fn txine(&self) -> TXINE_R[src]

Bit 0 - TXIN Interrupt Enable

pub fn rxoute(&self) -> RXOUTE_R[src]

Bit 1 - RXOUT Interrupt Enable

pub fn rxstpe(&self) -> RXSTPE_R[src]

Bit 2 - RXSTP Interrupt Enable

pub fn nakoute(&self) -> NAKOUTE_R[src]

Bit 3 - NAKOUT Interrupt Enable

pub fn nakine(&self) -> NAKINE_R[src]

Bit 4 - NAKIN Interrupt Enable

pub fn stallede(&self) -> STALLEDE_R[src]

Bit 6 - STALLED Interrupt Enable

pub fn nreply(&self) -> NREPLY_R[src]

Bit 8 - No Reply

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 11 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - Number of Busy Banks Interrupt Enable

pub fn killbk(&self) -> KILLBK_R[src]

Bit 13 - Kill IN Bank

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn nyetdis(&self) -> NYETDIS_R[src]

Bit 17 - NYET Token Enable

pub fn rstdt(&self) -> RSTDT_R[src]

Bit 18 - Reset Data Toggle

pub fn stallrq(&self) -> STALLRQ_R[src]

Bit 19 - STALL Request

pub fn busy0(&self) -> BUSY0_R[src]

Bit 24 - Busy Bank1 Enable

pub fn busy1(&self) -> BUSY1_R[src]

Bit 25 - Busy Bank0 Enable

impl R<u32, Reg<u32, _UERST>>[src]

pub fn epen0(&self) -> EPEN0_R[src]

Bit 0 - Endpoint0 Enable

pub fn epen1(&self) -> EPEN1_R[src]

Bit 1 - Endpoint1 Enable

pub fn epen2(&self) -> EPEN2_R[src]

Bit 2 - Endpoint2 Enable

pub fn epen3(&self) -> EPEN3_R[src]

Bit 3 - Endpoint3 Enable

pub fn epen4(&self) -> EPEN4_R[src]

Bit 4 - Endpoint4 Enable

pub fn epen5(&self) -> EPEN5_R[src]

Bit 5 - Endpoint5 Enable

pub fn epen6(&self) -> EPEN6_R[src]

Bit 6 - Endpoint6 Enable

pub fn epen7(&self) -> EPEN7_R[src]

Bit 7 - Endpoint7 Enable

impl R<bool, CTRLDIR_A>[src]

pub fn variant(&self) -> CTRLDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u32, Reg<u32, _UESTA0>>[src]

pub fn txini(&self) -> TXINI_R[src]

Bit 0 - Transmitted IN Data Interrupt

pub fn rxouti(&self) -> RXOUTI_R[src]

Bit 1 - Received OUT Data Interrupt

pub fn rxstpi(&self) -> RXSTPI_R[src]

Bit 2 - Received SETUP Interrupt

pub fn nakouti(&self) -> NAKOUTI_R[src]

Bit 3 - NAKed OUT Interrupt

pub fn nakini(&self) -> NAKINI_R[src]

Bit 4 - NAKed IN Interrupt

pub fn stalledi(&self) -> STALLEDI_R[src]

Bit 6 - STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 11 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number Of Busy Banks

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

pub fn ctrldir(&self) -> CTRLDIR_R[src]

Bit 17 - Control Direction

impl R<bool, CTRLDIR_A>[src]

pub fn variant(&self) -> CTRLDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u32, Reg<u32, _UESTA1>>[src]

pub fn txini(&self) -> TXINI_R[src]

Bit 0 - Transmitted IN Data Interrupt

pub fn rxouti(&self) -> RXOUTI_R[src]

Bit 1 - Received OUT Data Interrupt

pub fn rxstpi(&self) -> RXSTPI_R[src]

Bit 2 - Received SETUP Interrupt

pub fn nakouti(&self) -> NAKOUTI_R[src]

Bit 3 - NAKed OUT Interrupt

pub fn nakini(&self) -> NAKINI_R[src]

Bit 4 - NAKed IN Interrupt

pub fn stalledi(&self) -> STALLEDI_R[src]

Bit 6 - STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 11 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number Of Busy Banks

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

pub fn ctrldir(&self) -> CTRLDIR_R[src]

Bit 17 - Control Direction

impl R<bool, CTRLDIR_A>[src]

pub fn variant(&self) -> CTRLDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u32, Reg<u32, _UESTA2>>[src]

pub fn txini(&self) -> TXINI_R[src]

Bit 0 - Transmitted IN Data Interrupt

pub fn rxouti(&self) -> RXOUTI_R[src]

Bit 1 - Received OUT Data Interrupt

pub fn rxstpi(&self) -> RXSTPI_R[src]

Bit 2 - Received SETUP Interrupt

pub fn nakouti(&self) -> NAKOUTI_R[src]

Bit 3 - NAKed OUT Interrupt

pub fn nakini(&self) -> NAKINI_R[src]

Bit 4 - NAKed IN Interrupt

pub fn stalledi(&self) -> STALLEDI_R[src]

Bit 6 - STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 11 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number Of Busy Banks

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

pub fn ctrldir(&self) -> CTRLDIR_R[src]

Bit 17 - Control Direction

impl R<bool, CTRLDIR_A>[src]

pub fn variant(&self) -> CTRLDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u32, Reg<u32, _UESTA3>>[src]

pub fn txini(&self) -> TXINI_R[src]

Bit 0 - Transmitted IN Data Interrupt

pub fn rxouti(&self) -> RXOUTI_R[src]

Bit 1 - Received OUT Data Interrupt

pub fn rxstpi(&self) -> RXSTPI_R[src]

Bit 2 - Received SETUP Interrupt

pub fn nakouti(&self) -> NAKOUTI_R[src]

Bit 3 - NAKed OUT Interrupt

pub fn nakini(&self) -> NAKINI_R[src]

Bit 4 - NAKed IN Interrupt

pub fn stalledi(&self) -> STALLEDI_R[src]

Bit 6 - STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 11 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number Of Busy Banks

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

pub fn ctrldir(&self) -> CTRLDIR_R[src]

Bit 17 - Control Direction

impl R<bool, CTRLDIR_A>[src]

pub fn variant(&self) -> CTRLDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u32, Reg<u32, _UESTA4>>[src]

pub fn txini(&self) -> TXINI_R[src]

Bit 0 - Transmitted IN Data Interrupt

pub fn rxouti(&self) -> RXOUTI_R[src]

Bit 1 - Received OUT Data Interrupt

pub fn rxstpi(&self) -> RXSTPI_R[src]

Bit 2 - Received SETUP Interrupt

pub fn nakouti(&self) -> NAKOUTI_R[src]

Bit 3 - NAKed OUT Interrupt

pub fn nakini(&self) -> NAKINI_R[src]

Bit 4 - NAKed IN Interrupt

pub fn stalledi(&self) -> STALLEDI_R[src]

Bit 6 - STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 11 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number Of Busy Banks

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

pub fn ctrldir(&self) -> CTRLDIR_R[src]

Bit 17 - Control Direction

impl R<bool, CTRLDIR_A>[src]

pub fn variant(&self) -> CTRLDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u32, Reg<u32, _UESTA5>>[src]

pub fn txini(&self) -> TXINI_R[src]

Bit 0 - Transmitted IN Data Interrupt

pub fn rxouti(&self) -> RXOUTI_R[src]

Bit 1 - Received OUT Data Interrupt

pub fn rxstpi(&self) -> RXSTPI_R[src]

Bit 2 - Received SETUP Interrupt

pub fn nakouti(&self) -> NAKOUTI_R[src]

Bit 3 - NAKed OUT Interrupt

pub fn nakini(&self) -> NAKINI_R[src]

Bit 4 - NAKed IN Interrupt

pub fn stalledi(&self) -> STALLEDI_R[src]

Bit 6 - STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 11 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number Of Busy Banks

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

pub fn ctrldir(&self) -> CTRLDIR_R[src]

Bit 17 - Control Direction

impl R<bool, CTRLDIR_A>[src]

pub fn variant(&self) -> CTRLDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u32, Reg<u32, _UESTA6>>[src]

pub fn txini(&self) -> TXINI_R[src]

Bit 0 - Transmitted IN Data Interrupt

pub fn rxouti(&self) -> RXOUTI_R[src]

Bit 1 - Received OUT Data Interrupt

pub fn rxstpi(&self) -> RXSTPI_R[src]

Bit 2 - Received SETUP Interrupt

pub fn nakouti(&self) -> NAKOUTI_R[src]

Bit 3 - NAKed OUT Interrupt

pub fn nakini(&self) -> NAKINI_R[src]

Bit 4 - NAKed IN Interrupt

pub fn stalledi(&self) -> STALLEDI_R[src]

Bit 6 - STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 11 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number Of Busy Banks

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

pub fn ctrldir(&self) -> CTRLDIR_R[src]

Bit 17 - Control Direction

impl R<bool, CTRLDIR_A>[src]

pub fn variant(&self) -> CTRLDIR_A[src]

Get enumerated values variant

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

impl R<u32, Reg<u32, _UESTA7>>[src]

pub fn txini(&self) -> TXINI_R[src]

Bit 0 - Transmitted IN Data Interrupt

pub fn rxouti(&self) -> RXOUTI_R[src]

Bit 1 - Received OUT Data Interrupt

pub fn rxstpi(&self) -> RXSTPI_R[src]

Bit 2 - Received SETUP Interrupt

pub fn nakouti(&self) -> NAKOUTI_R[src]

Bit 3 - NAKed OUT Interrupt

pub fn nakini(&self) -> NAKINI_R[src]

Bit 4 - NAKed IN Interrupt

pub fn stalledi(&self) -> STALLEDI_R[src]

Bit 6 - STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 11 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number Of Busy Banks

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

pub fn ctrldir(&self) -> CTRLDIR_R[src]

Bit 17 - Control Direction

impl R<u32, Reg<u32, _UFEATURES>>[src]

pub fn eptnbrmax(&self) -> EPTNBRMAX_R[src]

Bits 0:3 - Maximum Number of Pipes/Endpints

pub fn utmimode(&self) -> UTMIMODE_R[src]

Bit 8 - UTMI Mode

impl R<u32, Reg<u32, _UHCON>>[src]

pub fn sofe(&self) -> SOFE_R[src]

Bit 8 - SOF Enable

pub fn reset(&self) -> RESET_R[src]

Bit 9 - Send USB Reset

pub fn resume(&self) -> RESUME_R[src]

Bit 10 - Send USB Resume

pub fn spdconf(&self) -> SPDCONF_R[src]

Bits 12:13 - Speed Configuration

pub fn tstj(&self) -> TSTJ_R[src]

Bit 16 - Test J

pub fn tstk(&self) -> TSTK_R[src]

Bit 17 - Test K

impl R<u32, Reg<u32, _UHFNUM>>[src]

pub fn mfnum(&self) -> MFNUM_R[src]

Bits 0:2 - Micro Frame Number

pub fn fnum(&self) -> FNUM_R[src]

Bits 3:13 - Frame Number

pub fn flenhigh(&self) -> FLENHIGH_R[src]

Bits 16:23 - Frame Length

impl R<u32, Reg<u32, _UHINT>>[src]

pub fn dconni(&self) -> DCONNI_R[src]

Bit 0 - Device Connection Interrupt

pub fn ddisci(&self) -> DDISCI_R[src]

Bit 1 - Device Disconnection Interrupt

pub fn rsti(&self) -> RSTI_R[src]

Bit 2 - USB Reset Sent Interrupt

pub fn rsmedi(&self) -> RSMEDI_R[src]

Bit 3 - Downstream Resume Sent Interrupt

pub fn rxrsmi(&self) -> RXRSMI_R[src]

Bit 4 - Upstream Resume Received Interrupt

pub fn hsofi(&self) -> HSOFI_R[src]

Bit 5 - Host SOF Interrupt

pub fn hwupi(&self) -> HWUPI_R[src]

Bit 6 - Host Wake-Up Interrupt

pub fn p0int(&self) -> P0INT_R[src]

Bit 8 - Pipe 0 Interrupt

pub fn p1int(&self) -> P1INT_R[src]

Bit 9 - Pipe 1 Interrupt

pub fn p2int(&self) -> P2INT_R[src]

Bit 10 - Pipe 2 Interrupt

pub fn p3int(&self) -> P3INT_R[src]

Bit 11 - Pipe 3 Interrupt

pub fn p4int(&self) -> P4INT_R[src]

Bit 12 - Pipe 4 Interrupt

pub fn p5int(&self) -> P5INT_R[src]

Bit 13 - Pipe 5 Interrupt

pub fn p6int(&self) -> P6INT_R[src]

Bit 14 - Pipe 6 Interrupt

impl R<u32, Reg<u32, _UHINTE>>[src]

pub fn dconnie(&self) -> DCONNIE_R[src]

Bit 0 - DCONNI Enable

pub fn ddiscie(&self) -> DDISCIE_R[src]

Bit 1 - DDISCI Enable

pub fn rstie(&self) -> RSTIE_R[src]

Bit 2 - RSTI Enable

pub fn rsmedie(&self) -> RSMEDIE_R[src]

Bit 3 - RSMEDI Enable

pub fn rxrsmie(&self) -> RXRSMIE_R[src]

Bit 4 - RXRSMI Enable

pub fn hsofie(&self) -> HSOFIE_R[src]

Bit 5 - HSOFI Enable

pub fn hwupie(&self) -> HWUPIE_R[src]

Bit 6 - HWUPI Enable

pub fn p0inte(&self) -> P0INTE_R[src]

Bit 8 - P0INT Enable

pub fn p1inte(&self) -> P1INTE_R[src]

Bit 9 - P1INT Enable

pub fn p2inte(&self) -> P2INTE_R[src]

Bit 10 - P2INT Enable

pub fn p3inte(&self) -> P3INTE_R[src]

Bit 11 - P3INT Enable

pub fn p4inte(&self) -> P4INTE_R[src]

Bit 12 - P4INT Enable

pub fn p5inte(&self) -> P5INTE_R[src]

Bit 13 - P5INT Enable

pub fn p6inte(&self) -> P6INTE_R[src]

Bit 14 - P6INT Enable

pub fn p7inte(&self) -> P7INTE_R[src]

Bit 15 - P7INT Enable

impl R<u32, Reg<u32, _UHSOFC>>[src]

pub fn flenc(&self) -> FLENC_R[src]

Bits 0:13 - Frame Length Control

pub fn flence(&self) -> FLENCE_R[src]

Bit 16 - Frame Length Control Enable

impl R<u32, Reg<u32, _UNAME1>>[src]

pub fn uname1(&self) -> UNAME1_R[src]

Bits 0:31 - IP Name Part One

impl R<u32, Reg<u32, _UNAME2>>[src]

pub fn uname2(&self) -> UNAME2_R[src]

Bits 0:31 - IP Name Part Two

impl R<bool, PBK_A>[src]

pub fn variant(&self) -> PBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, PSIZE_A>[src]

pub fn variant(&self) -> PSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<u8, PTOKEN_A>[src]

pub fn variant(&self) -> Variant<u8, PTOKEN_A>[src]

Get enumerated values variant

pub fn is_setup(&self) -> bool[src]

Checks if the value of the field is SETUP

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

impl R<u8, PTYPE_A>[src]

pub fn variant(&self) -> PTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UPCFG0>>[src]

pub fn pbk(&self) -> PBK_R[src]

Bit 2 - Pipe Banks

pub fn psize(&self) -> PSIZE_R[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&self) -> PTOKEN_R[src]

Bits 8:9 - Pipe Token

pub fn ptype(&self) -> PTYPE_R[src]

Bits 12:13 - Pipe Type

pub fn pingen(&self) -> PINGEN_R[src]

Bit 20 - Ping Enable

pub fn binterval(&self) -> BINTERVAL_R[src]

Bits 24:31 - binterval parameter

impl R<bool, PBK_A>[src]

pub fn variant(&self) -> PBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, PSIZE_A>[src]

pub fn variant(&self) -> PSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<u8, PTOKEN_A>[src]

pub fn variant(&self) -> Variant<u8, PTOKEN_A>[src]

Get enumerated values variant

pub fn is_setup(&self) -> bool[src]

Checks if the value of the field is SETUP

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

impl R<u8, PTYPE_A>[src]

pub fn variant(&self) -> PTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UPCFG1>>[src]

pub fn pbk(&self) -> PBK_R[src]

Bit 2 - Pipe Banks

pub fn psize(&self) -> PSIZE_R[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&self) -> PTOKEN_R[src]

Bits 8:9 - Pipe Token

pub fn ptype(&self) -> PTYPE_R[src]

Bits 12:13 - Pipe Type

pub fn pingen(&self) -> PINGEN_R[src]

Bit 20 - Ping Enable

pub fn binterval(&self) -> BINTERVAL_R[src]

Bits 24:31 - binterval parameter

impl R<bool, PBK_A>[src]

pub fn variant(&self) -> PBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, PSIZE_A>[src]

pub fn variant(&self) -> PSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<u8, PTOKEN_A>[src]

pub fn variant(&self) -> Variant<u8, PTOKEN_A>[src]

Get enumerated values variant

pub fn is_setup(&self) -> bool[src]

Checks if the value of the field is SETUP

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

impl R<u8, PTYPE_A>[src]

pub fn variant(&self) -> PTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UPCFG2>>[src]

pub fn pbk(&self) -> PBK_R[src]

Bit 2 - Pipe Banks

pub fn psize(&self) -> PSIZE_R[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&self) -> PTOKEN_R[src]

Bits 8:9 - Pipe Token

pub fn ptype(&self) -> PTYPE_R[src]

Bits 12:13 - Pipe Type

pub fn pingen(&self) -> PINGEN_R[src]

Bit 20 - Ping Enable

pub fn binterval(&self) -> BINTERVAL_R[src]

Bits 24:31 - binterval parameter

impl R<bool, PBK_A>[src]

pub fn variant(&self) -> PBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, PSIZE_A>[src]

pub fn variant(&self) -> PSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<u8, PTOKEN_A>[src]

pub fn variant(&self) -> Variant<u8, PTOKEN_A>[src]

Get enumerated values variant

pub fn is_setup(&self) -> bool[src]

Checks if the value of the field is SETUP

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

impl R<u8, PTYPE_A>[src]

pub fn variant(&self) -> PTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UPCFG3>>[src]

pub fn pbk(&self) -> PBK_R[src]

Bit 2 - Pipe Banks

pub fn psize(&self) -> PSIZE_R[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&self) -> PTOKEN_R[src]

Bits 8:9 - Pipe Token

pub fn ptype(&self) -> PTYPE_R[src]

Bits 12:13 - Pipe Type

pub fn pingen(&self) -> PINGEN_R[src]

Bit 20 - Ping Enable

pub fn binterval(&self) -> BINTERVAL_R[src]

Bits 24:31 - binterval parameter

impl R<bool, PBK_A>[src]

pub fn variant(&self) -> PBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, PSIZE_A>[src]

pub fn variant(&self) -> PSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<u8, PTOKEN_A>[src]

pub fn variant(&self) -> Variant<u8, PTOKEN_A>[src]

Get enumerated values variant

pub fn is_setup(&self) -> bool[src]

Checks if the value of the field is SETUP

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

impl R<u8, PTYPE_A>[src]

pub fn variant(&self) -> PTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UPCFG4>>[src]

pub fn pbk(&self) -> PBK_R[src]

Bit 2 - Pipe Banks

pub fn psize(&self) -> PSIZE_R[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&self) -> PTOKEN_R[src]

Bits 8:9 - Pipe Token

pub fn ptype(&self) -> PTYPE_R[src]

Bits 12:13 - Pipe Type

pub fn pingen(&self) -> PINGEN_R[src]

Bit 20 - Ping Enable

pub fn binterval(&self) -> BINTERVAL_R[src]

Bits 24:31 - binterval parameter

impl R<bool, PBK_A>[src]

pub fn variant(&self) -> PBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, PSIZE_A>[src]

pub fn variant(&self) -> PSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<u8, PTOKEN_A>[src]

pub fn variant(&self) -> Variant<u8, PTOKEN_A>[src]

Get enumerated values variant

pub fn is_setup(&self) -> bool[src]

Checks if the value of the field is SETUP

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

impl R<u8, PTYPE_A>[src]

pub fn variant(&self) -> PTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UPCFG5>>[src]

pub fn pbk(&self) -> PBK_R[src]

Bit 2 - Pipe Banks

pub fn psize(&self) -> PSIZE_R[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&self) -> PTOKEN_R[src]

Bits 8:9 - Pipe Token

pub fn ptype(&self) -> PTYPE_R[src]

Bits 12:13 - Pipe Type

pub fn pingen(&self) -> PINGEN_R[src]

Bit 20 - Ping Enable

pub fn binterval(&self) -> BINTERVAL_R[src]

Bits 24:31 - binterval parameter

impl R<bool, PBK_A>[src]

pub fn variant(&self) -> PBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, PSIZE_A>[src]

pub fn variant(&self) -> PSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<u8, PTOKEN_A>[src]

pub fn variant(&self) -> Variant<u8, PTOKEN_A>[src]

Get enumerated values variant

pub fn is_setup(&self) -> bool[src]

Checks if the value of the field is SETUP

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

impl R<u8, PTYPE_A>[src]

pub fn variant(&self) -> PTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UPCFG6>>[src]

pub fn pbk(&self) -> PBK_R[src]

Bit 2 - Pipe Banks

pub fn psize(&self) -> PSIZE_R[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&self) -> PTOKEN_R[src]

Bits 8:9 - Pipe Token

pub fn ptype(&self) -> PTYPE_R[src]

Bits 12:13 - Pipe Type

pub fn pingen(&self) -> PINGEN_R[src]

Bit 20 - Ping Enable

pub fn binterval(&self) -> BINTERVAL_R[src]

Bits 24:31 - binterval parameter

impl R<bool, PBK_A>[src]

pub fn variant(&self) -> PBK_A[src]

Get enumerated values variant

pub fn is_single(&self) -> bool[src]

Checks if the value of the field is SINGLE

pub fn is_double(&self) -> bool[src]

Checks if the value of the field is DOUBLE

impl R<u8, PSIZE_A>[src]

pub fn variant(&self) -> PSIZE_A[src]

Get enumerated values variant

pub fn is_8(&self) -> bool[src]

Checks if the value of the field is _8

pub fn is_16(&self) -> bool[src]

Checks if the value of the field is _16

pub fn is_32(&self) -> bool[src]

Checks if the value of the field is _32

pub fn is_64(&self) -> bool[src]

Checks if the value of the field is _64

pub fn is_128(&self) -> bool[src]

Checks if the value of the field is _128

pub fn is_256(&self) -> bool[src]

Checks if the value of the field is _256

pub fn is_512(&self) -> bool[src]

Checks if the value of the field is _512

pub fn is_1024(&self) -> bool[src]

Checks if the value of the field is _1024

impl R<u8, PTOKEN_A>[src]

pub fn variant(&self) -> Variant<u8, PTOKEN_A>[src]

Get enumerated values variant

pub fn is_setup(&self) -> bool[src]

Checks if the value of the field is SETUP

pub fn is_in_(&self) -> bool[src]

Checks if the value of the field is IN

pub fn is_out(&self) -> bool[src]

Checks if the value of the field is OUT

impl R<u8, PTYPE_A>[src]

pub fn variant(&self) -> PTYPE_A[src]

Get enumerated values variant

pub fn is_control(&self) -> bool[src]

Checks if the value of the field is CONTROL

pub fn is_isochronous(&self) -> bool[src]

Checks if the value of the field is ISOCHRONOUS

pub fn is_bulk(&self) -> bool[src]

Checks if the value of the field is BULK

pub fn is_interrupt(&self) -> bool[src]

Checks if the value of the field is INTERRUPT

impl R<u32, Reg<u32, _UPCFG7>>[src]

pub fn pbk(&self) -> PBK_R[src]

Bit 2 - Pipe Banks

pub fn psize(&self) -> PSIZE_R[src]

Bits 4:6 - Pipe Size

pub fn ptoken(&self) -> PTOKEN_R[src]

Bits 8:9 - Pipe Token

pub fn ptype(&self) -> PTYPE_R[src]

Bits 12:13 - Pipe Type

pub fn pingen(&self) -> PINGEN_R[src]

Bit 20 - Ping Enable

pub fn binterval(&self) -> BINTERVAL_R[src]

Bits 24:31 - binterval parameter

impl R<u32, Reg<u32, _UPCON0>>[src]

pub fn rxine(&self) -> RXINE_R[src]

Bit 0 - RXIN Interrupt Enable

pub fn txoute(&self) -> TXOUTE_R[src]

Bit 1 - TXOUT Interrupt Enable

pub fn txstpe(&self) -> TXSTPE_R[src]

Bit 2 - TXSTP Interrupt Enable

pub fn perre(&self) -> PERRE_R[src]

Bit 3 - PERR Interrupt Enable

pub fn nakede(&self) -> NAKEDE_R[src]

Bit 4 - NAKED Interrupt Enable

pub fn errorfie(&self) -> ERRORFIE_R[src]

Bit 5 - ERRORFI Interrupt Enable

pub fn rxstallde(&self) -> RXSTALLDE_R[src]

Bit 6 - RXTALLD Interrupt Enable

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 10 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - NBUSYBKInterrupt Enable

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn pfreeze(&self) -> PFREEZE_R[src]

Bit 17 - Pipe Freeze

pub fn initdtgl(&self) -> INITDTGL_R[src]

Bit 18 - Data Toggle Initialization

pub fn initbk(&self) -> INITBK_R[src]

Bit 19 - Bank Initialization

impl R<u32, Reg<u32, _UPCON1>>[src]

pub fn rxine(&self) -> RXINE_R[src]

Bit 0 - RXIN Interrupt Enable

pub fn txoute(&self) -> TXOUTE_R[src]

Bit 1 - TXOUT Interrupt Enable

pub fn txstpe(&self) -> TXSTPE_R[src]

Bit 2 - TXSTP Interrupt Enable

pub fn perre(&self) -> PERRE_R[src]

Bit 3 - PERR Interrupt Enable

pub fn nakede(&self) -> NAKEDE_R[src]

Bit 4 - NAKED Interrupt Enable

pub fn errorfie(&self) -> ERRORFIE_R[src]

Bit 5 - ERRORFI Interrupt Enable

pub fn rxstallde(&self) -> RXSTALLDE_R[src]

Bit 6 - RXTALLD Interrupt Enable

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 10 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - NBUSYBKInterrupt Enable

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn pfreeze(&self) -> PFREEZE_R[src]

Bit 17 - Pipe Freeze

pub fn initdtgl(&self) -> INITDTGL_R[src]

Bit 18 - Data Toggle Initialization

pub fn initbk(&self) -> INITBK_R[src]

Bit 19 - Bank Initialization

impl R<u32, Reg<u32, _UPCON2>>[src]

pub fn rxine(&self) -> RXINE_R[src]

Bit 0 - RXIN Interrupt Enable

pub fn txoute(&self) -> TXOUTE_R[src]

Bit 1 - TXOUT Interrupt Enable

pub fn txstpe(&self) -> TXSTPE_R[src]

Bit 2 - TXSTP Interrupt Enable

pub fn perre(&self) -> PERRE_R[src]

Bit 3 - PERR Interrupt Enable

pub fn nakede(&self) -> NAKEDE_R[src]

Bit 4 - NAKED Interrupt Enable

pub fn errorfie(&self) -> ERRORFIE_R[src]

Bit 5 - ERRORFI Interrupt Enable

pub fn rxstallde(&self) -> RXSTALLDE_R[src]

Bit 6 - RXTALLD Interrupt Enable

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 10 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - NBUSYBKInterrupt Enable

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn pfreeze(&self) -> PFREEZE_R[src]

Bit 17 - Pipe Freeze

pub fn initdtgl(&self) -> INITDTGL_R[src]

Bit 18 - Data Toggle Initialization

pub fn initbk(&self) -> INITBK_R[src]

Bit 19 - Bank Initialization

impl R<u32, Reg<u32, _UPCON3>>[src]

pub fn rxine(&self) -> RXINE_R[src]

Bit 0 - RXIN Interrupt Enable

pub fn txoute(&self) -> TXOUTE_R[src]

Bit 1 - TXOUT Interrupt Enable

pub fn txstpe(&self) -> TXSTPE_R[src]

Bit 2 - TXSTP Interrupt Enable

pub fn perre(&self) -> PERRE_R[src]

Bit 3 - PERR Interrupt Enable

pub fn nakede(&self) -> NAKEDE_R[src]

Bit 4 - NAKED Interrupt Enable

pub fn errorfie(&self) -> ERRORFIE_R[src]

Bit 5 - ERRORFI Interrupt Enable

pub fn rxstallde(&self) -> RXSTALLDE_R[src]

Bit 6 - RXTALLD Interrupt Enable

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 10 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - NBUSYBKInterrupt Enable

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn pfreeze(&self) -> PFREEZE_R[src]

Bit 17 - Pipe Freeze

pub fn initdtgl(&self) -> INITDTGL_R[src]

Bit 18 - Data Toggle Initialization

pub fn initbk(&self) -> INITBK_R[src]

Bit 19 - Bank Initialization

impl R<u32, Reg<u32, _UPCON4>>[src]

pub fn rxine(&self) -> RXINE_R[src]

Bit 0 - RXIN Interrupt Enable

pub fn txoute(&self) -> TXOUTE_R[src]

Bit 1 - TXOUT Interrupt Enable

pub fn txstpe(&self) -> TXSTPE_R[src]

Bit 2 - TXSTP Interrupt Enable

pub fn perre(&self) -> PERRE_R[src]

Bit 3 - PERR Interrupt Enable

pub fn nakede(&self) -> NAKEDE_R[src]

Bit 4 - NAKED Interrupt Enable

pub fn errorfie(&self) -> ERRORFIE_R[src]

Bit 5 - ERRORFI Interrupt Enable

pub fn rxstallde(&self) -> RXSTALLDE_R[src]

Bit 6 - RXTALLD Interrupt Enable

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 10 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - NBUSYBKInterrupt Enable

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn pfreeze(&self) -> PFREEZE_R[src]

Bit 17 - Pipe Freeze

pub fn initdtgl(&self) -> INITDTGL_R[src]

Bit 18 - Data Toggle Initialization

pub fn initbk(&self) -> INITBK_R[src]

Bit 19 - Bank Initialization

impl R<u32, Reg<u32, _UPCON5>>[src]

pub fn rxine(&self) -> RXINE_R[src]

Bit 0 - RXIN Interrupt Enable

pub fn txoute(&self) -> TXOUTE_R[src]

Bit 1 - TXOUT Interrupt Enable

pub fn txstpe(&self) -> TXSTPE_R[src]

Bit 2 - TXSTP Interrupt Enable

pub fn perre(&self) -> PERRE_R[src]

Bit 3 - PERR Interrupt Enable

pub fn nakede(&self) -> NAKEDE_R[src]

Bit 4 - NAKED Interrupt Enable

pub fn errorfie(&self) -> ERRORFIE_R[src]

Bit 5 - ERRORFI Interrupt Enable

pub fn rxstallde(&self) -> RXSTALLDE_R[src]

Bit 6 - RXTALLD Interrupt Enable

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 10 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - NBUSYBKInterrupt Enable

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn pfreeze(&self) -> PFREEZE_R[src]

Bit 17 - Pipe Freeze

pub fn initdtgl(&self) -> INITDTGL_R[src]

Bit 18 - Data Toggle Initialization

pub fn initbk(&self) -> INITBK_R[src]

Bit 19 - Bank Initialization

impl R<u32, Reg<u32, _UPCON6>>[src]

pub fn rxine(&self) -> RXINE_R[src]

Bit 0 - RXIN Interrupt Enable

pub fn txoute(&self) -> TXOUTE_R[src]

Bit 1 - TXOUT Interrupt Enable

pub fn txstpe(&self) -> TXSTPE_R[src]

Bit 2 - TXSTP Interrupt Enable

pub fn perre(&self) -> PERRE_R[src]

Bit 3 - PERR Interrupt Enable

pub fn nakede(&self) -> NAKEDE_R[src]

Bit 4 - NAKED Interrupt Enable

pub fn errorfie(&self) -> ERRORFIE_R[src]

Bit 5 - ERRORFI Interrupt Enable

pub fn rxstallde(&self) -> RXSTALLDE_R[src]

Bit 6 - RXTALLD Interrupt Enable

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 10 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - NBUSYBKInterrupt Enable

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn pfreeze(&self) -> PFREEZE_R[src]

Bit 17 - Pipe Freeze

pub fn initdtgl(&self) -> INITDTGL_R[src]

Bit 18 - Data Toggle Initialization

pub fn initbk(&self) -> INITBK_R[src]

Bit 19 - Bank Initialization

impl R<u32, Reg<u32, _UPCON7>>[src]

pub fn rxine(&self) -> RXINE_R[src]

Bit 0 - RXIN Interrupt Enable

pub fn txoute(&self) -> TXOUTE_R[src]

Bit 1 - TXOUT Interrupt Enable

pub fn txstpe(&self) -> TXSTPE_R[src]

Bit 2 - TXSTP Interrupt Enable

pub fn perre(&self) -> PERRE_R[src]

Bit 3 - PERR Interrupt Enable

pub fn nakede(&self) -> NAKEDE_R[src]

Bit 4 - NAKED Interrupt Enable

pub fn errorfie(&self) -> ERRORFIE_R[src]

Bit 5 - ERRORFI Interrupt Enable

pub fn rxstallde(&self) -> RXSTALLDE_R[src]

Bit 6 - RXTALLD Interrupt Enable

pub fn ramacere(&self) -> RAMACERE_R[src]

Bit 10 - RAMACER Interrupt Enable

pub fn nbusybke(&self) -> NBUSYBKE_R[src]

Bit 12 - NBUSYBKInterrupt Enable

pub fn fifocon(&self) -> FIFOCON_R[src]

Bit 14 - FIFO Control

pub fn pfreeze(&self) -> PFREEZE_R[src]

Bit 17 - Pipe Freeze

pub fn initdtgl(&self) -> INITDTGL_R[src]

Bit 18 - Data Toggle Initialization

pub fn initbk(&self) -> INITBK_R[src]

Bit 19 - Bank Initialization

impl R<u32, Reg<u32, _UPINRQ0>>[src]

pub fn inrq(&self) -> INRQ_R[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&self) -> INMODE_R[src]

Bit 8 - IN Request Mode

impl R<u32, Reg<u32, _UPINRQ1>>[src]

pub fn inrq(&self) -> INRQ_R[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&self) -> INMODE_R[src]

Bit 8 - IN Request Mode

impl R<u32, Reg<u32, _UPINRQ2>>[src]

pub fn inrq(&self) -> INRQ_R[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&self) -> INMODE_R[src]

Bit 8 - IN Request Mode

impl R<u32, Reg<u32, _UPINRQ3>>[src]

pub fn inrq(&self) -> INRQ_R[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&self) -> INMODE_R[src]

Bit 8 - IN Request Mode

impl R<u32, Reg<u32, _UPINRQ4>>[src]

pub fn inrq(&self) -> INRQ_R[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&self) -> INMODE_R[src]

Bit 8 - IN Request Mode

impl R<u32, Reg<u32, _UPINRQ5>>[src]

pub fn inrq(&self) -> INRQ_R[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&self) -> INMODE_R[src]

Bit 8 - IN Request Mode

impl R<u32, Reg<u32, _UPINRQ6>>[src]

pub fn inrq(&self) -> INRQ_R[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&self) -> INMODE_R[src]

Bit 8 - IN Request Mode

impl R<u32, Reg<u32, _UPINRQ7>>[src]

pub fn inrq(&self) -> INRQ_R[src]

Bits 0:7 - IN Request Number before Freeze

pub fn inmode(&self) -> INMODE_R[src]

Bit 8 - IN Request Mode

impl R<u32, Reg<u32, _UPRST>>[src]

pub fn pen0(&self) -> PEN0_R[src]

Bit 0 - Pipe0 Enable

pub fn pen1(&self) -> PEN1_R[src]

Bit 1 - Pipe1 Enable

pub fn pen2(&self) -> PEN2_R[src]

Bit 2 - Pipe2 Enable

pub fn pen3(&self) -> PEN3_R[src]

Bit 3 - Pipe3 Enable

pub fn pen4(&self) -> PEN4_R[src]

Bit 4 - Pipe4 Enable

pub fn pen5(&self) -> PEN5_R[src]

Bit 5 - Pipe5 Enable

pub fn pen6(&self) -> PEN6_R[src]

Bit 6 - Pipe6 Enable

pub fn pen7(&self) -> PEN7_R[src]

Bit 7 - Pipe7 Enable

impl R<u32, Reg<u32, _UPSTA0>>[src]

pub fn rxini(&self) -> RXINI_R[src]

Bit 0 - Received IN Data Interrupt

pub fn txouti(&self) -> TXOUTI_R[src]

Bit 1 - Transmitted OUT Data Interrupt

pub fn txstpi(&self) -> TXSTPI_R[src]

Bit 2 - Transmitted SETUP Interrupt

pub fn perri(&self) -> PERRI_R[src]

Bit 3 - Pipe Error Interrupt

pub fn nakedi(&self) -> NAKEDI_R[src]

Bit 4 - NAKed Interrupt

pub fn errorfi(&self) -> ERRORFI_R[src]

Bit 5 - Errorflow Interrupt

pub fn rxstalldi(&self) -> RXSTALLDI_R[src]

Bit 6 - Received STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 10 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number of Busy Bank

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

impl R<u32, Reg<u32, _UPSTA1>>[src]

pub fn rxini(&self) -> RXINI_R[src]

Bit 0 - Received IN Data Interrupt

pub fn txouti(&self) -> TXOUTI_R[src]

Bit 1 - Transmitted OUT Data Interrupt

pub fn txstpi(&self) -> TXSTPI_R[src]

Bit 2 - Transmitted SETUP Interrupt

pub fn perri(&self) -> PERRI_R[src]

Bit 3 - Pipe Error Interrupt

pub fn nakedi(&self) -> NAKEDI_R[src]

Bit 4 - NAKed Interrupt

pub fn errorfi(&self) -> ERRORFI_R[src]

Bit 5 - Errorflow Interrupt

pub fn rxstalldi(&self) -> RXSTALLDI_R[src]

Bit 6 - Received STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 10 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number of Busy Bank

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

impl R<u32, Reg<u32, _UPSTA2>>[src]

pub fn rxini(&self) -> RXINI_R[src]

Bit 0 - Received IN Data Interrupt

pub fn txouti(&self) -> TXOUTI_R[src]

Bit 1 - Transmitted OUT Data Interrupt

pub fn txstpi(&self) -> TXSTPI_R[src]

Bit 2 - Transmitted SETUP Interrupt

pub fn perri(&self) -> PERRI_R[src]

Bit 3 - Pipe Error Interrupt

pub fn nakedi(&self) -> NAKEDI_R[src]

Bit 4 - NAKed Interrupt

pub fn errorfi(&self) -> ERRORFI_R[src]

Bit 5 - Errorflow Interrupt

pub fn rxstalldi(&self) -> RXSTALLDI_R[src]

Bit 6 - Received STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 10 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number of Busy Bank

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

impl R<u32, Reg<u32, _UPSTA3>>[src]

pub fn rxini(&self) -> RXINI_R[src]

Bit 0 - Received IN Data Interrupt

pub fn txouti(&self) -> TXOUTI_R[src]

Bit 1 - Transmitted OUT Data Interrupt

pub fn txstpi(&self) -> TXSTPI_R[src]

Bit 2 - Transmitted SETUP Interrupt

pub fn perri(&self) -> PERRI_R[src]

Bit 3 - Pipe Error Interrupt

pub fn nakedi(&self) -> NAKEDI_R[src]

Bit 4 - NAKed Interrupt

pub fn errorfi(&self) -> ERRORFI_R[src]

Bit 5 - Errorflow Interrupt

pub fn rxstalldi(&self) -> RXSTALLDI_R[src]

Bit 6 - Received STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 10 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number of Busy Bank

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

impl R<u32, Reg<u32, _UPSTA4>>[src]

pub fn rxini(&self) -> RXINI_R[src]

Bit 0 - Received IN Data Interrupt

pub fn txouti(&self) -> TXOUTI_R[src]

Bit 1 - Transmitted OUT Data Interrupt

pub fn txstpi(&self) -> TXSTPI_R[src]

Bit 2 - Transmitted SETUP Interrupt

pub fn perri(&self) -> PERRI_R[src]

Bit 3 - Pipe Error Interrupt

pub fn nakedi(&self) -> NAKEDI_R[src]

Bit 4 - NAKed Interrupt

pub fn errorfi(&self) -> ERRORFI_R[src]

Bit 5 - Errorflow Interrupt

pub fn rxstalldi(&self) -> RXSTALLDI_R[src]

Bit 6 - Received STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 10 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number of Busy Bank

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

impl R<u32, Reg<u32, _UPSTA5>>[src]

pub fn rxini(&self) -> RXINI_R[src]

Bit 0 - Received IN Data Interrupt

pub fn txouti(&self) -> TXOUTI_R[src]

Bit 1 - Transmitted OUT Data Interrupt

pub fn txstpi(&self) -> TXSTPI_R[src]

Bit 2 - Transmitted SETUP Interrupt

pub fn perri(&self) -> PERRI_R[src]

Bit 3 - Pipe Error Interrupt

pub fn nakedi(&self) -> NAKEDI_R[src]

Bit 4 - NAKed Interrupt

pub fn errorfi(&self) -> ERRORFI_R[src]

Bit 5 - Errorflow Interrupt

pub fn rxstalldi(&self) -> RXSTALLDI_R[src]

Bit 6 - Received STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 10 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number of Busy Bank

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

impl R<u32, Reg<u32, _UPSTA6>>[src]

pub fn rxini(&self) -> RXINI_R[src]

Bit 0 - Received IN Data Interrupt

pub fn txouti(&self) -> TXOUTI_R[src]

Bit 1 - Transmitted OUT Data Interrupt

pub fn txstpi(&self) -> TXSTPI_R[src]

Bit 2 - Transmitted SETUP Interrupt

pub fn perri(&self) -> PERRI_R[src]

Bit 3 - Pipe Error Interrupt

pub fn nakedi(&self) -> NAKEDI_R[src]

Bit 4 - NAKed Interrupt

pub fn errorfi(&self) -> ERRORFI_R[src]

Bit 5 - Errorflow Interrupt

pub fn rxstalldi(&self) -> RXSTALLDI_R[src]

Bit 6 - Received STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 10 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number of Busy Bank

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

impl R<u32, Reg<u32, _UPSTA7>>[src]

pub fn rxini(&self) -> RXINI_R[src]

Bit 0 - Received IN Data Interrupt

pub fn txouti(&self) -> TXOUTI_R[src]

Bit 1 - Transmitted OUT Data Interrupt

pub fn txstpi(&self) -> TXSTPI_R[src]

Bit 2 - Transmitted SETUP Interrupt

pub fn perri(&self) -> PERRI_R[src]

Bit 3 - Pipe Error Interrupt

pub fn nakedi(&self) -> NAKEDI_R[src]

Bit 4 - NAKed Interrupt

pub fn errorfi(&self) -> ERRORFI_R[src]

Bit 5 - Errorflow Interrupt

pub fn rxstalldi(&self) -> RXSTALLDI_R[src]

Bit 6 - Received STALLed Interrupt

pub fn dtseq(&self) -> DTSEQ_R[src]

Bits 8:9 - Data Toggle Sequence

pub fn ramaceri(&self) -> RAMACERI_R[src]

Bit 10 - Ram Access Error Interrupt

pub fn nbusybk(&self) -> NBUSYBK_R[src]

Bits 12:13 - Number of Busy Bank

pub fn currbk(&self) -> CURRBK_R[src]

Bits 14:15 - Current Bank

impl R<u32, Reg<u32, _USBCON>>[src]

pub fn frzclk(&self) -> FRZCLK_R[src]

Bit 14 - Freeze USB Clock

pub fn usbe(&self) -> USBE_R[src]

Bit 15 - USBC Enable

pub fn uimod(&self) -> UIMOD_R[src]

Bit 24 - USBC Mode

impl R<u8, DRDSTATE_A>[src]

pub fn variant(&self) -> DRDSTATE_A[src]

Get enumerated values variant

pub fn is_a_idle(&self) -> bool[src]

Checks if the value of the field is A_IDLE

pub fn is_a_wait_vrise(&self) -> bool[src]

Checks if the value of the field is A_WAIT_VRISE

pub fn is_a_wait_bcon(&self) -> bool[src]

Checks if the value of the field is A_WAIT_BCON

pub fn is_a_host(&self) -> bool[src]

Checks if the value of the field is A_HOST

pub fn is_a_suspend(&self) -> bool[src]

Checks if the value of the field is A_SUSPEND

pub fn is_a_peripheral(&self) -> bool[src]

Checks if the value of the field is A_PERIPHERAL

pub fn is_a_wait_vfall(&self) -> bool[src]

Checks if the value of the field is A_WAIT_VFALL

pub fn is_a_vbus_err(&self) -> bool[src]

Checks if the value of the field is A_VBUS_ERR

pub fn is_a_wait_discharge(&self) -> bool[src]

Checks if the value of the field is A_WAIT_DISCHARGE

pub fn is_b_idle(&self) -> bool[src]

Checks if the value of the field is B_IDLE

pub fn is_b_peripheral(&self) -> bool[src]

Checks if the value of the field is B_PERIPHERAL

pub fn is_b_wait_begin_hnp(&self) -> bool[src]

Checks if the value of the field is B_WAIT_BEGIN_HNP

pub fn is_b_wait_discharge(&self) -> bool[src]

Checks if the value of the field is B_WAIT_DISCHARGE

pub fn is_b_wait_acon(&self) -> bool[src]

Checks if the value of the field is B_WAIT_ACON

pub fn is_b_host(&self) -> bool[src]

Checks if the value of the field is B_HOST

pub fn is_b_srp_init(&self) -> bool[src]

Checks if the value of the field is B_SRP_INIT

impl R<u32, Reg<u32, _USBFSM>>[src]

pub fn drdstate(&self) -> DRDSTATE_R[src]

Bits 0:3 - DualRoleDevice state

impl R<u8, SPEED_A>[src]

pub fn variant(&self) -> Variant<u8, SPEED_A>[src]

Get enumerated values variant

pub fn is_full(&self) -> bool[src]

Checks if the value of the field is FULL

pub fn is_high(&self) -> bool[src]

Checks if the value of the field is HIGH

pub fn is_low(&self) -> bool[src]

Checks if the value of the field is LOW

impl R<u32, Reg<u32, _USBSTA>>[src]

pub fn vbusrq(&self) -> VBUSRQ_R[src]

Bit 9 - VBus Request

pub fn speed(&self) -> SPEED_R[src]

Bits 12:13 - Speed Status

pub fn clkusable(&self) -> CLKUSABLE_R[src]

Bit 14 - USB Clock Usable

pub fn suspend(&self) -> SUSPEND_R[src]

Bit 16 - Suspend module state

impl R<u32, Reg<u32, _UVERS>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version Number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:18 - Variant Number

impl R<bool, EN_A>[src]

pub fn variant(&self) -> EN_A[src]

Get enumerated values variant

pub fn is_0(&self) -> bool[src]

Checks if the value of the field is _0

pub fn is_1(&self) -> bool[src]

Checks if the value of the field is _1

impl R<u32, Reg<u32, _CTRL>>[src]

pub fn en(&self) -> EN_R[src]

Bit 0 - WDT Enable

pub fn dar(&self) -> DAR_R[src]

Bit 1 - WDT Disable After Reset

pub fn mode(&self) -> MODE_R[src]

Bit 2 - WDT Mode

pub fn sfv(&self) -> SFV_R[src]

Bit 3 - WDT Store Final Value

pub fn im(&self) -> IM_R[src]

Bit 4 - WDT Interruput Mode

pub fn fcd(&self) -> FCD_R[src]

Bit 7 - WDT Fuse Calibration Done

pub fn psel(&self) -> PSEL_R[src]

Bits 8:12 - Timeout Prescale Select

pub fn cssel1(&self) -> CSSEL1_R[src]

Bit 14 - Clock Source Selection1

pub fn cen(&self) -> CEN_R[src]

Bit 16 - Clock Enable

pub fn cssel(&self) -> CSSEL_R[src]

Bit 17 - Clock Source Selection0

pub fn tban(&self) -> TBAN_R[src]

Bits 18:22 - TBAN Prescale Select

pub fn key(&self) -> KEY_R[src]

Bits 24:31 - Key

impl R<u32, Reg<u32, _IMR>>[src]

pub fn wint(&self) -> WINT_R[src]

Bit 2 - Watchdog Interrupt

impl R<u32, Reg<u32, _ISR>>[src]

pub fn wint(&self) -> WINT_R[src]

Bit 2 - Watchdog Interrupt

impl R<u32, Reg<u32, _SR>>[src]

pub fn window(&self) -> WINDOW_R[src]

Bit 0 - WDT in window

pub fn cleared(&self) -> CLEARED_R[src]

Bit 1 - WDT cleared

impl R<u32, Reg<u32, _VERSION>>[src]

pub fn version(&self) -> VERSION_R[src]

Bits 0:11 - Version number

pub fn variant(&self) -> VARIANT_R[src]

Bits 16:19 - Variant number

Trait Implementations

impl<U, T, FI> PartialEq<FI> for R<U, T> where
    U: PartialEq,
    FI: Copy + Into<U>, 
[src]

Auto Trait Implementations

impl<U, T> Send for R<U, T> where
    T: Send,
    U: Send

impl<U, T> Sync for R<U, T> where
    T: Sync,
    U: Sync

impl<U, T> Unpin for R<U, T> where
    T: Unpin,
    U: Unpin

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.