Struct atsam4lc8b_pac::tc0::RegisterBlock[][src]

#[repr(C)]
pub struct RegisterBlock {
Show 35 fields pub ccr0: Reg<CCR_SPEC>, pub smmr0: Reg<SMMR_SPEC>, pub cv0: Reg<CV_SPEC>, pub ra0: Reg<RA_SPEC>, pub rb0: Reg<RB_SPEC>, pub rc0: Reg<RC_SPEC>, pub sr0: Reg<SR_SPEC>, pub ier0: Reg<IER_SPEC>, pub idr0: Reg<IDR_SPEC>, pub imr0: Reg<IMR_SPEC>, pub ccr1: Reg<CCR_SPEC>, pub smmr1: Reg<SMMR_SPEC>, pub cv1: Reg<CV_SPEC>, pub ra1: Reg<RA_SPEC>, pub rb1: Reg<RB_SPEC>, pub rc1: Reg<RC_SPEC>, pub sr1: Reg<SR_SPEC>, pub ier1: Reg<IER_SPEC>, pub idr1: Reg<IDR_SPEC>, pub imr1: Reg<IMR_SPEC>, pub ccr2: Reg<CCR_SPEC>, pub smmr2: Reg<SMMR_SPEC>, pub cv2: Reg<CV_SPEC>, pub ra2: Reg<RA_SPEC>, pub rb2: Reg<RB_SPEC>, pub rc2: Reg<RC_SPEC>, pub sr2: Reg<SR_SPEC>, pub ier2: Reg<IER_SPEC>, pub idr2: Reg<IDR_SPEC>, pub imr2: Reg<IMR_SPEC>, pub bcr: Reg<BCR_SPEC>, pub bmr: Reg<BMR_SPEC>, pub wpmr: Reg<WPMR_SPEC>, pub features: Reg<FEATURES_SPEC>, pub version: Reg<VERSION_SPEC>, // some fields omitted
}
Expand description

Register block

Fields

ccr0: Reg<CCR_SPEC>

0x00 - Channel Control Register Channel

smmr0: Reg<SMMR_SPEC>

0x08 - Stepper Motor Mode Register

cv0: Reg<CV_SPEC>

0x10 - Counter Value Channel

ra0: Reg<RA_SPEC>

0x14 - Register A Channel

rb0: Reg<RB_SPEC>

0x18 - Register B Channel

rc0: Reg<RC_SPEC>

0x1c - Register C Channel

sr0: Reg<SR_SPEC>

0x20 - Status Register Channel

ier0: Reg<IER_SPEC>

0x24 - Interrupt Enable Register Channel

idr0: Reg<IDR_SPEC>

0x28 - Interrupt Disable Register Channel

imr0: Reg<IMR_SPEC>

0x2c - Interrupt Mask Register Channel

ccr1: Reg<CCR_SPEC>

0x40 - Channel Control Register Channel

smmr1: Reg<SMMR_SPEC>

0x48 - Stepper Motor Mode Register

cv1: Reg<CV_SPEC>

0x50 - Counter Value Channel

ra1: Reg<RA_SPEC>

0x54 - Register A Channel

rb1: Reg<RB_SPEC>

0x58 - Register B Channel

rc1: Reg<RC_SPEC>

0x5c - Register C Channel

sr1: Reg<SR_SPEC>

0x60 - Status Register Channel

ier1: Reg<IER_SPEC>

0x64 - Interrupt Enable Register Channel

idr1: Reg<IDR_SPEC>

0x68 - Interrupt Disable Register Channel

imr1: Reg<IMR_SPEC>

0x6c - Interrupt Mask Register Channel

ccr2: Reg<CCR_SPEC>

0x80 - Channel Control Register Channel

smmr2: Reg<SMMR_SPEC>

0x88 - Stepper Motor Mode Register

cv2: Reg<CV_SPEC>

0x90 - Counter Value Channel

ra2: Reg<RA_SPEC>

0x94 - Register A Channel

rb2: Reg<RB_SPEC>

0x98 - Register B Channel

rc2: Reg<RC_SPEC>

0x9c - Register C Channel

sr2: Reg<SR_SPEC>

0xa0 - Status Register Channel

ier2: Reg<IER_SPEC>

0xa4 - Interrupt Enable Register Channel

idr2: Reg<IDR_SPEC>

0xa8 - Interrupt Disable Register Channel

imr2: Reg<IMR_SPEC>

0xac - Interrupt Mask Register Channel

bcr: Reg<BCR_SPEC>

0xc0 - TC Block Control Register

bmr: Reg<BMR_SPEC>

0xc4 - TC Block Mode Register

wpmr: Reg<WPMR_SPEC>

0xe4 - Write Protect Mode Register

features: Reg<FEATURES_SPEC>

0xf8 - Features Register

version: Reg<VERSION_SPEC>

0xfc - Version Register

Implementations

0x04 - Channel Mode Register Channel

0x04 - Channel Mode Register Channel

0x44 - Channel Mode Register Channel

0x44 - Channel Mode Register Channel

0x84 - Channel Mode Register Channel

0x84 - Channel Mode Register Channel

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