Struct atsam4lc8b_pac::pevc::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 20 fields
pub chsr: Reg<CHSR_SPEC>,
pub cher: Reg<CHER_SPEC>,
pub chdr: Reg<CHDR_SPEC>,
pub sev: Reg<SEV_SPEC>,
pub busy: Reg<BUSY_SPEC>,
pub trier: Reg<TRIER_SPEC>,
pub tridr: Reg<TRIDR_SPEC>,
pub trimr: Reg<TRIMR_SPEC>,
pub trsr: Reg<TRSR_SPEC>,
pub trscr: Reg<TRSCR_SPEC>,
pub ovier: Reg<OVIER_SPEC>,
pub ovidr: Reg<OVIDR_SPEC>,
pub ovimr: Reg<OVIMR_SPEC>,
pub ovsr: Reg<OVSR_SPEC>,
pub ovscr: Reg<OVSCR_SPEC>,
pub chmx: [Reg<CHMX_SPEC>; 19],
pub evs: [Reg<EVS_SPEC>; 31],
pub igfdr: Reg<IGFDR_SPEC>,
pub parameter: Reg<PARAMETER_SPEC>,
pub version: Reg<VERSION_SPEC>,
// some fields omitted
}
Expand description
Register block
Fields
chsr: Reg<CHSR_SPEC>
0x00 - Channel Status Register
cher: Reg<CHER_SPEC>
0x04 - Channel Enable Register
chdr: Reg<CHDR_SPEC>
0x08 - Channel Disable Register
sev: Reg<SEV_SPEC>
0x10 - Software Event
busy: Reg<BUSY_SPEC>
0x14 - Channel / User Busy
trier: Reg<TRIER_SPEC>
0x20 - Trigger Interrupt Mask Enable Register
tridr: Reg<TRIDR_SPEC>
0x24 - Trigger Interrupt Mask Disable Register
trimr: Reg<TRIMR_SPEC>
0x28 - Trigger Interrupt Mask Register
trsr: Reg<TRSR_SPEC>
0x30 - Trigger Status Register
trscr: Reg<TRSCR_SPEC>
0x34 - Trigger Status Clear Register
ovier: Reg<OVIER_SPEC>
0x40 - Overrun Interrupt Mask Enable Register
ovidr: Reg<OVIDR_SPEC>
0x44 - Overrun Interrupt Mask Disable Register
ovimr: Reg<OVIMR_SPEC>
0x48 - Overrun Interrupt Mask Register
ovsr: Reg<OVSR_SPEC>
0x50 - Overrun Status Register
ovscr: Reg<OVSCR_SPEC>
0x54 - Overrun Status Clear Register
chmx: [Reg<CHMX_SPEC>; 19]
0x100..0x14c - Channel Multiplexer
evs: [Reg<EVS_SPEC>; 31]
0x200..0x27c - Event Shaper
igfdr: Reg<IGFDR_SPEC>
0x300 - Input Glitch Filter Divider Register
parameter: Reg<PARAMETER_SPEC>
0x3f8 - Parameter
version: Reg<VERSION_SPEC>
0x3fc - Version