Struct atsam4lc8b_pac::lcdca::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 26 fields
pub cr: Reg<CR_SPEC>,
pub cfg: Reg<CFG_SPEC>,
pub tim: Reg<TIM_SPEC>,
pub sr: Reg<SR_SPEC>,
pub scr: Reg<SCR_SPEC>,
pub drl0: Reg<DRL0_SPEC>,
pub drh0: Reg<DRH0_SPEC>,
pub drl1: Reg<DRL1_SPEC>,
pub drh1: Reg<DRH1_SPEC>,
pub drl2: Reg<DRL2_SPEC>,
pub drh2: Reg<DRH2_SPEC>,
pub drl3: Reg<DRL3_SPEC>,
pub drh3: Reg<DRH3_SPEC>,
pub iadr: Reg<IADR_SPEC>,
pub bcfg: Reg<BCFG_SPEC>,
pub csrcfg: Reg<CSRCFG_SPEC>,
pub cmcfg: Reg<CMCFG_SPEC>,
pub cmdr: Reg<CMDR_SPEC>,
pub acmcfg: Reg<ACMCFG_SPEC>,
pub acmdr: Reg<ACMDR_SPEC>,
pub abmcfg: Reg<ABMCFG_SPEC>,
pub abmdr: Reg<ABMDR_SPEC>,
pub ier: Reg<IER_SPEC>,
pub idr: Reg<IDR_SPEC>,
pub imr: Reg<IMR_SPEC>,
pub version: Reg<VERSION_SPEC>,
}
Expand description
Register block
Fields
cr: Reg<CR_SPEC>
0x00 - Control Register
cfg: Reg<CFG_SPEC>
0x04 - Configuration Register
tim: Reg<TIM_SPEC>
0x08 - Timing Register
sr: Reg<SR_SPEC>
0x0c - Status Register
scr: Reg<SCR_SPEC>
0x10 - Status Clear Register
drl0: Reg<DRL0_SPEC>
0x14 - Data Register Low 0
drh0: Reg<DRH0_SPEC>
0x18 - Data Register High 0
drl1: Reg<DRL1_SPEC>
0x1c - Data Register Low 1
drh1: Reg<DRH1_SPEC>
0x20 - Data Register High 1
drl2: Reg<DRL2_SPEC>
0x24 - Data Register Low 2
drh2: Reg<DRH2_SPEC>
0x28 - Data Register High 2
drl3: Reg<DRL3_SPEC>
0x2c - Data Register Low 3
drh3: Reg<DRH3_SPEC>
0x30 - Data Register High 3
iadr: Reg<IADR_SPEC>
0x34 - Indirect Access Data Register
bcfg: Reg<BCFG_SPEC>
0x38 - Blink Configuration Register
csrcfg: Reg<CSRCFG_SPEC>
0x3c - Circular Shift Register Configuration
cmcfg: Reg<CMCFG_SPEC>
0x40 - Character Mapping Configuration Register
cmdr: Reg<CMDR_SPEC>
0x44 - Character Mapping Data Register
acmcfg: Reg<ACMCFG_SPEC>
0x48 - Automated Character Mapping Configuration Register
acmdr: Reg<ACMDR_SPEC>
0x4c - Automated Character Mapping Data Register
abmcfg: Reg<ABMCFG_SPEC>
0x50 - Automated Bit Mapping Configuration Register
abmdr: Reg<ABMDR_SPEC>
0x54 - Automated Bit Mapping Data Register
ier: Reg<IER_SPEC>
0x58 - Interrupt Enable Register
idr: Reg<IDR_SPEC>
0x5c - Interrupt Disable Register
imr: Reg<IMR_SPEC>
0x60 - Interrupt Mask Register
version: Reg<VERSION_SPEC>
0x64 - Version Register