[−][src]Struct ambiq_apollo3_pac::gpio::altpadcfgc::R
Value read from the register
Methods
impl R[src]
pub fn bits(&self) -> u32[src]
Value of the register as raw bits
pub fn pad11_sr(&self) -> PAD11_SRR[src]
Bit 28 - Pad 11 slew rate selection.
pub fn pad11_ds1(&self) -> PAD11_DS1R[src]
Bit 24 - Pad 11 high order drive strength selection. Used in conjunction with PAD11STRNG field to set the pad drive strength.
pub fn pad10_sr(&self) -> PAD10_SRR[src]
Bit 20 - Pad 10 slew rate selection.
pub fn pad10_ds1(&self) -> PAD10_DS1R[src]
Bit 16 - Pad 10 high order drive strength selection. Used in conjunction with PAD10STRNG field to set the pad drive strength.
pub fn pad9_sr(&self) -> PAD9_SRR[src]
Bit 12 - Pad 9 slew rate selection.
pub fn pad9_ds1(&self) -> PAD9_DS1R[src]
Bit 8 - Pad 9 high order drive strength selection. Used in conjunction with PAD9STRNG field to set the pad drive strength.
pub fn pad8_sr(&self) -> PAD8_SRR[src]
Bit 4 - Pad 8 slew rate selection.
pub fn pad8_ds1(&self) -> PAD8_DS1R[src]
Bit 0 - Pad 8 high order drive strength selection. Used in conjunction with PAD8STRNG field to set the pad drive strength.
Auto Trait Implementations
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