Trait cranelift_codegen::MachInst

source · 
pub trait MachInst: Clone + Debug {
    type ABIMachineSpec: ABIMachineSpec<I = Self>;
    type LabelUse: MachInstLabelUse;


Show 17 methods    fn get_operands<F: Fn(VReg) -> VReg>(
        &self,
        collector: &mut OperandCollector<'_, F>
    );
    fn is_move(&self) -> Option<(Writable<Reg>, Reg)>;
    fn is_term(&self) -> MachTerminator;
    fn is_trap(&self) -> bool;
    fn is_args(&self) -> bool;
    fn is_included_in_clobbers(&self) -> bool;
    fn gen_move(to_reg: Writable<Reg>, from_reg: Reg, ty: Type) -> Self;
    fn gen_dummy_use(reg: Reg) -> Self;
    fn rc_for_type(
        ty: Type
    ) -> CodegenResult<(&'static [RegClass], &'static [Type])>;
    fn canonical_type_for_rc(rc: RegClass) -> Type;
    fn gen_jump(target: MachLabel) -> Self;
    fn gen_nop(preferred_size: usize) -> Self;
    fn worst_case_size() -> CodeOffset;
    fn ref_type_regclass(_flags: &Flags) -> RegClass;
    fn is_safepoint(&self) -> bool;

    fn align_basic_block(offset: CodeOffset) -> CodeOffset { ... }
    fn gen_block_start(
        _is_indirect_branch_target: bool,
        _is_forward_edge_cfi_enabled: bool
    ) -> Option<Self> { ... }

}
Expand description

A machine instruction.

Required Associated Types§

The ABI machine spec for this MachInst.

A label-use kind: a type that describes the types of label references that can occur in an instruction.

Required Methods§

Return the registers referenced by this machine instruction along with the modes of reference (use, def, modify).

If this is a simple move, return the (source, destination) tuple of registers.

Is this a terminator (branch or ret)? If so, return its type (ret/uncond/cond) and target if applicable.

Is this an unconditional trap?

Is this an “args” pseudoinst?

Should this instruction be included in the clobber-set?

Generate a move.

Generate a dummy instruction that will keep a value alive but has no other purpose.

Determine register class(es) to store the given Cranelift type, and the Cranelift type actually stored in the underlying register(s). May return an error if the type isn’t supported by this backend.

If the type requires multiple registers, then the list of registers is returned in little-endian order.

Note that the type actually stored in the register(s) may differ in the case that a value is split across registers: for example, on a 32-bit target, an I64 may be stored in two registers, each of which holds an I32. The actually-stored types are used only to inform the backend when generating spills and reloads for individual registers.

Get an appropriate type that can fully hold a value in a given register class. This may not be the only type that maps to that class, but when used with gen_move() or the ABI trait’s load/spill constructors, it should produce instruction(s) that move the entire register contents.

Generate a jump to another target. Used during lowering of control flow.

Generate a NOP. The preferred_size parameter allows the caller to request a NOP of that size, or as close to it as possible. The machine backend may return a NOP whose binary encoding is smaller than the preferred size, but must not return a NOP that is larger. However, the instruction must have a nonzero size if preferred_size is nonzero.

What is the worst-case instruction size emitted by this instruction type?

What is the register class used for reference types (GC-observable pointers)? Can be dependent on compilation flags.

Is this a safepoint?

Provided Methods§

Align a basic block offset (from start of function). By default, no alignment occurs.

Generate an instruction that must appear at the beginning of a basic block, if any. Note that the return value must not be subject to register allocation.

Implementors§