Struct cranelift_codegen::isa::BranchRange
source · Expand description
Constraints on the range of a branch instruction.
A branch instruction usually encodes its destination as a signed n-bit offset from an origin. The origin depends on the ISA and the specific instruction:
- RISC-V and ARM Aarch64 use the address of the branch instruction,
origin = 0
. - x86 uses the address of the instruction following the branch,
origin = 2
for a 2-byte branch instruction. - ARM’s A32 encoding uses the address of the branch instruction + 8 bytes,
origin = 8
.
Fields§
§origin: u8
Offset in bytes from the address of the branch instruction to the origin used for computing the branch displacement. This is the destination of a branch that encodes a 0 displacement.
bits: u8
Number of bits in the signed byte displacement encoded in the instruction. This does not account for branches that can only target aligned addresses.
Implementations§
source§impl BranchRange
impl BranchRange
sourcepub fn contains(self, branch: CodeOffset, dest: CodeOffset) -> bool
pub fn contains(self, branch: CodeOffset, dest: CodeOffset) -> bool
Determine if this branch range can represent the range from branch
to dest
, where
branch
is the code offset of the branch instruction itself and dest
is the code offset
of the destination EBB header.
This method does not detect if the range is larger than 2 GB.
Trait Implementations§
source§impl Clone for BranchRange
impl Clone for BranchRange
source§fn clone(&self) -> BranchRange
fn clone(&self) -> BranchRange
1.0.0 · source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source
. Read more