Expand description
Exact ordered-qargs lowering to a concrete device instruction set.
Routing deliberately uses an undirected connectivity projection. This transform runs after routing and closes the remaining ISA gap: every gate-like operation is either retained as an exact native capability or lowered through a finite, recursively verified plan whose leaves are exact device capabilities. A separate device verifier remains the terminal safety boundary for each finalized candidate. Enhanced workflow selection may run afterward, but it only chooses among candidates that crossed that boundary.
Emission fuses buffered one-qubit runs on each qubit before they reach the
output: exact peephole merges (RZ accumulation, X2P/X2M pairs,
inverse-pair cancellation) run first, and a run is then replaced by a
re-synthesized RZ/U plan only when the fused form has both strictly
fewer native leaves and strictly better calibrated physical cost. Fusion
therefore never grows the lowered circuit or trades fidelity for gate count.
Structs§
- Device
Lowerer - Lowers a routed physical circuit to one device’s exact native instruction capabilities, including ordered qargs and local capability overrides.