cpu_info/lib.rs
1#[cfg(feature = "linux")]
2pub mod linux;
3
4
5#[cfg(feature = "windows")]
6pub mod windows;
7
8
9
10/// Comprehensive CPU information structure.
11///
12/// This struct contains all relevant information about the system's CPU,
13/// including architecture, manufacturer, model, core counts, and core distribution.
14///
15/// # Examples
16///
17/// ```no_run
18/// use your_crate::CpuInfo;
19///
20/// let cpu_info = CpuInfo::new();
21/// println!("CPU Model: {}", cpu_info.model);
22/// println!("Logical Cores: {:?}", cpu_info.total_logical_cores);
23/// println!("Physical Cores: {:?}", cpu_info.total_physical_cores);
24/// ```
25#[derive(Debug, Clone)]
26pub struct CpuInfo {
27 /// CPU architecture type (x86, x86_64, ARM, ARM64, etc.)
28 pub architecture: CpuArchitecture,
29 /// CPU manufacturer/vendor
30 pub fabricant: Fabricant,
31 /// CPU model name
32 pub model: String,
33 /// Total number of logical cores (threads)
34 pub total_logical_cores: Option<usize>,
35 /// Total number of physical cores
36 pub total_physical_cores: Option<usize>,
37 /// Core distribution information (uniform or hybrid)
38 pub distribution: DistributionCore,
39}
40
41
42
43/// CPU architecture type.
44///
45/// Represents the instruction set architecture of the CPU.
46#[derive(Debug, Clone)]
47pub enum CpuArchitecture {
48 /// 32-bit x86
49 X86,
50 /// 64-bit x86 (AMD64/Intel 64)
51 X86_64,
52 /// 32-bit ARM
53 ARM,
54 /// 64-bit ARM (AArch64)
55 ARM64,
56 /// Unknown or unsupported architecture
57 Unknown,
58}
59
60/// CPU manufacturer/vendor.
61///
62/// Represents the company that designed or manufactured the CPU.
63#[derive(Debug, Clone)]
64pub enum Fabricant {
65 /// Intel Corporation
66 Intel,
67 /// Advanced Micro Devices (AMD)
68 Amd,
69 /// Other manufacturer with vendor string
70 Other(String),
71 /// Unknown manufacturer
72 Unknown,
73}
74
75/// Individual CPU core information.
76///
77/// Contains details about a single logical CPU core (thread).
78#[derive(Debug, Clone)]
79pub struct Core {
80 /// Logical core ID (0-indexed)
81 pub id: u32,
82 /// Core speed in MHz
83 pub speed_mhz: u32,
84 /// Physical core ID this logical core belongs to (for hyperthreading detection)
85 pub physical_core_id: Option<u32>,
86}
87
88impl Core {
89 /// Creates a new `Core` instance.
90 ///
91 /// # Arguments
92 ///
93 /// * `id` - Logical core ID
94 /// * `speed_mhz` - Core speed in MHz
95 /// * `physical_core_id` - Physical core ID (None if unavailable)
96 ///
97 /// # Examples
98 ///
99 /// ```
100 /// use your_crate::Core;
101 ///
102 /// let core = Core::new(0, 3600, Some(0));
103 /// assert_eq!(core.id, 0);
104 /// assert_eq!(core.speed_mhz, 3600);
105 /// ```
106 pub fn new(id: u32, speed_mhz: u32, physical_core_id: Option<u32>) -> Self {
107 Self {
108 id,
109 speed_mhz,
110 physical_core_id,
111 }
112 }
113}
114
115/// CPU core distribution type.
116///
117/// Describes how CPU cores are organized in terms of frequency:
118/// - Traditional CPUs have all cores running at the same frequency (`Lineal`)
119/// - Hybrid CPUs have cores at different frequencies (`Hybrid`)
120#[derive(Debug, Clone)]
121pub enum DistributionCore {
122 /// All cores have the same frequency (traditional CPUs).
123 ///
124 /// # Examples
125 ///
126 /// - AMD Ryzen 5 5600X (all 6 cores at same speed)
127 /// - Intel Core i7-9700K (all 8 cores at same speed)
128 Lineal {
129 /// Base frequency in MHz
130 mhz: u32,
131 },
132 /// Cores have different frequencies (hybrid architecture).
133 ///
134 /// # Examples
135 ///
136 /// - Intel Core i5-12400 (P-cores and E-cores)
137 /// - Some ARM big.LITTLE configurations
138 /// - AMD CPUs with boost-per-core variations
139 Hybrid {
140 /// Vector of all cores with individual frequencies
141 groups: Vec<Core>,
142 },
143}