gemmbench/
gemmbench.rs

1//! Which side should a small f32 GEMM run on: `gemm_nt`'s own arbitration,
2//! or pinned to the host?
3//!
4//! Written to answer that for the LTX LoRA branch, whose shapes are narrow
5//! (rank 128) against a wide activation. The generic `GemmNt` probe will send
6//! them to the device, where they queue behind the q4tp projection they are
7//! standing beside — the arithmetic is a fraction of the base GEMM's, the
8//! latency is not.
9//!
10//!   cargo run --release -p cortiq-engine --example gemmbench
11
12fn main() {
13    unsafe { std::env::set_var("CMF_GPU", "1") };
14    let cases = [
15        (384usize, 4096usize, 128usize),
16        (384, 128, 4096),
17        (384, 16384, 128),
18        (384, 128, 16384),
19    ];
20    for (n, k, m) in cases {
21        let x = vec![0.01f32; n * k];
22        let w = vec![0.02f32; m * k];
23        let mut y = vec![0f32; n * m];
24        // warm
25        cortiq_engine::fcd_ops::gemm_nt(&x, &w, &mut y, n, k, m, None);
26        let t = std::time::Instant::now();
27        for _ in 0..10 {
28            cortiq_engine::fcd_ops::gemm_nt(&x, &w, &mut y, n, k, m, None);
29        }
30        let d = t.elapsed().as_secs_f64() / 10.0;
31        let g = 2.0 * n as f64 * k as f64 * m as f64 / d / 1e9;
32        let t2 = std::time::Instant::now();
33        for _ in 0..10 {
34            cortiq_engine::gpu::cpu_scope(|| {
35                cortiq_engine::fcd_ops::gemm_nt(&x, &w, &mut y, n, k, m, None)
36            });
37        }
38        let d2 = t2.elapsed().as_secs_f64() / 10.0;
39        let g2 = 2.0 * n as f64 * k as f64 * m as f64 / d2 / 1e9;
40        println!(
41            "{n}x{k}x{m}:  default {:.2} ms ({g:.0} GF/s)   cpu_scope {:.2} ms ({g2:.0} GF/s)",
42            d * 1e3,
43            d2 * 1e3
44        );
45    }
46}
gemmbench/gemmbench.rs

gemmbench/
gemmbench.rs
