Struct cortex_m::peripheral::mpu::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub _type: RO<u32>,
    pub ctrl: RW<u32>,
    pub rnr: RW<u32>,
    pub rbar: RW<u32>,
    pub rlar: RW<u32>,
    pub rbar_a1: RW<u32>,
    pub rlar_a1: RW<u32>,
    pub rbar_a2: RW<u32>,
    pub rlar_a2: RW<u32>,
    pub rbar_a3: RW<u32>,
    pub rlar_a3: RW<u32>,
    pub mair: [RW<u32>; 2],
    /* private fields */
}

Register block for ARMv8-M

Fields

_type: RO<u32>

Type

ctrl: RW<u32>

Control

rnr: RW<u32>

Region Number

rbar: RW<u32>

Region Base Address

rlar: RW<u32>

Region Limit Address

rbar_a1: RW<u32>

Alias 1 of RBAR

rlar_a1: RW<u32>

Alias 1 of RLAR

rbar_a2: RW<u32>

Alias 2 of RBAR

rlar_a2: RW<u32>

Alias 2 of RLAR

rbar_a3: RW<u32>

Alias 3 of RBAR

rlar_a3: RW<u32>

Alias 3 of RLAR

mair: [RW<u32>; 2]

Memory Attribute Indirection register 0 and 1