Low level access to Cortex-M processors
This crate provides:
- Access to core peripherals like NVIC, SCB and SysTick.
- Access to core registers like CONTROL, MSP and PSR.
- Interrupt manipulation mechanisms
- Safe wrappers around Cortex-M specific instructions like
When this feature is enabled the implementation of all the functions inside the
register modules use inline assembly (
llvm_asm!) instead of external assembly (FFI into separate
assembly files pre-compiled using
arm-none-eabi-gcc). The advantages of enabling
Reduced overhead. FFI eliminates the possibility of inlining so all operations include a function call overhead when
inline-asmis not enabled.
Some of the
registerAPI only becomes available only when
inline-asmis enabled. Check the API docs for details.
The disadvantage is that
inline-asm requires a nightly toolchain.
This crate is guaranteed to compile on stable Rust 1.36 and up. It might compile with older versions but that may change in any new patch release.
Miscellaneous assembly instructions
Instrumentation Trace Macrocell
Processor core registers
Macro for sending a formatted string through an ITM channel
Macro for sending a formatted string through an ITM channel, with a newline.
Macro to create a mutable reference to a statically allocated value