Crate cortex_m [−] [src]
Low level access to Cortex-M processors
This crate provides:
- Access to core peripherals like NVIC, SCB and SysTick.
- Access to core registers like CONTROL, MSP and PSR.
- Interrupt manipulation mechanisms
- Data structures like the vector table
- Safe wrappers around assembly instructions like
bkpt
Reexports
pub extern crate cortex_m_semihosting as semihosting; |
Modules
asm |
Miscellaneous assembly instructions |
ctxt |
Interrupt / Exception context local data |
exception |
Exceptions |
interrupt |
Interrupts |
itm |
Instrumentation Trace Macrocell |
peripheral |
Core peripherals |
register |
Processor core registers |
Macros
ehprint |
Macro for printing to the host's standard stderr |
ehprintln |
Macro for printing to the host's standard error, with a newline. |
hprint |
Macro for printing to the host's standard output |
hprintln |
Macro for printing to the host's standard output, with a newline. |
iprint |
Macro for sending a formatted string through an ITM channel |
iprintln |
Macro for sending a formatted string through an ITM channel, with a newline. |
Enums
Reserved |
A reserved spot in the vector table |