cortex_ar/register/
pmselr.rs

1//! Code for managing PMSELR (*Performance Monitors Event Counter Selection Register*)
2
3use crate::register::{SysReg, SysRegRead, SysRegWrite};
4
5/// PMSELR (*Performance Monitors Event Counter Selection Register*)
6#[derive(Debug, Clone, Copy)]
7#[cfg_attr(feature = "defmt", derive(defmt::Format))]
8#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
9pub struct Pmselr(pub u32);
10impl SysReg for Pmselr {
11    const CP: u32 = 15;
12    const CRN: u32 = 9;
13    const OP1: u32 = 0;
14    const CRM: u32 = 12;
15    const OP2: u32 = 5;
16}
17impl crate::register::SysRegRead for Pmselr {}
18impl Pmselr {
19    #[inline]
20    /// Reads PMSELR (*Performance Monitors Event Counter Selection Register*)
21    pub fn read() -> Pmselr {
22        unsafe { Self(<Self as SysRegRead>::read_raw()) }
23    }
24}
25impl crate::register::SysRegWrite for Pmselr {}
26impl Pmselr {
27    #[inline]
28    /// Writes PMSELR (*Performance Monitors Event Counter Selection Register*)
29    ///
30    /// # Safety
31    ///
32    /// Ensure that this value is appropriate for this register
33    pub unsafe fn write(value: Self) {
34        unsafe {
35            <Self as SysRegWrite>::write_raw(value.0);
36        }
37    }
38}
cortex_ar/register/pmselr.rs

cortex_ar/register/
pmselr.rs
