cortex_ar/register/
mpuir.rs

1//! Code for managing MPUIR (*MPU Type Register*)
2
3use crate::register::{SysReg, SysRegRead};
4
5/// MPUIR (*MPU Type Register*)
6#[bitbybit::bitfield(u32)]
7#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
8pub struct Mpuir {
9    /// Specifies the number of Instruction regions implemented by the MPU.
10    ///
11    /// If the MPU implements a Unified memory map this field is UNK/SBZ.
12    #[bits(16..=23, r)]
13    iregions: u8,
14    /// Specifies the number of Data or Unified regions implemented by the MPU.
15    #[bits(8..=15, r)]
16    dregions: u8,
17    /// Is the MPU non-unified
18    #[bits(0..=0, r)]
19    non_unified: bool,
20}
21
22impl SysReg for Mpuir {
23    const CP: u32 = 15;
24    const CRN: u32 = 0;
25    const OP1: u32 = 0;
26    const CRM: u32 = 0;
27    const OP2: u32 = 4;
28}
29impl crate::register::SysRegRead for Mpuir {}
30impl Mpuir {
31    #[inline]
32    /// Reads MPUIR (*MPU Type Register*)
33    pub fn read() -> Mpuir {
34        unsafe { Self::new_with_raw_value(<Self as SysRegRead>::read_raw()) }
35    }
36}
37
38impl core::fmt::Debug for Mpuir {
39    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
40        f.debug_struct("Mpuir")
41            .field("iregions", &self.iregions())
42            .field("dregions", &self.dregions())
43            .field("non_unified", &self.non_unified())
44            .finish()
45    }
46}
47
48#[cfg(feature = "defmt")]
49impl defmt::Format for Mpuir {
50    fn format(&self, f: defmt::Formatter) {
51        defmt::write!(
52            f,
53            "MPUIR {{ iregions={=u8}, dregions={=u8}, non_unified={=bool} }}",
54            self.iregions(),
55            self.dregions(),
56            self.non_unified()
57        )
58    }
59}
cortex_ar/register/mpuir.rs

cortex_ar/register/
mpuir.rs
