cortex_ar/register/imp/
imp_cdbgicd.rs

1//! Code for managing IMP_CDBGICD (*Instruction Cache Data Read Operation.*)
2
3use crate::register::{SysReg, SysRegWrite};
4
5/// IMP_CDBGICD (*Instruction Cache Data Read Operation.*)
6#[derive(Debug, Clone, Copy)]
7#[cfg_attr(feature = "defmt", derive(defmt::Format))]
8#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
9pub struct ImpCdbgicd(pub u32);
10impl SysReg for ImpCdbgicd {
11    const CP: u32 = 15;
12    const CRN: u32 = 15;
13    const OP1: u32 = 3;
14    const CRM: u32 = 4;
15    const OP2: u32 = 1;
16}
17impl crate::register::SysRegWrite for ImpCdbgicd {}
18impl ImpCdbgicd {
19    #[inline]
20    /// Writes IMP_CDBGICD (*Instruction Cache Data Read Operation.*)
21    ///
22    /// # Safety
23    ///
24    /// Ensure that this value is appropriate for this register
25    pub unsafe fn write(value: Self) {
26        unsafe {
27            <Self as SysRegWrite>::write_raw(value.0);
28        }
29    }
30}