cortex_ar/register/imp/
imp_bustimeoutr.rs

1//! Code for managing IMP_BUSTIMEOUTR (*Bus Timeout Register*)
2
3use crate::register::{SysReg, SysRegRead, SysRegWrite};
4
5/// IMP_BUSTIMEOUTR (*Bus Timeout Register*)
6#[derive(Debug, Clone, Copy)]
7#[cfg_attr(feature = "defmt", derive(defmt::Format))]
8#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
9pub struct ImpBustimeoutr(pub u32);
10impl SysReg for ImpBustimeoutr {
11    const CP: u32 = 15;
12    const CRN: u32 = 15;
13    const OP1: u32 = 1;
14    const CRM: u32 = 3;
15    const OP2: u32 = 2;
16}
17impl crate::register::SysRegRead for ImpBustimeoutr {}
18impl ImpBustimeoutr {
19    #[inline]
20    /// Reads IMP_BUSTIMEOUTR (*Bus Timeout Register*)
21    pub fn read() -> ImpBustimeoutr {
22        unsafe { Self(<Self as SysRegRead>::read_raw()) }
23    }
24}
25impl crate::register::SysRegWrite for ImpBustimeoutr {}
26impl ImpBustimeoutr {
27    #[inline]
28    /// Writes IMP_BUSTIMEOUTR (*Bus Timeout Register*)
29    ///
30    /// # Safety
31    ///
32    /// Ensure that this value is appropriate for this register
33    pub unsafe fn write(value: Self) {
34        unsafe {
35            <Self as SysRegWrite>::write_raw(value.0);
36        }
37    }
38}
cortex_ar/register/imp/imp_bustimeoutr.rs

cortex_ar/register/imp/
imp_bustimeoutr.rs
