cortex_ar/register/armv8r/
prselr.rs

1//! Code for managing PRSELR (*Protection Region Selection Register*)
2
3use crate::register::{SysReg, SysRegRead, SysRegWrite};
4
5/// PRSELR (*Protection Region Selection Register*)
6#[derive(Debug, Clone, Copy)]
7#[cfg_attr(feature = "defmt", derive(defmt::Format))]
8#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
9pub struct Prselr(pub u32);
10impl SysReg for Prselr {
11    const CP: u32 = 15;
12    const CRN: u32 = 6;
13    const OP1: u32 = 0;
14    const CRM: u32 = 2;
15    const OP2: u32 = 1;
16}
17impl crate::register::SysRegRead for Prselr {}
18impl Prselr {
19    #[inline]
20    /// Reads PRSELR (*Protection Region Selection Register*)
21    pub fn read() -> Prselr {
22        unsafe { Self(<Self as SysRegRead>::read_raw()) }
23    }
24}
25impl crate::register::SysRegWrite for Prselr {}
26impl Prselr {
27    #[inline]
28    /// Writes PRSELR (*Protection Region Selection Register*)
29    ///
30    /// Controls what appears in PRLAR and PRBAR
31    pub fn write(value: Self) {
32        unsafe {
33            <Self as SysRegWrite>::write_raw(value.0);
34        }
35    }
36}
cortex_ar/register/armv8r/prselr.rs

cortex_ar/register/armv8r/
prselr.rs
