cortex_ar/register/armv8r/
prbar7.rs

1//! Code for managing PRBAR7 (*Protection Region Base Address Register 7*)
2
3use crate::register::{SysReg, SysRegRead, SysRegWrite};
4
5/// PRBAR7 (*Protection Region Base Address Register 7*)
6#[derive(Debug, Clone, Copy)]
7#[cfg_attr(feature = "defmt", derive(defmt::Format))]
8#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
9pub struct Prbar7(pub u32);
10impl SysReg for Prbar7 {
11    const CP: u32 = 15;
12    const CRN: u32 = 6;
13    const OP1: u32 = 0;
14    const CRM: u32 = 11;
15    const OP2: u32 = 4;
16}
17impl crate::register::SysRegRead for Prbar7 {}
18impl Prbar7 {
19    #[inline]
20    /// Reads PRBAR7 (*Protection Region Base Address Register 7*)
21    pub fn read() -> Prbar7 {
22        unsafe { Self(<Self as SysRegRead>::read_raw()) }
23    }
24}
25impl crate::register::SysRegWrite for Prbar7 {}
26impl Prbar7 {
27    #[inline]
28    /// Writes PRBAR7 (*Protection Region Base Address Register 7*)
29    ///
30    /// # Safety
31    ///
32    /// Ensure that this value is appropriate for this register
33    pub unsafe fn write(value: Self) {
34        unsafe {
35            <Self as SysRegWrite>::write_raw(value.0);
36        }
37    }
38}
cortex_ar/register/armv8r/prbar7.rs

cortex_ar/register/armv8r/
prbar7.rs
