Module register 

Access registers in Armv7-R and Armv8-R

Re-exports

pub use actlr::Actlr;

pub use actlr2::Actlr2;

pub use adfsr::Adfsr;

pub use aidr::Aidr;

pub use aifsr::Aifsr;

pub use amair0::Amair0;

pub use amair1::Amair1;

pub use bpiall::BpIAll;

pub use ccsidr::Ccsidr;

pub use clidr::Clidr;

pub use contextidr::Contextidr;

pub use cpacr::Cpacr;

pub use cpsr::Cpsr;

pub use csselr::Csselr;

pub use ctr::Ctr;

pub use dccimvac::Dccimvac;

pub use dccisw::Dccisw;

pub use dccmvac::Dccmvac;

pub use dccmvau::Dccmvau;

pub use dccsw::Dccsw;

pub use dcimvac::Dcimvac;

pub use dcisw::Dcisw;

pub use dfar::Dfar;

pub use dfsr::Dfsr;

pub use dlr::Dlr;

pub use dracr::Dracr;

pub use drbar::Drbar;

pub use drsr::Drsr;

pub use dspsr::Dspsr;

pub use fcseidr::Fcseidr;

pub use icc_pmr::IccPmr;

pub use id_afr0::IdAfr0;

pub use id_dfr0::IdDfr0;

pub use id_isar0::IdIsar0;

pub use id_isar1::IdIsar1;

pub use id_isar2::IdIsar2;

pub use id_isar3::IdIsar3;

pub use id_isar4::IdIsar4;

pub use id_isar5::IdIsar5;

pub use id_mmfr0::IdMmfr0;

pub use id_mmfr1::IdMmfr1;

pub use id_mmfr2::IdMmfr2;

pub use id_mmfr3::IdMmfr3;

pub use id_mmfr4::IdMmfr4;

pub use id_pfr0::IdPfr0;

pub use id_pfr1::IdPfr1;

pub use ifar::Ifar;

pub use ifsr::Ifsr;

pub use iracr::Iracr;

pub use irbar::Irbar;

pub use irsr::Irsr;

pub use mair0::Mair0;

pub use mair1::Mair1;

pub use midr::Midr;

pub use mpidr::Mpidr;

pub use mpuir::Mpuir;

pub use nsacr::Nsacr;

pub use par::Par;

pub use pmccfiltr::Pmccfiltr;

pub use pmccntr::Pmccntr;

pub use pmceid0::Pmceid0;

pub use pmceid1::Pmceid1;

pub use pmcntenclr::Pmcntenclr;

pub use pmcntenset::Pmcntenset;

pub use pmcr::Pmcr;

pub use pmevcntr0::Pmevcntr0;

pub use pmevcntr1::Pmevcntr1;

pub use pmevcntr2::Pmevcntr2;

pub use pmevcntr3::Pmevcntr3;

pub use pmevtyper0::Pmevtyper0;

pub use pmevtyper1::Pmevtyper1;

pub use pmevtyper2::Pmevtyper2;

pub use pmevtyper3::Pmevtyper3;

pub use pmintenclr::Pmintenclr;

pub use pmintenset::Pmintenset;

pub use pmovsr::Pmovsr;

pub use pmovsset::Pmovsset;

pub use pmselr::Pmselr;

pub use pmswinc::Pmswinc;

pub use pmuserenr::Pmuserenr;

pub use pmxevcntr::Pmxevcntr;

pub use pmxevtyper::Pmxevtyper;

pub use revidr::Revidr;

pub use rgnr::Rgnr;

pub use rvbar::Rvbar;

pub use sctlr::Sctlr;

pub use tcmtr::Tcmtr;

pub use tlbiall::TlbIAll;

pub use tlbtr::Tlbtr;

pub use tpidrprw::Tpidrprw;

pub use tpidruro::Tpidruro;

pub use tpidrurw::Tpidrurw;

pub use vmpidr::Vmpidr;

pub use vpidr::Vpidr;

pub use vsctlr::Vsctlr;

pub use armv8r::*;

pub use imp::*;

Modules

actlr

Code for managing ACTLR (Auxiliary Control Register)

actlr2

Code for managing ACTLR2 (Auxiliary Control Register 2)

adfsr

Code for managing ADFSR (Auxiliary Data Fault Status Register)

aidr

Code for managing AIDR (Auxiliary ID Register)

aifsr

Code for managing AIFSR (Auxiliary Instruction Fault Status Register)

amair0

Code for managing AMAIR0 (Auxiliary Memory Attribute Indirection Register 0)

amair1

Code for managing AMAIR1 (Auxiliary Memory Attribute Indirection Register 1)

armv8r

Access registers for Armv8-R only

bpiall

BPIALL: Invalidate all entries from branch predictors

ccsidr

Code for managing CCSIDR (Current Cache Size ID Register)

clidr

Code for managing CLIDR (Cache Level ID Register)

contextidr

Code for managing CONTEXTIDR (Context ID Register)

cpacr

Code for managing CPACR (Architectural Feature Access Control Register)

cpsr

Code for managing CPSR (Current Program Status Register)

csselr

Code for managing CSSELR (Cache Size Selection Register)

ctr

Code for managing CTR (Cache Type Register)

dc_sw_ops

dccimvac

DCCIMVAC (Clean And Invalidate Data Cache Or Unified Cache Line by MVA to Point of Coherence.)

dccisw

DCCISW (Clean and Invalidate Data or Unified cache line by Set/Way.)

dccmvac

DCCMVAC (Clean Data Cache Or Unified Cache Line by MVA to Point of Coherence.)

dccmvau

DCCMVAU (Clean Data Cache Or Unified Cache Line by MVA to Point of Unification.)

dccsw

DCCSW (Clean Data or Unified Cache line by Set/Way.)

dcimvac

DCIMVAC (Invalidate Data Cache Or Unified Cache Line by MVA to Point of Coherence.)

dcisw

DCISW (Invalidate Data or Unified Cache line by Set/Way.)

dfar

Code for managing DFAR (Data Fault Address Register)

dfsr

Code for managing DFSR (Data Fault Status Register)

dlr

Code for managing DLR (Debug Link Register)

dracr

Code for managing DRACR (Data Region Access Control Register)

drbar

Code for managing DRBAR (Data Region Base Address Register)

drsr

Code for managing DRSR (Data Region Size and Enable Register)

dspsr

Code for managing DSPSR (Debug Saved Program Status Register)

fcseidr

Code for managing FCSEIDR (FCSE Process ID Register)

icc_pmr

Code for managing ICC_PMR (Interrupt Controller Interrupt Priority Mask Register)

id_afr0

Code for managing ID_AFR0 (Auxiliary Feature Register 0)

id_dfr0

Code for managing ID_DFR0 (Debug Feature Register 0)

id_isar0

Code for managing ID_ISAR0 (Instruction Set Attribute Register 0)

id_isar1

Code for managing ID_ISAR1 (Instruction Set Attribute Register 1)

id_isar2

Code for managing ID_ISAR2 (Instruction Set Attribute Register 2)

id_isar3

Code for managing ID_ISAR3 (Instruction Set Attribute Register 3)

id_isar4

Code for managing ID_ISAR4 (Instruction Set Attribute Register 4)

id_isar5

Code for managing ID_ISAR5 (Instruction Set Attribute Register 5)

id_mmfr0

Code for managing ID_MMFR0 (Memory Model Feature Register 0)

id_mmfr1

Code for managing ID_MMFR1 (Memory Model Feature Register 1)

id_mmfr2

Code for managing ID_MMFR2 (Memory Model Feature Register 2)

id_mmfr3

Code for managing ID_MMFR3 (Memory Model Feature Register 3)

id_mmfr4

Code for managing ID_MMFR4 (Memory Model Feature Register 4)

id_pfr0

Code for managing ID_PFR0 (Processor Feature Register 0)

id_pfr1

Code for managing ID_PFR1 (Processor Feature Register 1)

ifar

Code for managing IFAR (Instruction Fault Address Register)

ifsr

Code for managing IFSR (Instruction Fault Status Register)

imp

Code to handle implementation-defined registers

iracr

Code for managing IRACR (Instruction Region Access Control Register)

irbar

Code for managing IRBAR (Instruction Region Base Address Register)

irsr

Code for managing IRSR (Instruction Region Size and Enable Register)

mair0

Code for managing MAIR0 (Memory Attribute Indirection Register 0)

mair1

Code for managing MAIR1 (Memory Attribute Indirection Register 1)

midr

Code for managing MIDR (Main ID Register)

mpidr

Code for managing MPIDR (Multiprocessor Affinity Register)

mpuir

Code for managing MPUIR (MPU Type Register)

nsacr

Code for managing NSACR (Non-Secure Access Control Register)

par

Code for managing PAR (Physical Address Register)

pmccfiltr

Code for managing PMCCFILTR (Performance Monitors Cycle Count Filter Register)

pmccntr

Code for managing PMCCNTR (Performance Monitors Cycle Count Register)

pmceid0

Code for managing PMCEID0 (Performance Monitors Common Event Identification Register 0)

pmceid1

Code for managing PMCEID1 (Performance Monitors Common Event Identification Register 1)

pmcntenclr

Code for managing PMCNTENCLR (Performance Monitors Count Enable Clear Register)

pmcntenset

Code for managing PMCNTENSET (Performance Monitors Count Enable Set Register)

pmcr

Code for managing PMCR (Performance Monitors Control Register)

pmevcntr0

Code for managing PMEVCNTR0 (Performance Monitors Event Count Register 0)

pmevcntr1

Code for managing PMEVCNTR1 (Performance Monitors Event Count Register 1)

pmevcntr2

Code for managing PMEVCNTR2 (*Performance Monitors Event Count Register 2 *)

pmevcntr3

Code for managing PMEVCNTR3 (Performance Monitors Event Count Register 3)

pmevtyper0

Code for managing PMEVTYPER0 (Performance Monitors Event Type Register 0)

pmevtyper1

Code for managing PMEVTYPER1 (Performance Monitors Event Type Register 1)

pmevtyper2

Code for managing PMEVTYPER2 (Performance Monitors Event Type Register 2)

pmevtyper3

Code for managing PMEVTYPER3 (Performance Monitors Event Type Register 3)

pmintenclr

Code for managing PMINTENCLR (Performance Monitors Interrupt Enable Clear Register)

pmintenset

Code for managing PMINTENSET (Performance Monitors Interrupt Enable Set Register)

pmovsr

Code for managing PMOVSR (Performance Monitor Overflow Flag Status Clear Register)

pmovsset

Code for managing PMOVSSET (Performance Monitor Overflow Flag Status Set Register)

pmselr

Code for managing PMSELR (Performance Monitors Event Counter Selection Register)

pmswinc

Code for managing PMSWINC (Performance Monitors Software Increment Register)

pmuserenr

Code for managing PMUSERENR (Performance Monitors User Enable Register)

pmxevcntr

Code for managing PMXEVCNTR (Performance Monitors Selected Event Count Register)

pmxevtyper

Code for managing PMXEVTYPER (Performance Monitors Selected Event Type Register)

revidr

Code for managing REVIDR (Revision ID Register)

rgnr

Code for managing RGNR (MPU Region Number Register)

rvbar

Code for managing RVBAR (Reset Vector Base Address Register)

sctlr

Code for managing SCTLR (System Control Register)

tcmtr

Code for managing TCMTR (TCM Type Register)

tlbiall

TLBIALL (TLB Invalidate All Register)

tlbtr

Code for managing TLBTR (TLB Type Register)

tpidrprw

Code for managing TPIDRPRW (EL1 Software Thread ID Register)

tpidruro

Code for managing TPIDRURO (EL0 Read-Only Software Thread ID Register)

tpidrurw

Code for managing TPIDRURW (EL0 Read/Write Software Thread ID Register)

vmpidr

Code for managing VMPIDR (Virtualization Multiprocessor ID Register)

vpidr

Code for managing VPIDR (Virtualization Processor ID Register)

vsctlr

Code for managing VSCTLR (Virtualization System Control Register)

Traits

SysReg

Describes a 32-bit System Register

SysReg64

Describes a 64-bit System Register

SysRegRead

32-bit Readable System Registers

SysRegRead64

64-bit Readable System Registers

SysRegWrite

Writable 32-bit System Registers

SysRegWrite64

Writable 64-bit System Registers