cortex_a/
asm.rs

1// SPDX-License-Identifier: Apache-2.0 OR MIT
2//
3// Copyright (c) 2018-2022 by the author(s)
4//
5// Author(s):
6//   - Jorge Aparicio
7//   - Andre Richter <andre.o.richter@gmail.com>
8
9//! Wrappers around ARMv8-A instructions.
10
11pub mod barrier;
12
13#[cfg(feature = "nightly")]
14pub mod random;
15
16/// The classic no-op
17#[inline(always)]
18pub fn nop() {
19    #[cfg(target_arch = "aarch64")]
20    unsafe {
21        core::arch::asm!("nop", options(nomem, nostack))
22    }
23
24    #[cfg(not(target_arch = "aarch64"))]
25    unimplemented!()
26}
27
28/// Wait For Interrupt
29///
30/// For more details on wfi, refer to [here](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/CIHEGBBF.html).
31#[inline(always)]
32pub fn wfi() {
33    #[cfg(target_arch = "aarch64")]
34    unsafe {
35        core::arch::asm!("wfi", options(nomem, nostack))
36    }
37
38    #[cfg(not(target_arch = "aarch64"))]
39    unimplemented!()
40}
41
42/// Wait For Event
43///
44/// For more details of wfe - sev pair, refer to [here](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/CIHEGBBF.html).
45#[inline(always)]
46pub fn wfe() {
47    #[cfg(target_arch = "aarch64")]
48    unsafe {
49        core::arch::asm!("wfe", options(nomem, nostack))
50    }
51
52    #[cfg(not(target_arch = "aarch64"))]
53    unimplemented!()
54}
55
56/// Send EVent.Locally
57///
58/// SEV causes an event to be signaled to the local core within a multiprocessor system.
59///
60/// For more details of wfe - sev/sevl pair, refer to [here](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/CIHEGBBF.html).
61#[inline(always)]
62pub fn sevl() {
63    #[cfg(target_arch = "aarch64")]
64    unsafe {
65        core::arch::asm!("sevl", options(nomem, nostack))
66    }
67
68    #[cfg(not(target_arch = "aarch64"))]
69    unimplemented!()
70}
71
72/// Send EVent.
73///
74/// SEV causes an event to be signaled to all cores within a multiprocessor system.
75///
76/// For more details of wfe - sev pair, refer to [here](http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0802a/CIHEGBBF.html).
77#[inline(always)]
78pub fn sev() {
79    #[cfg(target_arch = "aarch64")]
80    unsafe {
81        core::arch::asm!("sev", options(nomem, nostack))
82    }
83
84    #[cfg(not(target_arch = "aarch64"))]
85    unimplemented!()
86}
87
88/// Exception return
89///
90/// Will jump to wherever the corresponding link register points to, and therefore never return.
91#[inline(always)]
92pub fn eret() -> ! {
93    #[cfg(target_arch = "aarch64")]
94    unsafe {
95        core::arch::asm!("eret", options(nomem, nostack));
96        core::hint::unreachable_unchecked()
97    }
98
99    #[cfg(not(target_arch = "aarch64"))]
100    unimplemented!()
101}
102
103/// Function return
104///
105/// Will jump to wherever the corresponding link register points to, and therefore never return.
106#[inline(always)]
107pub fn ret() -> ! {
108    #[cfg(target_arch = "aarch64")]
109    unsafe {
110        core::arch::asm!("ret", options(nomem, nostack));
111        core::hint::unreachable_unchecked()
112    }
113
114    #[cfg(not(target_arch = "aarch64"))]
115    unimplemented!()
116}
cortex_a/asm.rs

cortex_a/
asm.rs
