cortex_a/registers/
ttbr0_el2.rs

1// SPDX-License-Identifier: Apache-2.0 OR MIT
2//
3// Copyright (c) 2018-2022 by the author(s)
4//
5// Author(s):
6//   - Andre Richter <andre.o.richter@gmail.com>
7//   - Bradley Landherr <landhb@users.noreply.github.com>
8
9//! Translation Table Base Register 0 - EL2
10//!
11//! Holds the base address of the translation table for the initial lookup for stage 1 of the
12//! translation of an address from the lower VA range for accesses from EL2.
13
14use tock_registers::{
15    interfaces::{Readable, Writeable},
16    register_bitfields,
17};
18
19register_bitfields! {u64,
20    pub TTBR0_EL2 [
21        /// Reserved
22        RES0  OFFSET(48) NUMBITS(16) [],
23
24        /// Translation table base address
25        BADDR OFFSET(1) NUMBITS(48) [],
26
27        /// Common not Private
28        CnP   OFFSET(0) NUMBITS(1) []
29    ]
30}
31
32pub struct Reg;
33
34impl Readable for Reg {
35    type T = u64;
36    type R = TTBR0_EL2::Register;
37
38    sys_coproc_read_raw!(u64, "TTBR0_EL2", "x");
39}
40
41impl Writeable for Reg {
42    type T = u64;
43    type R = TTBR0_EL2::Register;
44
45    sys_coproc_write_raw!(u64, "TTBR0_EL2", "x");
46}
47
48impl Reg {
49    #[inline(always)]
50    pub fn get_baddr(&self) -> u64 {
51        self.read(TTBR0_EL2::BADDR) << 1
52    }
53
54    #[inline(always)]
55    pub fn set_baddr(&self, addr: u64) {
56        self.write(TTBR0_EL2::BADDR.val(addr >> 1));
57    }
58}
59
60pub const TTBR0_EL2: Reg = Reg {};
cortex_a/registers/ttbr0_el2.rs

cortex_a/registers/
ttbr0_el2.rs
