cortex_a/registers/
par_el1.rs

1// SPDX-License-Identifier: Apache-2.0 OR MIT
2//
3// Copyright (c) 2021-2022 by the author(s)
4//
5// Author(s):
6//   - Andre Richter <andre.o.richter@gmail.com>
7
8//! Physical Address Register - EL1
9//!
10//! Returns the output address (OA) from an Address translation instruction that executed
11//! successfully, or fault information if the instruction did not execute successfully.
12
13use tock_registers::{
14    interfaces::{Readable, Writeable},
15    register_bitfields,
16};
17
18register_bitfields! {u64,
19    pub PAR_EL1 [
20        /// Output address. The output address (OA) corresponding to the supplied input address.
21        /// This field returns address bits[47:12].
22        ///
23        /// When ARMv8.2-LPA is implemented, and 52-bit addresses and a 64KB translation granule are
24        /// in use, the PA[51:48] bits form the upper part of the address value. Otherwise the
25        /// PA[51:48] bits are RES0.
26        ///
27        /// For implementations with fewer than 48 physical address bits, the corresponding upper
28        /// bits in this field are RES0.
29        ///
30        /// This field resets to an architecturally UNKNOWN value.
31        PA OFFSET(12) NUMBITS(36) [],
32
33        /// Indicates whether the instruction performed a successful address translation.
34        ///
35        /// 0 Address translation completed successfully.
36        ///
37        /// 1 Address translation aborted.
38        ///
39        /// This field resets to an architecturally UNKNOWN value.
40        F OFFSET(0) NUMBITS(1) [
41            TranslationSuccessfull = 0,
42            TranslationAborted = 1
43        ]
44    ]
45}
46
47pub struct Reg;
48
49impl Readable for Reg {
50    type T = u64;
51    type R = PAR_EL1::Register;
52
53    sys_coproc_read_raw!(u64, "PAR_EL1", "x");
54}
55
56impl Writeable for Reg {
57    type T = u64;
58    type R = PAR_EL1::Register;
59
60    sys_coproc_write_raw!(u64, "PAR_EL1", "x");
61}
62
63pub const PAR_EL1: Reg = Reg {};
cortex_a/registers/par_el1.rs

cortex_a/registers/
par_el1.rs
