1use tock_registers::{
15 interfaces::{Readable, Writeable},
16 register_bitfields,
17};
18
19register_bitfields! {u64,
20 pub MAIR_EL1 [
21 Attr7_Normal_Outer OFFSET(60) NUMBITS(4) [
23 Device = 0b0000,
24
25 WriteThrough_Transient_WriteAlloc = 0b0001,
26 WriteThrough_Transient_ReadAlloc = 0b0010,
27 WriteThrough_Transient_ReadWriteAlloc = 0b0011,
28
29 NonCacheable = 0b0100,
30 WriteBack_Transient_WriteAlloc = 0b0101,
31 WriteBack_Transient_ReadAlloc = 0b0110,
32 WriteBack_Transient_ReadWriteAlloc = 0b0111,
33
34 WriteThrough_NonTransient = 0b1000,
35 WriteThrough_NonTransient_WriteAlloc = 0b1001,
36 WriteThrough_NonTransient_ReadAlloc = 0b1010,
37 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
38
39 WriteBack_NonTransient = 0b1100,
40 WriteBack_NonTransient_WriteAlloc = 0b1101,
41 WriteBack_NonTransient_ReadAlloc = 0b1110,
42 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
43 ],
44 Attr7_Device OFFSET(56) NUMBITS(8) [
45 nonGathering_nonReordering_noEarlyWriteAck = 0b0000_0000,
46 nonGathering_nonReordering_EarlyWriteAck = 0b0000_0100,
47 nonGathering_Reordering_EarlyWriteAck = 0b0000_1000,
48 Gathering_Reordering_EarlyWriteAck = 0b0000_1100
49 ],
50 Attr7_Normal_Inner OFFSET(56) NUMBITS(4) [
51 WriteThrough_Transient = 0x0000,
52 WriteThrough_Transient_WriteAlloc = 0x0001,
53 WriteThrough_Transient_ReadAlloc = 0x0010,
54 WriteThrough_Transient_ReadWriteAlloc = 0x0011,
55
56 NonCacheable = 0b0100,
57 WriteBack_Transient_WriteAlloc = 0b0101,
58 WriteBack_Transient_ReadAlloc = 0b0110,
59 WriteBack_Transient_ReadWriteAlloc = 0b0111,
60
61 WriteThrough_NonTransient = 0b1000,
62 WriteThrough_NonTransient_WriteAlloc = 0b1001,
63 WriteThrough_NonTransient_ReadAlloc = 0b1010,
64 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
65
66 WriteBack_NonTransient = 0b1100,
67 WriteBack_NonTransient_WriteAlloc = 0b1101,
68 WriteBack_NonTransient_ReadAlloc = 0b1110,
69 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
70 ],
71
72 Attr6_Normal_Outer OFFSET(52) NUMBITS(4) [
74 Device = 0b0000,
75
76 WriteThrough_Transient_WriteAlloc = 0b0001,
77 WriteThrough_Transient_ReadAlloc = 0b0010,
78 WriteThrough_Transient_ReadWriteAlloc = 0b0011,
79
80 NonCacheable = 0b0100,
81 WriteBack_Transient_WriteAlloc = 0b0101,
82 WriteBack_Transient_ReadAlloc = 0b0110,
83 WriteBack_Transient_ReadWriteAlloc = 0b0111,
84
85 WriteThrough_NonTransient = 0b1000,
86 WriteThrough_NonTransient_WriteAlloc = 0b1001,
87 WriteThrough_NonTransient_ReadAlloc = 0b1010,
88 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
89
90 WriteBack_NonTransient = 0b1100,
91 WriteBack_NonTransient_WriteAlloc = 0b1101,
92 WriteBack_NonTransient_ReadAlloc = 0b1110,
93 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
94 ],
95 Attr6_Device OFFSET(48) NUMBITS(8) [
96 nonGathering_nonReordering_noEarlyWriteAck = 0b0000_0000,
97 nonGathering_nonReordering_EarlyWriteAck = 0b0000_0100,
98 nonGathering_Reordering_EarlyWriteAck = 0b0000_1000,
99 Gathering_Reordering_EarlyWriteAck = 0b0000_1100
100 ],
101 Attr6_Normal_Inner OFFSET(48) NUMBITS(4) [
102 WriteThrough_Transient = 0x0000,
103 WriteThrough_Transient_WriteAlloc = 0x0001,
104 WriteThrough_Transient_ReadAlloc = 0x0010,
105 WriteThrough_Transient_ReadWriteAlloc = 0x0011,
106
107 NonCacheable = 0b0100,
108 WriteBack_Transient_WriteAlloc = 0b0101,
109 WriteBack_Transient_ReadAlloc = 0b0110,
110 WriteBack_Transient_ReadWriteAlloc = 0b0111,
111
112 WriteThrough_NonTransient = 0b1000,
113 WriteThrough_NonTransient_WriteAlloc = 0b1001,
114 WriteThrough_NonTransient_ReadAlloc = 0b1010,
115 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
116
117 WriteBack_NonTransient = 0b1100,
118 WriteBack_NonTransient_WriteAlloc = 0b1101,
119 WriteBack_NonTransient_ReadAlloc = 0b1110,
120 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
121 ],
122
123 Attr5_Normal_Outer OFFSET(44) NUMBITS(4) [
125 Device = 0b0000,
126
127 WriteThrough_Transient_WriteAlloc = 0b0001,
128 WriteThrough_Transient_ReadAlloc = 0b0010,
129 WriteThrough_Transient_ReadWriteAlloc = 0b0011,
130
131 NonCacheable = 0b0100,
132 WriteBack_Transient_WriteAlloc = 0b0101,
133 WriteBack_Transient_ReadAlloc = 0b0110,
134 WriteBack_Transient_ReadWriteAlloc = 0b0111,
135
136 WriteThrough_NonTransient = 0b1000,
137 WriteThrough_NonTransient_WriteAlloc = 0b1001,
138 WriteThrough_NonTransient_ReadAlloc = 0b1010,
139 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
140
141 WriteBack_NonTransient = 0b1100,
142 WriteBack_NonTransient_WriteAlloc = 0b1101,
143 WriteBack_NonTransient_ReadAlloc = 0b1110,
144 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
145 ],
146 Attr5_Device OFFSET(40) NUMBITS(8) [
147 nonGathering_nonReordering_noEarlyWriteAck = 0b0000_0000,
148 nonGathering_nonReordering_EarlyWriteAck = 0b0000_0100,
149 nonGathering_Reordering_EarlyWriteAck = 0b0000_1000,
150 Gathering_Reordering_EarlyWriteAck = 0b0000_1100
151 ],
152 Attr5_Normal_Inner OFFSET(40) NUMBITS(4) [
153 WriteThrough_Transient = 0x0000,
154 WriteThrough_Transient_WriteAlloc = 0x0001,
155 WriteThrough_Transient_ReadAlloc = 0x0010,
156 WriteThrough_Transient_ReadWriteAlloc = 0x0011,
157
158 NonCacheable = 0b0100,
159 WriteBack_Transient_WriteAlloc = 0b0101,
160 WriteBack_Transient_ReadAlloc = 0b0110,
161 WriteBack_Transient_ReadWriteAlloc = 0b0111,
162
163 WriteThrough_NonTransient = 0b1000,
164 WriteThrough_NonTransient_WriteAlloc = 0b1001,
165 WriteThrough_NonTransient_ReadAlloc = 0b1010,
166 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
167
168 WriteBack_NonTransient = 0b1100,
169 WriteBack_NonTransient_WriteAlloc = 0b1101,
170 WriteBack_NonTransient_ReadAlloc = 0b1110,
171 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
172 ],
173
174 Attr4_Normal_Outer OFFSET(36) NUMBITS(4) [
176 Device = 0b0000,
177
178 WriteThrough_Transient_WriteAlloc = 0b0001,
179 WriteThrough_Transient_ReadAlloc = 0b0010,
180 WriteThrough_Transient_ReadWriteAlloc = 0b0011,
181
182 NonCacheable = 0b0100,
183 WriteBack_Transient_WriteAlloc = 0b0101,
184 WriteBack_Transient_ReadAlloc = 0b0110,
185 WriteBack_Transient_ReadWriteAlloc = 0b0111,
186
187 WriteThrough_NonTransient = 0b1000,
188 WriteThrough_NonTransient_WriteAlloc = 0b1001,
189 WriteThrough_NonTransient_ReadAlloc = 0b1010,
190 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
191
192 WriteBack_NonTransient = 0b1100,
193 WriteBack_NonTransient_WriteAlloc = 0b1101,
194 WriteBack_NonTransient_ReadAlloc = 0b1110,
195 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
196 ],
197 Attr4_Device OFFSET(32) NUMBITS(8) [
198 nonGathering_nonReordering_noEarlyWriteAck = 0b0000_0000,
199 nonGathering_nonReordering_EarlyWriteAck = 0b0000_0100,
200 nonGathering_Reordering_EarlyWriteAck = 0b0000_1000,
201 Gathering_Reordering_EarlyWriteAck = 0b0000_1100
202 ],
203 Attr4_Normal_Inner OFFSET(32) NUMBITS(4) [
204 WriteThrough_Transient = 0x0000,
205 WriteThrough_Transient_WriteAlloc = 0x0001,
206 WriteThrough_Transient_ReadAlloc = 0x0010,
207 WriteThrough_Transient_ReadWriteAlloc = 0x0011,
208
209 NonCacheable = 0b0100,
210 WriteBack_Transient_WriteAlloc = 0b0101,
211 WriteBack_Transient_ReadAlloc = 0b0110,
212 WriteBack_Transient_ReadWriteAlloc = 0b0111,
213
214 WriteThrough_NonTransient = 0b1000,
215 WriteThrough_NonTransient_WriteAlloc = 0b1001,
216 WriteThrough_NonTransient_ReadAlloc = 0b1010,
217 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
218
219 WriteBack_NonTransient = 0b1100,
220 WriteBack_NonTransient_WriteAlloc = 0b1101,
221 WriteBack_NonTransient_ReadAlloc = 0b1110,
222 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
223 ],
224
225 Attr3_Normal_Outer OFFSET(28) NUMBITS(4) [
227 Device = 0b0000,
228
229 WriteThrough_Transient_WriteAlloc = 0b0001,
230 WriteThrough_Transient_ReadAlloc = 0b0010,
231 WriteThrough_Transient_ReadWriteAlloc = 0b0011,
232
233 NonCacheable = 0b0100,
234 WriteBack_Transient_WriteAlloc = 0b0101,
235 WriteBack_Transient_ReadAlloc = 0b0110,
236 WriteBack_Transient_ReadWriteAlloc = 0b0111,
237
238 WriteThrough_NonTransient = 0b1000,
239 WriteThrough_NonTransient_WriteAlloc = 0b1001,
240 WriteThrough_NonTransient_ReadAlloc = 0b1010,
241 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
242
243 WriteBack_NonTransient = 0b1100,
244 WriteBack_NonTransient_WriteAlloc = 0b1101,
245 WriteBack_NonTransient_ReadAlloc = 0b1110,
246 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
247 ],
248 Attr3_Device OFFSET(24) NUMBITS(8) [
249 nonGathering_nonReordering_noEarlyWriteAck = 0b0000_0000,
250 nonGathering_nonReordering_EarlyWriteAck = 0b0000_0100,
251 nonGathering_Reordering_EarlyWriteAck = 0b0000_1000,
252 Gathering_Reordering_EarlyWriteAck = 0b0000_1100
253 ],
254 Attr3_Normal_Inner OFFSET(24) NUMBITS(4) [
255 WriteThrough_Transient = 0x0000,
256 WriteThrough_Transient_WriteAlloc = 0x0001,
257 WriteThrough_Transient_ReadAlloc = 0x0010,
258 WriteThrough_Transient_ReadWriteAlloc = 0x0011,
259
260 NonCacheable = 0b0100,
261 WriteBack_Transient_WriteAlloc = 0b0101,
262 WriteBack_Transient_ReadAlloc = 0b0110,
263 WriteBack_Transient_ReadWriteAlloc = 0b0111,
264
265 WriteThrough_NonTransient = 0b1000,
266 WriteThrough_NonTransient_WriteAlloc = 0b1001,
267 WriteThrough_NonTransient_ReadAlloc = 0b1010,
268 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
269
270 WriteBack_NonTransient = 0b1100,
271 WriteBack_NonTransient_WriteAlloc = 0b1101,
272 WriteBack_NonTransient_ReadAlloc = 0b1110,
273 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
274 ],
275
276 Attr2_Normal_Outer OFFSET(20) NUMBITS(4) [
278 Device = 0b0000,
279
280 WriteThrough_Transient_WriteAlloc = 0b0001,
281 WriteThrough_Transient_ReadAlloc = 0b0010,
282 WriteThrough_Transient_ReadWriteAlloc = 0b0011,
283
284 NonCacheable = 0b0100,
285 WriteBack_Transient_WriteAlloc = 0b0101,
286 WriteBack_Transient_ReadAlloc = 0b0110,
287 WriteBack_Transient_ReadWriteAlloc = 0b0111,
288
289 WriteThrough_NonTransient = 0b1000,
290 WriteThrough_NonTransient_WriteAlloc = 0b1001,
291 WriteThrough_NonTransient_ReadAlloc = 0b1010,
292 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
293
294 WriteBack_NonTransient = 0b1100,
295 WriteBack_NonTransient_WriteAlloc = 0b1101,
296 WriteBack_NonTransient_ReadAlloc = 0b1110,
297 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
298 ],
299 Attr2_Device OFFSET(16) NUMBITS(8) [
300 nonGathering_nonReordering_noEarlyWriteAck = 0b0000_0000,
301 nonGathering_nonReordering_EarlyWriteAck = 0b0000_0100,
302 nonGathering_Reordering_EarlyWriteAck = 0b0000_1000,
303 Gathering_Reordering_EarlyWriteAck = 0b0000_1100
304 ],
305 Attr2_Normal_Inner OFFSET(16) NUMBITS(4) [
306 WriteThrough_Transient = 0x0000,
307 WriteThrough_Transient_WriteAlloc = 0x0001,
308 WriteThrough_Transient_ReadAlloc = 0x0010,
309 WriteThrough_Transient_ReadWriteAlloc = 0x0011,
310
311 NonCacheable = 0b0100,
312 WriteBack_Transient_WriteAlloc = 0b0101,
313 WriteBack_Transient_ReadAlloc = 0b0110,
314 WriteBack_Transient_ReadWriteAlloc = 0b0111,
315
316 WriteThrough_NonTransient = 0b1000,
317 WriteThrough_NonTransient_WriteAlloc = 0b1001,
318 WriteThrough_NonTransient_ReadAlloc = 0b1010,
319 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
320
321 WriteBack_NonTransient = 0b1100,
322 WriteBack_NonTransient_WriteAlloc = 0b1101,
323 WriteBack_NonTransient_ReadAlloc = 0b1110,
324 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
325 ],
326
327 Attr1_Normal_Outer OFFSET(12) NUMBITS(4) [
329 Device = 0b0000,
330
331 WriteThrough_Transient_WriteAlloc = 0b0001,
332 WriteThrough_Transient_ReadAlloc = 0b0010,
333 WriteThrough_Transient_ReadWriteAlloc = 0b0011,
334
335 NonCacheable = 0b0100,
336 WriteBack_Transient_WriteAlloc = 0b0101,
337 WriteBack_Transient_ReadAlloc = 0b0110,
338 WriteBack_Transient_ReadWriteAlloc = 0b0111,
339
340 WriteThrough_NonTransient = 0b1000,
341 WriteThrough_NonTransient_WriteAlloc = 0b1001,
342 WriteThrough_NonTransient_ReadAlloc = 0b1010,
343 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
344
345 WriteBack_NonTransient = 0b1100,
346 WriteBack_NonTransient_WriteAlloc = 0b1101,
347 WriteBack_NonTransient_ReadAlloc = 0b1110,
348 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
349 ],
350 Attr1_Device OFFSET(8) NUMBITS(8) [
351 nonGathering_nonReordering_noEarlyWriteAck = 0b0000_0000,
352 nonGathering_nonReordering_EarlyWriteAck = 0b0000_0100,
353 nonGathering_Reordering_EarlyWriteAck = 0b0000_1000,
354 Gathering_Reordering_EarlyWriteAck = 0b0000_1100
355 ],
356 Attr1_Normal_Inner OFFSET(8) NUMBITS(4) [
357 WriteThrough_Transient = 0x0000,
358 WriteThrough_Transient_WriteAlloc = 0x0001,
359 WriteThrough_Transient_ReadAlloc = 0x0010,
360 WriteThrough_Transient_ReadWriteAlloc = 0x0011,
361
362 NonCacheable = 0b0100,
363 WriteBack_Transient_WriteAlloc = 0b0101,
364 WriteBack_Transient_ReadAlloc = 0b0110,
365 WriteBack_Transient_ReadWriteAlloc = 0b0111,
366
367 WriteThrough_NonTransient = 0b1000,
368 WriteThrough_NonTransient_WriteAlloc = 0b1001,
369 WriteThrough_NonTransient_ReadAlloc = 0b1010,
370 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
371
372 WriteBack_NonTransient = 0b1100,
373 WriteBack_NonTransient_WriteAlloc = 0b1101,
374 WriteBack_NonTransient_ReadAlloc = 0b1110,
375 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
376 ],
377
378 Attr0_Normal_Outer OFFSET(4) NUMBITS(4) [
380 Device = 0b0000,
381
382 WriteThrough_Transient_WriteAlloc = 0b0001,
383 WriteThrough_Transient_ReadAlloc = 0b0010,
384 WriteThrough_Transient_ReadWriteAlloc = 0b0011,
385
386 NonCacheable = 0b0100,
387 WriteBack_Transient_WriteAlloc = 0b0101,
388 WriteBack_Transient_ReadAlloc = 0b0110,
389 WriteBack_Transient_ReadWriteAlloc = 0b0111,
390
391 WriteThrough_NonTransient = 0b1000,
392 WriteThrough_NonTransient_WriteAlloc = 0b1001,
393 WriteThrough_NonTransient_ReadAlloc = 0b1010,
394 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
395
396 WriteBack_NonTransient = 0b1100,
397 WriteBack_NonTransient_WriteAlloc = 0b1101,
398 WriteBack_NonTransient_ReadAlloc = 0b1110,
399 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
400 ],
401 Attr0_Device OFFSET(0) NUMBITS(8) [
402 nonGathering_nonReordering_noEarlyWriteAck = 0b0000_0000,
403 nonGathering_nonReordering_EarlyWriteAck = 0b0000_0100,
404 nonGathering_Reordering_EarlyWriteAck = 0b0000_1000,
405 Gathering_Reordering_EarlyWriteAck = 0b0000_1100
406 ],
407 Attr0_Normal_Inner OFFSET(0) NUMBITS(4) [
408 WriteThrough_Transient = 0x0000,
409 WriteThrough_Transient_WriteAlloc = 0x0001,
410 WriteThrough_Transient_ReadAlloc = 0x0010,
411 WriteThrough_Transient_ReadWriteAlloc = 0x0011,
412
413 NonCacheable = 0b0100,
414 WriteBack_Transient_WriteAlloc = 0b0101,
415 WriteBack_Transient_ReadAlloc = 0b0110,
416 WriteBack_Transient_ReadWriteAlloc = 0b0111,
417
418 WriteThrough_NonTransient = 0b1000,
419 WriteThrough_NonTransient_WriteAlloc = 0b1001,
420 WriteThrough_NonTransient_ReadAlloc = 0b1010,
421 WriteThrough_NonTransient_ReadWriteAlloc = 0b1011,
422
423 WriteBack_NonTransient = 0b1100,
424 WriteBack_NonTransient_WriteAlloc = 0b1101,
425 WriteBack_NonTransient_ReadAlloc = 0b1110,
426 WriteBack_NonTransient_ReadWriteAlloc = 0b1111
427 ]
428 ]
429}
430
431pub struct Reg;
432
433impl Readable for Reg {
434 type T = u64;
435 type R = MAIR_EL1::Register;
436
437 sys_coproc_read_raw!(u64, "MAIR_EL1", "x");
438}
439
440impl Writeable for Reg {
441 type T = u64;
442 type R = MAIR_EL1::Register;
443
444 sys_coproc_write_raw!(u64, "MAIR_EL1", "x");
445}
446
447pub const MAIR_EL1: Reg = Reg {};