corstone300_pac/timer0/
cntp_aival_ctl.rs1#[doc = "Register `CNTP_AIVAL_CTL` reader"]
6pub struct R(crate::R<CNTP_AIVAL_CTL_SPEC>);
7impl core::ops::Deref for R {
8 type Target = crate::R<CNTP_AIVAL_CTL_SPEC>;
9 #[inline(always)]
10 fn deref(&self) -> &Self::Target {
11 &self.0
12 }
13}
14impl From<crate::R<CNTP_AIVAL_CTL_SPEC>> for R {
15 #[inline(always)]
16 fn from(reader: crate::R<CNTP_AIVAL_CTL_SPEC>) -> Self {
17 R(reader)
18 }
19}
20#[doc = "Register `CNTP_AIVAL_CTL` writer"]
21pub struct W(crate::W<CNTP_AIVAL_CTL_SPEC>);
22impl core::ops::Deref for W {
23 type Target = crate::W<CNTP_AIVAL_CTL_SPEC>;
24 #[inline(always)]
25 fn deref(&self) -> &Self::Target {
26 &self.0
27 }
28}
29impl core::ops::DerefMut for W {
30 #[inline(always)]
31 fn deref_mut(&mut self) -> &mut Self::Target {
32 &mut self.0
33 }
34}
35impl From<crate::W<CNTP_AIVAL_CTL_SPEC>> for W {
36 #[inline(always)]
37 fn from(writer: crate::W<CNTP_AIVAL_CTL_SPEC>) -> Self {
38 W(writer)
39 }
40}
41#[doc = "Field `En` reader - Enable AutoIncrement."]
42pub type EN_R = crate::BitReader<EN_A>;
43#[doc = "Enable AutoIncrement.\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45pub enum EN_A {
46 #[doc = "0: `0`"]
47 OFF = 0,
48 #[doc = "1: `1`"]
49 ON = 1,
50}
51impl From<EN_A> for bool {
52 #[inline(always)]
53 fn from(variant: EN_A) -> Self {
54 variant as u8 != 0
55 }
56}
57impl EN_R {
58 #[doc = "Get enumerated values variant"]
59 #[inline(always)]
60 pub fn variant(&self) -> EN_A {
61 match self.bits {
62 false => EN_A::OFF,
63 true => EN_A::ON,
64 }
65 }
66 #[doc = "Checks if the value of the field is `OFF`"]
67 #[inline(always)]
68 pub fn is_off(&self) -> bool {
69 *self == EN_A::OFF
70 }
71 #[doc = "Checks if the value of the field is `ON`"]
72 #[inline(always)]
73 pub fn is_on(&self) -> bool {
74 *self == EN_A::ON
75 }
76}
77#[doc = "Field `En` writer - Enable AutoIncrement."]
78pub type EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CNTP_AIVAL_CTL_SPEC, EN_A, O>;
79impl<'a, const O: u8> EN_W<'a, O> {
80 #[doc = "`0`"]
81 #[inline(always)]
82 pub fn off(self) -> &'a mut W {
83 self.variant(EN_A::OFF)
84 }
85 #[doc = "`1`"]
86 #[inline(always)]
87 pub fn on(self) -> &'a mut W {
88 self.variant(EN_A::ON)
89 }
90}
91#[doc = "Field `IRQ_CLR` reader - Interrupt Clear"]
92pub type IRQ_CLR_R = crate::BitReader<IRQ_CLR_A>;
93#[doc = "Interrupt Clear\n\nValue on reset: 0"]
94#[derive(Clone, Copy, Debug, PartialEq, Eq)]
95pub enum IRQ_CLR_A {
96 #[doc = "0: `0`"]
97 NOP = 0,
98 #[doc = "1: `1`"]
99 CLEAR = 1,
100}
101impl From<IRQ_CLR_A> for bool {
102 #[inline(always)]
103 fn from(variant: IRQ_CLR_A) -> Self {
104 variant as u8 != 0
105 }
106}
107impl IRQ_CLR_R {
108 #[doc = "Get enumerated values variant"]
109 #[inline(always)]
110 pub fn variant(&self) -> IRQ_CLR_A {
111 match self.bits {
112 false => IRQ_CLR_A::NOP,
113 true => IRQ_CLR_A::CLEAR,
114 }
115 }
116 #[doc = "Checks if the value of the field is `NOP`"]
117 #[inline(always)]
118 pub fn is_nop(&self) -> bool {
119 *self == IRQ_CLR_A::NOP
120 }
121 #[doc = "Checks if the value of the field is `CLEAR`"]
122 #[inline(always)]
123 pub fn is_clear(&self) -> bool {
124 *self == IRQ_CLR_A::CLEAR
125 }
126}
127#[doc = "Field `IRQ_CLR` writer - Interrupt Clear"]
128pub type IRQ_CLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CNTP_AIVAL_CTL_SPEC, IRQ_CLR_A, O>;
129impl<'a, const O: u8> IRQ_CLR_W<'a, O> {
130 #[doc = "`0`"]
131 #[inline(always)]
132 pub fn nop(self) -> &'a mut W {
133 self.variant(IRQ_CLR_A::NOP)
134 }
135 #[doc = "`1`"]
136 #[inline(always)]
137 pub fn clear(self) -> &'a mut W {
138 self.variant(IRQ_CLR_A::CLEAR)
139 }
140}
141impl R {
142 #[doc = "Bit 0 - Enable AutoIncrement."]
143 #[inline(always)]
144 pub fn en(&self) -> EN_R {
145 EN_R::new((self.bits & 1) != 0)
146 }
147 #[doc = "Bit 1 - Interrupt Clear"]
148 #[inline(always)]
149 pub fn irq_clr(&self) -> IRQ_CLR_R {
150 IRQ_CLR_R::new(((self.bits >> 1) & 1) != 0)
151 }
152}
153impl W {
154 #[doc = "Bit 0 - Enable AutoIncrement."]
155 #[inline(always)]
156 pub fn en(&mut self) -> EN_W<0> {
157 EN_W::new(self)
158 }
159 #[doc = "Bit 1 - Interrupt Clear"]
160 #[inline(always)]
161 pub fn irq_clr(&mut self) -> IRQ_CLR_W<1> {
162 IRQ_CLR_W::new(self)
163 }
164 #[doc = "Writes raw bits to the register."]
165 #[inline(always)]
166 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
167 self.0.bits(bits);
168 self
169 }
170}
171#[doc = "AutoIncrValue Control register.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cntp_aival_ctl](index.html) module"]
172pub struct CNTP_AIVAL_CTL_SPEC;
173impl crate::RegisterSpec for CNTP_AIVAL_CTL_SPEC {
174 type Ux = u32;
175}
176#[doc = "`read()` method returns [cntp_aival_ctl::R](R) reader structure"]
177impl crate::Readable for CNTP_AIVAL_CTL_SPEC {
178 type Reader = R;
179}
180#[doc = "`write(|w| ..)` method takes [cntp_aival_ctl::W](W) writer structure"]
181impl crate::Writable for CNTP_AIVAL_CTL_SPEC {
182 type Writer = W;
183}
184#[doc = "`reset()` method sets CNTP_AIVAL_CTL to value 0"]
185impl crate::Resettable for CNTP_AIVAL_CTL_SPEC {
186 #[inline(always)]
187 fn reset_value() -> Self::Ux {
188 0
189 }
190}