corstone300_pac/
syscontrol.rs1#[doc = r"Register block"]
6#[repr(C)]
7pub struct RegisterBlock {
8 #[doc = "0x00 - Secure Debug Configuration Status"]
9 pub secdbgstat: SECDBGSTAT,
10 #[doc = "0x04 - Secure Debug Configuration Set"]
11 pub secdbgset: SECDBGSET,
12 #[doc = "0x08 - Secure Debug Configuration Clear"]
13 pub secdbgclr: SECDBGCLR,
14 #[doc = "0x0c - System Security Control"]
15 pub scsecctrl: SCSECCTRL,
16 #[doc = "0x10 - Clock Configuration Register 0."]
17 pub clk_cfg0: CLK_CFG0,
18 #[doc = "0x14 - Clock Configuration Register 1."]
19 pub clk_cfg1: CLK_CFG1,
20 #[doc = "0x18 - Clock Force"]
21 pub clock_force: CLOCK_FORCE,
22 _reserved7: [u8; 0xe4],
23 #[doc = "0x100 - Reset Syndrome"]
24 pub reset_syndrome: RESET_SYNDROME,
25 #[doc = "0x104 - Reset Mask"]
26 pub reset_mask: RESET_MASK,
27 #[doc = "0x108 - Software Reset"]
28 pub swreset: SWRESET,
29 #[doc = "0x10c - General Purpose Retention"]
30 pub gretreg: GRETREG,
31 #[doc = "0x110 - Initial Secure Reset Vector Register For CPU 0"]
32 pub initsvrtor0: INITSVRTOR0,
33 _reserved12: [u8; 0x0c],
34 #[doc = "0x120 - CPU Boot wait control after reset"]
35 pub cpuwait: CPUWAIT,
36 #[doc = "0x124 - NMI Enable Register"]
37 pub nmi_enable: NMI_ENABLE,
38 _reserved14: [u8; 0xd4],
39 #[doc = "0x1fc - Power Configuration and Control."]
40 pub pwrctrl: PWRCTRL,
41 #[doc = "0x200 - External Wakeup Control"]
42 pub pdcm_pd_sys_sense: PDCM_PD_SYS_SENSE,
43 #[doc = "0x204 - PDCM PD_CPU0 Sensitivity."]
44 pub pdcm_pd_cpu0_sense: PDCM_PD_CPU0_SENSE,
45 _reserved17: [u8; 0x0c],
46 #[doc = "0x214 - PDCM PD_VMR0 Sensitivity."]
47 pub pdcm_pd_vmr0_sense: PDCM_PD_VMR0_SENSE,
48 #[doc = "0x218 - PDCM PD_VMR1 Sensitivity."]
49 pub pdcm_pd_vmr1_sense: PDCM_PD_VMR1_SENSE,
50 _reserved19: [u8; 0x0db4],
51 #[doc = "0xfd0 - Peripheral ID 4"]
52 pub pidr4: PIDR4,
53 _reserved20: [u8; 0x0c],
54 #[doc = "0xfe0 - Peripheral ID 0"]
55 pub pidr0: PIDR0,
56 #[doc = "0xfe4 - Peripheral ID 1"]
57 pub pidr1: PIDR1,
58 #[doc = "0xfe8 - Peripheral ID 2"]
59 pub pidr2: PIDR2,
60 #[doc = "0xfec - Peripheral ID 3"]
61 pub pidr3: PIDR3,
62 #[doc = "0xff0 - Component ID 0"]
63 pub cidr0: CIDR0,
64 #[doc = "0xff4 - Component ID 1"]
65 pub cidr1: CIDR1,
66 #[doc = "0xff8 - Component ID 2"]
67 pub cidr2: CIDR2,
68 #[doc = "0xffc - Component ID 3"]
69 pub cidr3: CIDR3,
70}
71#[doc = "SECDBGSTAT (r) register accessor: an alias for `Reg<SECDBGSTAT_SPEC>`"]
72pub type SECDBGSTAT = crate::Reg<secdbgstat::SECDBGSTAT_SPEC>;
73#[doc = "Secure Debug Configuration Status"]
74pub mod secdbgstat;
75#[doc = "SECDBGSET (w) register accessor: an alias for `Reg<SECDBGSET_SPEC>`"]
76pub type SECDBGSET = crate::Reg<secdbgset::SECDBGSET_SPEC>;
77#[doc = "Secure Debug Configuration Set"]
78pub mod secdbgset;
79#[doc = "SECDBGCLR (w) register accessor: an alias for `Reg<SECDBGCLR_SPEC>`"]
80pub type SECDBGCLR = crate::Reg<secdbgclr::SECDBGCLR_SPEC>;
81#[doc = "Secure Debug Configuration Clear"]
82pub mod secdbgclr;
83#[doc = "SCSECCTRL (rw) register accessor: an alias for `Reg<SCSECCTRL_SPEC>`"]
84pub type SCSECCTRL = crate::Reg<scsecctrl::SCSECCTRL_SPEC>;
85#[doc = "System Security Control"]
86pub mod scsecctrl;
87#[doc = "CLK_CFG0 (rw) register accessor: an alias for `Reg<CLK_CFG0_SPEC>`"]
88pub type CLK_CFG0 = crate::Reg<clk_cfg0::CLK_CFG0_SPEC>;
89#[doc = "Clock Configuration Register 0."]
90pub mod clk_cfg0;
91#[doc = "CLK_CFG1 (rw) register accessor: an alias for `Reg<CLK_CFG1_SPEC>`"]
92pub type CLK_CFG1 = crate::Reg<clk_cfg1::CLK_CFG1_SPEC>;
93#[doc = "Clock Configuration Register 1."]
94pub mod clk_cfg1;
95#[doc = "CLOCK_FORCE (rw) register accessor: an alias for `Reg<CLOCK_FORCE_SPEC>`"]
96pub type CLOCK_FORCE = crate::Reg<clock_force::CLOCK_FORCE_SPEC>;
97#[doc = "Clock Force"]
98pub mod clock_force;
99#[doc = "RESET_SYNDROME (rw) register accessor: an alias for `Reg<RESET_SYNDROME_SPEC>`"]
100pub type RESET_SYNDROME = crate::Reg<reset_syndrome::RESET_SYNDROME_SPEC>;
101#[doc = "Reset Syndrome"]
102pub mod reset_syndrome;
103#[doc = "RESET_MASK (rw) register accessor: an alias for `Reg<RESET_MASK_SPEC>`"]
104pub type RESET_MASK = crate::Reg<reset_mask::RESET_MASK_SPEC>;
105#[doc = "Reset Mask"]
106pub mod reset_mask;
107#[doc = "SWRESET (w) register accessor: an alias for `Reg<SWRESET_SPEC>`"]
108pub type SWRESET = crate::Reg<swreset::SWRESET_SPEC>;
109#[doc = "Software Reset"]
110pub mod swreset;
111#[doc = "GRETREG (rw) register accessor: an alias for `Reg<GRETREG_SPEC>`"]
112pub type GRETREG = crate::Reg<gretreg::GRETREG_SPEC>;
113#[doc = "General Purpose Retention"]
114pub mod gretreg;
115#[doc = "INITSVRTOR0 (rw) register accessor: an alias for `Reg<INITSVRTOR0_SPEC>`"]
116pub type INITSVRTOR0 = crate::Reg<initsvrtor0::INITSVRTOR0_SPEC>;
117#[doc = "Initial Secure Reset Vector Register For CPU 0"]
118pub mod initsvrtor0;
119#[doc = "CPUWAIT (rw) register accessor: an alias for `Reg<CPUWAIT_SPEC>`"]
120pub type CPUWAIT = crate::Reg<cpuwait::CPUWAIT_SPEC>;
121#[doc = "CPU Boot wait control after reset"]
122pub mod cpuwait;
123#[doc = "NMI_ENABLE (rw) register accessor: an alias for `Reg<NMI_ENABLE_SPEC>`"]
124pub type NMI_ENABLE = crate::Reg<nmi_enable::NMI_ENABLE_SPEC>;
125#[doc = "NMI Enable Register"]
126pub mod nmi_enable;
127#[doc = "PWRCTRL (rw) register accessor: an alias for `Reg<PWRCTRL_SPEC>`"]
128pub type PWRCTRL = crate::Reg<pwrctrl::PWRCTRL_SPEC>;
129#[doc = "Power Configuration and Control."]
130pub mod pwrctrl;
131#[doc = "PDCM_PD_SYS_SENSE (rw) register accessor: an alias for `Reg<PDCM_PD_SYS_SENSE_SPEC>`"]
132pub type PDCM_PD_SYS_SENSE = crate::Reg<pdcm_pd_sys_sense::PDCM_PD_SYS_SENSE_SPEC>;
133#[doc = "External Wakeup Control"]
134pub mod pdcm_pd_sys_sense;
135#[doc = "PDCM_PD_CPU0_SENSE (rw) register accessor: an alias for `Reg<PDCM_PD_CPU0_SENSE_SPEC>`"]
136pub type PDCM_PD_CPU0_SENSE = crate::Reg<pdcm_pd_cpu0_sense::PDCM_PD_CPU0_SENSE_SPEC>;
137#[doc = "PDCM PD_CPU0 Sensitivity."]
138pub mod pdcm_pd_cpu0_sense;
139#[doc = "PDCM_PD_VMR0_SENSE (rw) register accessor: an alias for `Reg<PDCM_PD_VMR0_SENSE_SPEC>`"]
140pub type PDCM_PD_VMR0_SENSE = crate::Reg<pdcm_pd_vmr0_sense::PDCM_PD_VMR0_SENSE_SPEC>;
141#[doc = "PDCM PD_VMR0 Sensitivity."]
142pub mod pdcm_pd_vmr0_sense;
143#[doc = "PDCM_PD_VMR1_SENSE (rw) register accessor: an alias for `Reg<PDCM_PD_VMR1_SENSE_SPEC>`"]
144pub type PDCM_PD_VMR1_SENSE = crate::Reg<pdcm_pd_vmr1_sense::PDCM_PD_VMR1_SENSE_SPEC>;
145#[doc = "PDCM PD_VMR1 Sensitivity."]
146pub mod pdcm_pd_vmr1_sense;
147#[doc = "PIDR4 (r) register accessor: an alias for `Reg<PIDR4_SPEC>`"]
148pub type PIDR4 = crate::Reg<pidr4::PIDR4_SPEC>;
149#[doc = "Peripheral ID 4"]
150pub mod pidr4;
151#[doc = "PIDR0 (r) register accessor: an alias for `Reg<PIDR0_SPEC>`"]
152pub type PIDR0 = crate::Reg<pidr0::PIDR0_SPEC>;
153#[doc = "Peripheral ID 0"]
154pub mod pidr0;
155#[doc = "PIDR1 (r) register accessor: an alias for `Reg<PIDR1_SPEC>`"]
156pub type PIDR1 = crate::Reg<pidr1::PIDR1_SPEC>;
157#[doc = "Peripheral ID 1"]
158pub mod pidr1;
159#[doc = "PIDR2 (r) register accessor: an alias for `Reg<PIDR2_SPEC>`"]
160pub type PIDR2 = crate::Reg<pidr2::PIDR2_SPEC>;
161#[doc = "Peripheral ID 2"]
162pub mod pidr2;
163#[doc = "PIDR3 (r) register accessor: an alias for `Reg<PIDR3_SPEC>`"]
164pub type PIDR3 = crate::Reg<pidr3::PIDR3_SPEC>;
165#[doc = "Peripheral ID 3"]
166pub mod pidr3;
167#[doc = "CIDR0 (r) register accessor: an alias for `Reg<CIDR0_SPEC>`"]
168pub type CIDR0 = crate::Reg<cidr0::CIDR0_SPEC>;
169#[doc = "Component ID 0"]
170pub mod cidr0;
171#[doc = "CIDR1 (r) register accessor: an alias for `Reg<CIDR1_SPEC>`"]
172pub type CIDR1 = crate::Reg<cidr1::CIDR1_SPEC>;
173#[doc = "Component ID 1"]
174pub mod cidr1;
175#[doc = "CIDR2 (r) register accessor: an alias for `Reg<CIDR2_SPEC>`"]
176pub type CIDR2 = crate::Reg<cidr2::CIDR2_SPEC>;
177#[doc = "Component ID 2"]
178pub mod cidr2;
179#[doc = "CIDR3 (r) register accessor: an alias for `Reg<CIDR3_SPEC>`"]
180pub type CIDR3 = crate::Reg<cidr3::CIDR3_SPEC>;
181#[doc = "Component ID 3"]
182pub mod cidr3;