corstone300_pac/ssp0/
itip.rs

1// Copyright 2022 Arm Limited and/or its affiliates <open-source-office@arm.com>
2//
3// SPDX-License-Identifier: MIT
4
5#[doc = "Register `ITIP` reader"]
6pub struct R(crate::R<ITIP_SPEC>);
7impl core::ops::Deref for R {
8    type Target = crate::R<ITIP_SPEC>;
9    #[inline(always)]
10    fn deref(&self) -> &Self::Target {
11        &self.0
12    }
13}
14impl From<crate::R<ITIP_SPEC>> for R {
15    #[inline(always)]
16    fn from(reader: crate::R<ITIP_SPEC>) -> Self {
17        R(reader)
18    }
19}
20#[doc = "Register `ITIP` writer"]
21pub struct W(crate::W<ITIP_SPEC>);
22impl core::ops::Deref for W {
23    type Target = crate::W<ITIP_SPEC>;
24    #[inline(always)]
25    fn deref(&self) -> &Self::Target {
26        &self.0
27    }
28}
29impl core::ops::DerefMut for W {
30    #[inline(always)]
31    fn deref_mut(&mut self) -> &mut Self::Target {
32        &mut self.0
33    }
34}
35impl From<crate::W<ITIP_SPEC>> for W {
36    #[inline(always)]
37    fn from(writer: crate::W<ITIP_SPEC>) -> Self {
38        W(writer)
39    }
40}
41#[doc = "Field `RXD` reader - Return the value of RXD primary input"]
42pub type RXD_R = crate::BitReader<bool>;
43#[doc = "Field `RXD` writer - Return the value of RXD primary input"]
44pub type RXD_W<'a, const O: u8> = crate::BitWriter<'a, u32, ITIP_SPEC, bool, O>;
45#[doc = "Field `FSSIN` reader - Return the value of FSSIN primary input"]
46pub type FSSIN_R = crate::BitReader<bool>;
47#[doc = "Field `FSSIN` writer - Return the value of FSSIN primary input"]
48pub type FSSIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ITIP_SPEC, bool, O>;
49#[doc = "Field `CLKIN` reader - Return the value of CLKIN primary input"]
50pub type CLKIN_R = crate::BitReader<bool>;
51#[doc = "Field `CLKIN` writer - Return the value of CLKIN primary input"]
52pub type CLKIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, ITIP_SPEC, bool, O>;
53#[doc = "Field `RXDDMACLR` reader - Value to be driven on the intra-chip input"]
54pub type RXDDMACLR_R = crate::BitReader<bool>;
55#[doc = "Field `RXDDMACLR` writer - Value to be driven on the intra-chip input"]
56pub type RXDDMACLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, ITIP_SPEC, bool, O>;
57#[doc = "Field `TXDMACLR` reader - Value to be driven on the intra-chip input"]
58pub type TXDMACLR_R = crate::BitReader<bool>;
59#[doc = "Field `TXDMACLR` writer - Value to be driven on the intra-chip input"]
60pub type TXDMACLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, ITIP_SPEC, bool, O>;
61impl R {
62    #[doc = "Bit 0 - Return the value of RXD primary input"]
63    #[inline(always)]
64    pub fn rxd(&self) -> RXD_R {
65        RXD_R::new((self.bits & 1) != 0)
66    }
67    #[doc = "Bit 1 - Return the value of FSSIN primary input"]
68    #[inline(always)]
69    pub fn fssin(&self) -> FSSIN_R {
70        FSSIN_R::new(((self.bits >> 1) & 1) != 0)
71    }
72    #[doc = "Bit 2 - Return the value of CLKIN primary input"]
73    #[inline(always)]
74    pub fn clkin(&self) -> CLKIN_R {
75        CLKIN_R::new(((self.bits >> 2) & 1) != 0)
76    }
77    #[doc = "Bit 3 - Value to be driven on the intra-chip input"]
78    #[inline(always)]
79    pub fn rxddmaclr(&self) -> RXDDMACLR_R {
80        RXDDMACLR_R::new(((self.bits >> 3) & 1) != 0)
81    }
82    #[doc = "Bit 4 - Value to be driven on the intra-chip input"]
83    #[inline(always)]
84    pub fn txdmaclr(&self) -> TXDMACLR_R {
85        TXDMACLR_R::new(((self.bits >> 4) & 1) != 0)
86    }
87}
88impl W {
89    #[doc = "Bit 0 - Return the value of RXD primary input"]
90    #[inline(always)]
91    pub fn rxd(&mut self) -> RXD_W<0> {
92        RXD_W::new(self)
93    }
94    #[doc = "Bit 1 - Return the value of FSSIN primary input"]
95    #[inline(always)]
96    pub fn fssin(&mut self) -> FSSIN_W<1> {
97        FSSIN_W::new(self)
98    }
99    #[doc = "Bit 2 - Return the value of CLKIN primary input"]
100    #[inline(always)]
101    pub fn clkin(&mut self) -> CLKIN_W<2> {
102        CLKIN_W::new(self)
103    }
104    #[doc = "Bit 3 - Value to be driven on the intra-chip input"]
105    #[inline(always)]
106    pub fn rxddmaclr(&mut self) -> RXDDMACLR_W<3> {
107        RXDDMACLR_W::new(self)
108    }
109    #[doc = "Bit 4 - Value to be driven on the intra-chip input"]
110    #[inline(always)]
111    pub fn txdmaclr(&mut self) -> TXDMACLR_W<4> {
112        TXDMACLR_W::new(self)
113    }
114    #[doc = "Writes raw bits to the register."]
115    #[inline(always)]
116    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
117        self.0.bits(bits);
118        self
119    }
120}
121#[doc = "Integration test input register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [itip](index.html) module"]
122pub struct ITIP_SPEC;
123impl crate::RegisterSpec for ITIP_SPEC {
124    type Ux = u32;
125}
126#[doc = "`read()` method returns [itip::R](R) reader structure"]
127impl crate::Readable for ITIP_SPEC {
128    type Reader = R;
129}
130#[doc = "`write(|w| ..)` method takes [itip::W](W) writer structure"]
131impl crate::Writable for ITIP_SPEC {
132    type Writer = W;
133}
134#[doc = "`reset()` method sets ITIP to value 0"]
135impl crate::Resettable for ITIP_SPEC {
136    #[inline(always)]
137    fn reset_value() -> Self::Ux {
138        0
139    }
140}
corstone300_pac/ssp0/itip.rs

corstone300_pac/ssp0/
itip.rs
