Expand description
Per-core peripheral and interrupt maps, embedded at compile time from the
generated chip dumps (database/chip/*.json).
Each JSON file is a single core’s view of a chip: the peripheral MMIO bases
and the NVIC interrupt numbers as extracted from the vendor CMSIS headers.
Because there is one file per core, the set of peripherals in a core’s file
is the set that core can reach — this is the filter used when a
[peripheral.<name>] is assigned to a coprocessor.
Structs§
- ChipMap
- A single core’s peripheral and interrupt map.
- IrqEntry
- A resolved interrupt: its NVIC number and canonical name.
- Peripheral
Entry - A resolved peripheral: its MMIO base and register-block reference.
Functions§
- load
- Resolve and parse the per-core chip map for a chip part number and core name.