consortium_cfg_common/database/
schema.rs

1use std::collections::HashMap;
2
3use super::HardwareDoorbellPeripheral;
4use crate::config::VisibleCore;
5
6#[derive(Debug, Clone, serde::Serialize, serde::Deserialize)]
7#[serde(deny_unknown_fields)]
8pub struct ChipDatabase {
9    pub name: String,
10    pub trm: String,
11    pub ap: String,
12    /// Device-tree label of this chip's primary interrupt controller (the GIC):
13    /// `intc` on STM32MP2, `gic` on i.MX 9. Emitted as `interrupt-parent = <&…>`
14    /// on the register-backed (doorbell) UIO nodes so their GIC SPI resolves —
15    /// the STM32MP2 root sets no default interrupt-parent, so a doorbell node at
16    /// `/` would otherwise bind with no IRQ.
17    pub interrupt_parent: String,
18    pub cp: Vec<Coprocessor>,
19    /// Linux remoteproc loader contracts keyed by coprocessor name.
20    #[serde(default)]
21    pub remoteproc: HashMap<String, RemoteprocDatabase>,
22    pub memory: MemoryDatabase,
23    pub peripheral: PeripheralDatabase,
24}
25
26/// Chip-specific Linux remoteproc loader contract.
27#[derive(Debug, Clone, serde::Serialize, serde::Deserialize)]
28pub struct RemoteprocDatabase {
29    /// Compatible string identifying the remoteproc node in the Linux DTS.
30    pub compatible: String,
31    /// Section name the deployed ELF loader uses to find the vector table.
32    pub vector_section: String,
33    /// How the generated `memory.x` relates `FLASH` to the vector window.
34    pub vector_placement: VectorPlacement,
35    /// Mandatory vector-table subregion at the start of the load image.
36    pub vector: RemoteprocVector,
37    /// Default code/read-only window.
38    pub flash: RemoteprocWindow,
39    /// Mandatory remoteproc shared-memory region that owns `.resource_table`.
40    pub shmem: RemoteprocRegion,
41    /// Default writable window.
42    pub ram: RemoteprocWindow,
43}
44
45/// How a remote core's generated `memory.x` lays out `FLASH` relative to its
46/// vector window.
47#[derive(Debug, Clone, Copy, PartialEq, Eq, serde::Serialize, serde::Deserialize)]
48#[serde(rename_all = "lowercase")]
49pub enum VectorPlacement {
50    /// `FLASH` starts at the vector window and spans it plus the flash window,
51    /// so `cortex-m-rt` links `.vector_table` at the vector origin; `_stext`
52    /// then keeps `.text` inside the flash window. The two windows must be
53    /// adjacent. Used by the i.MX 9 cores.
54    Flash,
55    /// `FLASH` is exactly the flash window and the vector window is emitted as
56    /// its own region. Used by STM32MP2.
57    Separate,
58}
59
60/// The mandatory chip-defined remoteproc shared-memory region.
61#[derive(Debug, Clone, serde::Serialize, serde::Deserialize)]
62pub struct RemoteprocRegion {
63    pub name: String,
64    pub read: bool,
65    pub write: bool,
66    pub execute: bool,
67    pub window: RemoteprocWindow,
68}
69
70/// Chip-specific mandatory vector-table memory contract.
71#[derive(Debug, Clone, serde::Serialize, serde::Deserialize)]
72pub struct RemoteprocVector {
73    pub name: String,
74    pub read: bool,
75    pub write: bool,
76    pub execute: bool,
77    pub window: RemoteprocWindow,
78}
79
80/// One recommended default remoteproc firmware window.
81///
82/// Manifests may override every field. The same origin is used by the firmware
83/// linker, ELF validation, and Linux DTS generation.
84#[derive(Debug, Clone, Copy, PartialEq, Eq, serde::Serialize, serde::Deserialize)]
85pub struct RemoteprocWindow {
86    pub origin: u64,
87    pub length: u64,
88    pub reserve: bool,
89}
90
91#[derive(Debug, Clone, serde::Serialize, serde::Deserialize)]
92pub struct Coprocessor {
93    pub name: String,
94    pub count: Option<u8>,
95    pub variant: CoprocessorVariant,
96}
97
98#[derive(Debug, Clone, Copy, PartialEq, Eq, serde::Serialize, serde::Deserialize)]
99#[serde(rename_all = "lowercase")]
100pub enum CoprocessorVariant {
101    Remote,
102    Manager,
103}
104
105#[derive(Debug, Clone, serde::Serialize, serde::Deserialize)]
106pub struct MemoryDatabase {
107    pub trm_page: Vec<u32>,
108    pub aliases: Vec<MemoryAlias>,
109    pub regions: Vec<MemoryRegion>,
110}
111
112#[derive(Debug, Clone, Copy, PartialEq, Eq, serde::Serialize, serde::Deserialize)]
113pub struct MemoryAlias {
114    pub offset: u32,
115    pub secure: bool,
116}
117
118/// A memory window shared-memory channels and debug rings may be placed in.
119#[derive(Debug, Clone, serde::Serialize, serde::Deserialize)]
120pub struct MemoryRegion {
121    pub name: String,
122    pub r#type: MemoryRegionType,
123    pub base: u32,
124    pub length: u32,
125    /// Cores that may access the window. On a chip whose access control is
126    /// owned by a System Manager (i.MX 95), this is what the vendor's reference
127    /// configurations grant, not what the bus fabric could reach.
128    pub visible: Vec<VisibleCore>,
129}
130
131impl MemoryRegion {
132    /// Exclusive end address.
133    pub const fn end(&self) -> u64 {
134        self.base as u64 + self.length as u64
135    }
136
137    /// Whether `[base, base + length)` lies entirely inside this window.
138    pub const fn contains(&self, base: u32, length: u32) -> bool {
139        base >= self.base && base as u64 + length as u64 <= self.end()
140    }
141}
142
143#[derive(Debug, Clone, Copy, PartialEq, Eq, serde::Serialize, serde::Deserialize)]
144#[serde(rename_all = "lowercase")]
145pub enum MemoryRegionType {
146    /// On-chip SRAM. Addresses are canonical offsets; each core reaches the
147    /// window through its security world's [`MemoryAlias`].
148    Sram,
149    /// External DRAM. Addresses are physical and identical for every core:
150    /// [`MemoryAlias`] offsets do not apply.
151    Dram,
152}
153
154impl MemoryRegionType {
155    /// Whether a [`MemoryAlias`] offset is added to addresses in this window.
156    pub const fn aliased(self) -> bool {
157        matches!(self, Self::Sram)
158    }
159}
160
161#[derive(Debug, Clone, serde::Serialize, serde::Deserialize)]
162pub struct PeripheralDatabase {
163    pub aliases: Vec<PeripheralAlias>,
164    pub doorbells: Vec<HardwareDoorbellPeripheral>,
165}
166
167#[derive(Debug, Clone, Copy, PartialEq, Eq, serde::Serialize, serde::Deserialize)]
168pub struct PeripheralAlias {
169    pub address: u32,
170    pub secure: bool,
171}
consortium_cfg_common/database/schema.rs

consortium_cfg_common/database/
schema.rs
