ckb_vm/
cost_model.rs

1use crate::{
2    instructions::{extract_opcode, insts},
3    Instruction,
4};
5
6// Returns the spent cycles to execute the secific instruction.
7// This function is usually used to write test cases, which can visually
8// display how many instructions are executed.
9pub fn constant_cycles(_: Instruction) -> u64 {
10    1
11}
12
13// Returns the spent cycles to execute the secific instruction.
14// These values come from estimates of hardware execution speed.
15pub fn estimate_cycles(i: Instruction) -> u64 {
16    match extract_opcode(i) {
17        // IMC
18        insts::OP_JALR_VERSION0 => 3,
19        insts::OP_JALR_VERSION1 => 3,
20        insts::OP_LD_VERSION0 => 2,
21        insts::OP_LD_VERSION1 => 2,
22        insts::OP_LW_VERSION0 => 3,
23        insts::OP_LW_VERSION1 => 3,
24        insts::OP_LH_VERSION0 => 3,
25        insts::OP_LH_VERSION1 => 3,
26        insts::OP_LB_VERSION0 => 3,
27        insts::OP_LB_VERSION1 => 3,
28        insts::OP_LWU_VERSION0 => 3,
29        insts::OP_LWU_VERSION1 => 3,
30        insts::OP_LHU_VERSION0 => 3,
31        insts::OP_LHU_VERSION1 => 3,
32        insts::OP_LBU_VERSION0 => 3,
33        insts::OP_LBU_VERSION1 => 3,
34        insts::OP_SB => 3,
35        insts::OP_SH => 3,
36        insts::OP_SW => 3,
37        insts::OP_SD => 2,
38        insts::OP_BEQ => 3,
39        insts::OP_BGE => 3,
40        insts::OP_BGEU => 3,
41        insts::OP_BLT => 3,
42        insts::OP_BLTU => 3,
43        insts::OP_BNE => 3,
44        insts::OP_EBREAK => 500,
45        insts::OP_ECALL => 500,
46        insts::OP_JAL => 3,
47        insts::OP_MUL => 5,
48        insts::OP_MULW => 5,
49        insts::OP_MULH => 5,
50        insts::OP_MULHU => 5,
51        insts::OP_MULHSU => 5,
52        insts::OP_DIV => 32,
53        insts::OP_DIVW => 32,
54        insts::OP_DIVU => 32,
55        insts::OP_DIVUW => 32,
56        insts::OP_REM => 32,
57        insts::OP_REMW => 32,
58        insts::OP_REMU => 32,
59        insts::OP_REMUW => 32,
60        // A
61        insts::OP_LR_W => 4,
62        insts::OP_SC_W => 4,
63        insts::OP_AMOSWAP_W => 4,
64        insts::OP_AMOADD_W => 4,
65        insts::OP_AMOXOR_W => 4,
66        insts::OP_AMOAND_W => 4,
67        insts::OP_AMOOR_W => 4,
68        insts::OP_AMOMIN_W => 4,
69        insts::OP_AMOMAX_W => 4,
70        insts::OP_AMOMINU_W => 4,
71        insts::OP_AMOMAXU_W => 4,
72        insts::OP_LR_D => 3,
73        insts::OP_SC_D => 3,
74        insts::OP_AMOSWAP_D => 3,
75        insts::OP_AMOADD_D => 3,
76        insts::OP_AMOXOR_D => 3,
77        insts::OP_AMOAND_D => 3,
78        insts::OP_AMOOR_D => 3,
79        insts::OP_AMOMIN_D => 3,
80        insts::OP_AMOMAX_D => 3,
81        insts::OP_AMOMINU_D => 3,
82        insts::OP_AMOMAXU_D => 3,
83        // MOP
84        insts::OP_WIDE_MUL => 5,
85        insts::OP_WIDE_MULU => 5,
86        insts::OP_WIDE_MULSU => 5,
87        insts::OP_WIDE_DIV => 32,
88        insts::OP_WIDE_DIVU => 32,
89        insts::OP_FAR_JUMP_REL => 3,
90        insts::OP_FAR_JUMP_ABS => 3,
91        _ => 1,
92    }
93}