pub struct R(_);
Expand description
Register ADC_CFG
reader
Implementations§
source§impl R
impl R
sourcepub fn adc_power_on(&self) -> ADC_POWER_ON_R
pub fn adc_power_on(&self) -> ADC_POWER_ON_R
Bit 0 - RW, ADC power control: 0=power down, 1=power on
sourcepub fn adc_buf_en(&self) -> ADC_BUF_EN_R
pub fn adc_buf_en(&self) -> ADC_BUF_EN_R
Bit 1 - RW, ADC input buffer enable
sourcepub fn adc_diff_en(&self) -> ADC_DIFF_EN_R
pub fn adc_diff_en(&self) -> ADC_DIFF_EN_R
Bit 2 - RW, ADC input channel mode: 0=single-end, 1=differnetial
sourcepub fn adc_ofs_test(&self) -> ADC_OFS_TEST_R
pub fn adc_ofs_test(&self) -> ADC_OFS_TEST_R
Bit 3 - RW, enable ADC offset test mode: 0=normal mode, 1=short port4 to test offset
sourcepub fn adc_pga_gain(&self) -> ADC_PGA_GAIN_R
pub fn adc_pga_gain(&self) -> ADC_PGA_GAIN_R
Bits 4:5 - RW, set ADC input PGA gain: 00=-12dB, 01=-6dB, 10=0dB, 11=6dB
sourcepub fn adc_clk_div(&self) -> ADC_CLK_DIV_R
pub fn adc_clk_div(&self) -> ADC_CLK_DIV_R
Bits 6:7 - RW, select ADC clock frequency: 00=3.2MHz, 01=2.67MHz, 10=5.33MHz, 11=4MHz